add freeipmi source
This commit is contained in:
@ -0,0 +1,56 @@
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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*
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* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef IPMI_AUTHENTICATION_TYPE_SPEC_H
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#define IPMI_AUTHENTICATION_TYPE_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define IPMI_AUTHENTICATION_TYPE_NONE 0x00
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#define IPMI_AUTHENTICATION_TYPE_MD2 0x01
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#define IPMI_AUTHENTICATION_TYPE_MD5 0x02
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#define IPMI_AUTHENTICATION_TYPE_STRAIGHT_PASSWORD_KEY 0x04
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#define IPMI_AUTHENTICATION_TYPE_OEM_PROP 0x05
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#define IPMI_AUTHENTICATION_TYPE_RMCPPLUS 0x06
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#define IPMI_AUTHENTICATION_TYPE_VALID(__authentication_type) \
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(((__authentication_type) == IPMI_AUTHENTICATION_TYPE_NONE \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_MD2 \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_MD5 \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_STRAIGHT_PASSWORD_KEY \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_OEM_PROP \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_RMCPPLUS) ? 1 : 0)
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#define IPMI_1_5_AUTHENTICATION_TYPE_VALID(__authentication_type) \
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(((__authentication_type) == IPMI_AUTHENTICATION_TYPE_NONE \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_MD2 \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_MD5 \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_STRAIGHT_PASSWORD_KEY \
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|| (__authentication_type) == IPMI_AUTHENTICATION_TYPE_OEM_PROP) ? 1 : 0)
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#define IPMI_2_0_AUTHENTICATION_TYPE_VALID(__authentication_type) \
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IPMI_AUTHENTICATION_TYPE_VALID ((__authentication_type))
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_AUTHENTICATION_TYPE_SPEC_H */
|
101
source/freeipmi/usr/include/freeipmi/spec/ipmi-channel-spec.h
Normal file
101
source/freeipmi/usr/include/freeipmi/spec/ipmi-channel-spec.h
Normal file
@ -0,0 +1,101 @@
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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*
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* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
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||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef IPMI_CHANNEL_SPEC_H
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#define IPMI_CHANNEL_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define IPMI_CHANNEL_NUMBER_PRIMARY_IPMB 0x0
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#define IPMI_CHANNEL_NUMBER_IMPLEMENTATION_SPECIFIC_MIN 0x01 /* 0x01 to 0x07 */
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#define IPMI_CHANNEL_NUMBER_IMPLEMENTATION_SPECIFIC_MAX 0x07 /* 0x01 to 0x07 */
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#define IPMI_CHANNEL_NUMBER_RESERVED_MIN 0x0C /* 0x0C to 0x0D */
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#define IPMI_CHANNEL_NUMBER_RESERVED_MAX 0x0D /* 0x0C to 0x0D */
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#define IPMI_CHANNEL_NUMBER_PRESENT_IF 0xE
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#define IPMI_CHANNEL_NUMBER_CURRENT_CHANNEL IPMI_CHANNEL_NUMBER_PRESENT_IF
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#define IPMI_CHANNEL_NUMBER_SYSTEM_INTERFACE 0xF
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#define IPMI_CHANNEL_NUMBERS_MAX 16
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/* To avoid gcc warnings, add +1 in comparison */
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#define IPMI_CHANNEL_NUMBER_VALID(__channel_number) \
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((((__channel_number + 1) >= (IPMI_CHANNEL_NUMBER_PRIMARY_IPMB + 1) \
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&& (__channel_number) < IPMI_CHANNEL_NUMBER_RESERVED_MIN) \
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|| ((__channel_number) > IPMI_CHANNEL_NUMBER_RESERVED_MAX \
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&& (__channel_number) <= IPMI_CHANNEL_NUMBER_SYSTEM_INTERFACE)) ? 1 : 0)
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#define IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED 0x0 /* 0x03, 0x0A to 0x1B */
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#define IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_1 IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED
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#define IPMI_CHANNEL_PROTOCOL_TYPE_IPMB 0x1
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#define IPMI_CHANNEL_PROTOCOL_TYPE_ICMB_10 0x2
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#define IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_2 0x0 /* 0x03, 0x0A to 0x1B */
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#define IPMI_CHANNEL_PROTOCOL_TYPE_SMBUS_1X_2X 0x4
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#define IPMI_CHANNEL_PROTOCOL_TYPE_KCS 0x5
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#define IPMI_CHANNEL_PROTOCOL_TYPE_SMIC 0x6
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#define IPMI_CHANNEL_PROTOCOL_TYPE_BT_10 0x7
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#define IPMI_CHANNEL_PROTOCOL_TYPE_BT_15 0x8
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#define IPMI_CHANNEL_PROTOCOL_TYPE_TMODE 0x9
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#define IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_MIN 0x0A /* 0x03, 0x0A to 0x1B */
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#define IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_MAX 0x1B /* 0x03, 0x0A to 0x1B */
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#define IPMI_CHANNEL_PROTOCOL_TYPE_OEM_MIN 0x1C /* 0x1C to 0x1F */
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#define IPMI_CHANNEL_PROTOCOL_TYPE_OEM_MAX 0x1F /* 0x1C to 0x1F */
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#define IPMI_CHANNEL_PROTOCOL_TYPE_IS_RESERVED(__val) \
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(((__val) == IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_1 \
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|| (__val) == IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_2 \
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|| ((__val) >= IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_MIN \
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&& (__val) <= IPMI_CHANNEL_PROTOCOL_TYPE_RESERVED_MAX)) ? 1 : 0)
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#define IPMI_CHANNEL_PROTOCOL_TYPE_IS_OEM(__val) \
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(((__val) >= IPMI_CHANNEL_PROTOCOL_TYPE_OEM_MIN \
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&& (__val) <= IPMI_CHANNEL_PROTOCOL_TYPE_OEM_MAX) ? 1 : 0)
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#define IPMI_CHANNEL_MEDIUM_TYPE_RESERVED 0x0 /* 0x0D to 0x5F */
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#define IPMI_CHANNEL_MEDIUM_TYPE_IPMB 0x1
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#define IPMI_CHANNEL_MEDIUM_TYPE_ICMB_10 0x2
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#define IPMI_CHANNEL_MEDIUM_TYPE_ICMB_09 0x3
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#define IPMI_CHANNEL_MEDIUM_TYPE_LAN_802_3 0x4
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#define IPMI_CHANNEL_MEDIUM_TYPE_RS232 0x5
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#define IPMI_CHANNEL_MEDIUM_TYPE_OTHER_LAN 0x6
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#define IPMI_CHANNEL_MEDIUM_TYPE_PCI_SMBUS 0x7
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#define IPMI_CHANNEL_MEDIUM_TYPE_SMBUS_10_11 0x8
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#define IPMI_CHANNEL_MEDIUM_TYPE_SMBUS_20 0x9
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#define IPMI_CHANNEL_MEDIUM_TYPE_USB_1X 0xA
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#define IPMI_CHANNEL_MEDIUM_TYPE_USB_2X 0xB
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#define IPMI_CHANNEL_MEDIUM_TYPE_SYSTEM_INTERFACE 0xC
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#define IPMI_CHANNEL_MEDIUM_TYPE_RESERVED_MIN 0x0D /* 0x0D to 0x59 */
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#define IPMI_CHANNEL_MEDIUM_TYPE_RESERVED_MAX 0x59 /* 0x0D to 0x59 */
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#define IPMI_CHANNEL_MEDIUM_TYPE_OEM_MIN 0x60 /* 0x60 to 0x7F */
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#define IPMI_CHANNEL_MEDIUM_TYPE_OEM_MAX 0x7F /* 0x60 to 0x7F */
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#define IPMI_CHANNEL_MEDIUM_TYPE_IS_RESERVED(__val) \
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(((__val) == IPMI_CHANNEL_MEDIUM_TYPE_RESERVED \
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|| ((__val) >= IPMI_CHANNEL_MEDIUM_TYPE_RESERVED_MIN \
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&& (__val) <= IPMI_CHANNEL_MEDIUM_TYPE_RESERVED_MAX)) ? 1 : 0)
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#define IPMI_CHANNEL_MEDIUM_TYPE_IS_OEM(__val) \
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(((__val) >= IPMI_CHANNEL_MEDIUM_TYPE_OEM_MIN \
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&& (__val) <= IPMI_CHANNEL_MEDIUM_TYPE_OEM_MAX) ? 1 : 0)
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CHANNEL_SPEC_H */
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@ -0,0 +1,69 @@
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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||||
*
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* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*****************************************************************************\
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* Copyright (C) 2009-2015 Lawrence Livermore National Security, LLC.
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* Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
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* Written by Albert Chu <chu11@llnl.gov>
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* LLNL-CODE-413270
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*
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* This file is part of Ipmi-Dcmi, tools and libraries to support the
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* data center manageability interface (DCMI). For details, see
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* http://www.llnl.gov/linux/.
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*
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* Ipmi-Dcmi is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 3 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Ipmi-Dcmi is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with Ipmi-Dcmi. If not, see <http://www.gnu.org/licenses/>.
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\*****************************************************************************/
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#ifndef IPMI_CMD_DCMI_SPEC_H
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#define IPMI_CMD_DCMI_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define IPMI_CMD_DCMI_GET_DCMI_CAPABILITY_INFO 0x01
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#define IPMI_CMD_DCMI_GET_POWER_READING 0x02
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#define IPMI_CMD_DCMI_GET_POWER_LIMIT 0x03
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#define IPMI_CMD_DCMI_SET_POWER_LIMIT 0x04
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#define IPMI_CMD_DCMI_ACTIVATE_DEACTIVATE_POWER_LIMIT 0x05
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#define IPMI_CMD_DCMI_GET_ASSET_TAG 0x06
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#define IPMI_CMD_DCMI_GET_DCMI_SENSOR_INFO 0x07
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#define IPMI_CMD_DCMI_SET_ASSET_TAG 0x08
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#define IPMI_CMD_DCMI_GET_MANAGEMENT_CONTROLLER_IDENTIFIER_STRING 0x09
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#define IPMI_CMD_DCMI_SET_MANAGEMENT_CONTROLLER_IDENTIFIER_STRING 0x0A
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#define IPMI_CMD_DCMI_SET_THERMAL_LIMIT 0x0B
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#define IPMI_CMD_DCMI_GET_THERMAL_LIMIT 0x0C
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#define IPMI_CMD_DCMI_GET_TEMPERATURE_READING 0x10
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#define IPMI_CMD_DCMI_SET_DCMI_CONFIGURATION_PARAMETERS 0x12
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#define IPMI_CMD_DCMI_GET_DCMI_CONFIGURATION_PARAMETERS 0x13
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CMD_DCMI_SPEC_H */
|
271
source/freeipmi/usr/include/freeipmi/spec/ipmi-cmd-spec.h
Normal file
271
source/freeipmi/usr/include/freeipmi/spec/ipmi-cmd-spec.h
Normal file
@ -0,0 +1,271 @@
|
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/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
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#ifndef IPMI_CMD_SPEC_H
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#define IPMI_CMD_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Notes:
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Refer to IPMIv1_5_rev1_1.pdf Table G-1, Command Number Assignments
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and Privilege Levels for complete description
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*/
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/* IPMI Device Global Commands */
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#define IPMI_CMD_RESERVED 0x00
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#define IPMI_CMD_GET_DEVICE_ID 0x01
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#define IPMI_CMD_GET_DEVICE_ID_BCST IPMI_CMD_GET_DEVICE_ID
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#define IPMI_CMD_COLD_RESET 0x02
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#define IPMI_CMD_WARM_RESET 0x03
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#define IPMI_CMD_GET_SELF_TEST_RESULTS 0x04
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#define IPMI_CMD_MANUFACTURING_TEST_ON 0x05
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#define IPMI_CMD_SET_ACPI_POWER_STATE 0x06
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#define IPMI_CMD_GET_ACPI_POWER_STATE 0x07
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#define IPMI_CMD_GET_DEVICE_GUID 0x08
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#define IPMI_CMD_GET_NETFN_SUPPORT 0x09
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#define IPMI_CMD_GET_COMMAND_SUPPORT 0x0A
|
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#define IPMI_CMD_GET_COMMAND_SUB_FUNCTION_SUPPORT 0x0B
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#define IPMI_CMD_GET_CONFIGURABLE_COMMANDS 0x0C
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#define IPMI_CMD_GET_CONFIGURABLE_COMMAND_SUB_FUNCTIONS 0x0D
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/* RESERVED 0x0E to 0x0F */
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#define IPMI_CMD_SET_COMMAND_ENABLES 0x60
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#define IPMI_CMD_GET_COMMAND_ENABLES 0x61
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#define IPMI_CMD_SET_COMMAND_SUB_FUNCTION_ENABLES 0x62
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#define IPMI_CMD_GET_COMMAND_SUB_FUNCTION_ENABLES 0x63
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#define IPMI_CMD_GET_OEM_NETFN_IANA_SUPPORT 0x64
|
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|
||||
/* BMC Watchdog Timer Commands */
|
||||
#define IPMI_CMD_RESET_WATCHDOG_TIMER 0x22
|
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#define IPMI_CMD_SET_WATCHDOG_TIMER 0x24
|
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#define IPMI_CMD_GET_WATCHDOG_TIMER 0x25
|
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|
||||
/* BMC Device And Messaging Commands */
|
||||
#define IPMI_CMD_SET_BMC_GLOBAL_ENABLES 0x2E
|
||||
#define IPMI_CMD_GET_BMC_GLOBAL_ENABLES 0x2F
|
||||
#define IPMI_CMD_CLEAR_MESSAGE_FLAGS 0x30
|
||||
#define IPMI_CMD_GET_MESSAGE_FLAGS 0x31
|
||||
#define IPMI_CMD_ENABLE_MESSAGE_CHANNEL_RECEIVE 0x32
|
||||
#define IPMI_CMD_GET_MESSAGE 0x33
|
||||
#define IPMI_CMD_SEND_MESSAGE 0x34
|
||||
#define IPMI_CMD_READ_EVENT_MESSAGE_BUFFER 0x35
|
||||
#define IPMI_CMD_GET_BT_INTERFACE_CAPABILITIES 0x36
|
||||
#define IPMI_CMD_GET_SYSTEM_GUID 0x37
|
||||
#define IPMI_CMD_SET_SYSTEM_INFO_PARAMETERS 0x58
|
||||
#define IPMI_CMD_GET_SYSTEM_INFO_PARAMETERS 0x59
|
||||
#define IPMI_CMD_GET_CHANNEL_AUTHENTICATION_CAPABILITIES 0x38
|
||||
#define IPMI_CMD_GET_SESSION_CHALLENGE 0x39
|
||||
#define IPMI_CMD_ACTIVATE_SESSION 0x3A
|
||||
#define IPMI_CMD_SET_SESSION_PRIVILEGE_LEVEL 0x3B
|
||||
#define IPMI_CMD_CLOSE_SESSION 0x3C
|
||||
#define IPMI_CMD_GET_SESSION_INFO 0x3D
|
||||
/* UNASSIGNED 0x3E */
|
||||
#define IPMI_CMD_GET_AUTHCODE 0x3F
|
||||
#define IPMI_CMD_SET_CHANNEL_ACCESS 0x40
|
||||
#define IPMI_CMD_GET_CHANNEL_ACCESS 0x41
|
||||
#define IPMI_CMD_GET_CHANNEL_INFO_COMMAND 0x42
|
||||
#define IPMI_CMD_SET_USER_ACCESS_COMMAND 0x43
|
||||
#define IPMI_CMD_GET_USER_ACCESS_COMMAND 0x44
|
||||
#define IPMI_CMD_SET_USER_NAME 0x45
|
||||
#define IPMI_CMD_GET_USER_NAME_COMMAND 0x46
|
||||
#define IPMI_CMD_SET_USER_PASSWORD_COMMAND 0x47
|
||||
#define IPMI_CMD_ACTIVATE_PAYLOAD 0x48
|
||||
#define IPMI_CMD_DEACTIVATE_PAYLOAD 0x49
|
||||
#define IPMI_CMD_GET_PAYLOAD_ACTIVATION_STATUS 0x4A
|
||||
#define IPMI_CMD_GET_PAYLOAD_INSTANCE_INFO 0x4B
|
||||
#define IPMI_CMD_SET_USER_PAYLOAD_ACCESS 0x4C
|
||||
#define IPMI_CMD_GET_USER_PAYLOAD_ACCESS 0x4D
|
||||
#define IPMI_CMD_GET_CHANNEL_PAYLOAD_SUPPORT 0x4E
|
||||
#define IPMI_CMD_GET_CHANNEL_PAYLOAD_VERSION 0x4F
|
||||
#define IPMI_CMD_GET_CHANNEL_OEM_PAYLOAD_INFO 0x50
|
||||
/* unassigned 0x51 */
|
||||
#define IPMI_CMD_MASTER_WRITE_READ 0x52
|
||||
/* unassigned 0x53 */
|
||||
#define IPMI_CMD_GET_CHANNEL_CIPHER_SUITES 0x54
|
||||
#define IPMI_CMD_SUSPEND_RESUME_PAYLOAD_ENCRYPTION 0x53
|
||||
#define IPMI_CMD_SET_CHANNEL_SECURITY_KEYS 0x56
|
||||
#define IPMI_CMD_GET_SYSTEM_INTERFACE_CAPABILITIES 0x57
|
||||
/* unassigned 0x58 to 0x5F */
|
||||
/* Firmware Firewall Configuration 0x60 to 0x64 */
|
||||
|
||||
/* Chassis Device Commands */
|
||||
/* achu: Cmd is named "set front panel enables", but cmd in appendix G is
|
||||
* named "set front panel button enables". Go fig ...
|
||||
*/
|
||||
#define IPMI_CMD_GET_CHASSIS_CAPABILITIES 0x00
|
||||
#define IPMI_CMD_GET_CHASSIS_STATUS 0x01
|
||||
#define IPMI_CMD_CHASSIS_CONTROL 0x02
|
||||
#define IPMI_CMD_CHASSIS_RESET 0x03
|
||||
#define IPMI_CMD_CHASSIS_IDENTIFY 0x04
|
||||
#define IPMI_CMD_SET_CHASSIS_CAPABILITIES 0x05
|
||||
#define IPMI_CMD_SET_POWER_RESTORE_POLICY 0x06
|
||||
#define IPMI_CMD_GET_SYSTEM_RESTART_CAUSE 0x07
|
||||
#define IPMI_CMD_SET_SYSTEM_BOOT_OPTIONS 0x08
|
||||
#define IPMI_CMD_GET_SYSTEM_BOOT_OPTIONS 0x09
|
||||
#define IPMI_CMD_SET_FRONT_PANEL_BUTTON_ENABLES 0x0A
|
||||
#define IPMI_CMD_SET_FRONT_PANEL_ENABLES IPMI_CMD_SET_FRONT_PANEL_BUTTON_ENABLES
|
||||
#define IPMI_CMD_SET_POWER_CYCLE_INTERVAL 0x0B
|
||||
/* unassigned 0x0C to 0x0E */
|
||||
#define IPMI_CMD_GET_POWER_ON_HOURS_COUNTER 0x0F
|
||||
|
||||
|
||||
/* Event Commands */
|
||||
#define IPMI_CMD_SET_EVENT_RECEIVER 0x00
|
||||
#define IPMI_CMD_GET_EVENT_RECEIVER 0x01
|
||||
#define IPMI_CMD_PLATFORM_EVENT 0x02 /* (a.k.a. Event Message) */
|
||||
/* unassigned 0x03h to 0x0F */
|
||||
|
||||
/* PEF and Alerting Commands */
|
||||
#define IPMI_CMD_GET_PEF_CAPABILITIES 0x10
|
||||
#define IPMI_CMD_ARM_PEF_POSTPONE_TIMER 0x11
|
||||
#define IPMI_CMD_SET_PEF_CONFIGURATION_PARAMETERS 0x12
|
||||
#define IPMI_CMD_GET_PEF_CONFIGURATION_PARAMETERS 0x13
|
||||
#define IPMI_CMD_SET_LAST_PROCESSED_EVENT_ID 0x14
|
||||
#define IPMI_CMD_GET_LAST_PROCESSED_EVENT_ID 0x15
|
||||
#define IPMI_CMD_ALERT_IMMEDIATE 0x16
|
||||
#define IPMI_CMD_PET_ACKNOWLEDGE 0x17
|
||||
|
||||
/* Sensor Device Commands */
|
||||
#define IPMI_CMD_GET_DEVICE_SDR_INFO 0x20
|
||||
#define IPMI_CMD_GET_DEVICE_SDR 0x21
|
||||
#define IPMI_CMD_RESERVE_DEVICE_SDR_REPOSITORY 0x22
|
||||
#define IPMI_CMD_GET_SENSOR_READING_FACTORS 0x23
|
||||
#define IPMI_CMD_SET_SENSOR_HYSTERESIS 0x24
|
||||
#define IPMI_CMD_GET_SENSOR_HYSTERESIS 0x25
|
||||
#define IPMI_CMD_SET_SENSOR_THRESHOLDS 0x26
|
||||
#define IPMI_CMD_GET_SENSOR_THRESHOLDS 0x27
|
||||
#define IPMI_CMD_SET_SENSOR_EVENT_ENABLE 0x28
|
||||
#define IPMI_CMD_GET_SENSOR_EVENT_ENABLE 0x29
|
||||
#define IPMI_CMD_RE_ARM_SENSOR_EVENTS 0x2A
|
||||
#define IPMI_CMD_GET_SENSOR_EVENT_STATUS 0x2B
|
||||
#define IPMI_CMD_GET_SENSOR_READING 0x2D
|
||||
#define IPMI_CMD_SET_SENSOR_TYPE 0x2E
|
||||
#define IPMI_CMD_GET_SENSOR_TYPE 0x2F
|
||||
#define IPMI_CMD_SET_SENSOR_READING_AND_EVENT_STATUS 0x30
|
||||
|
||||
/* FRU Device Commands */
|
||||
#define IPMI_CMD_GET_FRU_INVENTORY_AREA_INFO 0x10
|
||||
#define IPMI_CMD_READ_FRU_DATA 0x11
|
||||
#define IPMI_CMD_WRITE_FRU_DATA 0x12
|
||||
|
||||
/* SDR Device Commands */
|
||||
#define IPMI_CMD_GET_SDR_REPOSITORY_INFO 0x20
|
||||
#define IPMI_CMD_GET_SDR_REPOSITORY_ALLOCATION_INFO 0x21
|
||||
#define IPMI_CMD_RESERVE_SDR_REPOSITORY 0x22
|
||||
#define IPMI_CMD_GET_SDR 0x23
|
||||
#define IPMI_CMD_ADD_SDR 0x24
|
||||
#define IPMI_CMD_PARTIAL_ADD_SDR 0x25
|
||||
#define IPMI_CMD_DELETE_SDR 0x26
|
||||
#define IPMI_CMD_CLEAR_SDR_REPOSITORY 0x27
|
||||
#define IPMI_CMD_GET_SDR_REPOSITORY_TIME 0x28
|
||||
#define IPMI_CMD_SET_SDR_REPOSITORY_TIME 0x29
|
||||
#define IPMI_CMD_ENTER_SDR_REPOSITORY_UPDATE_MODE 0x2A
|
||||
#define IPMI_CMD_EXIT_SDR_REPOSITORY_UPDATE_MODE 0x2B
|
||||
#define IPMI_CMD_RUN_INITIALIZATION_AGENT 0x2C
|
||||
|
||||
/* SEL Device Commands */
|
||||
#define IPMI_CMD_GET_SEL_INFO 0x40
|
||||
#define IPMI_CMD_GET_SEL_ALLOCATION_INFO 0x41
|
||||
#define IPMI_CMD_RESERVE_SEL 0x42
|
||||
#define IPMI_CMD_GET_SEL_ENTRY 0x43
|
||||
#define IPMI_CMD_ADD_SEL_ENTRY 0x44
|
||||
#define IPMI_CMD_PARTIAL_ADD_SEL_ENTRY 0x45
|
||||
#define IPMI_CMD_DELETE_SEL_ENTRY 0x46
|
||||
#define IPMI_CMD_CLEAR_SEL 0x47
|
||||
#define IPMI_CMD_GET_SEL_TIME 0x48
|
||||
#define IPMI_CMD_SET_SEL_TIME 0x49
|
||||
#define IPMI_CMD_GET_AUXILIARY_LOG_STATUS 0x5A
|
||||
#define IPMI_CMD_SET_AUXILIARY_LOG_STATUS 0x5B
|
||||
#define IPMI_CMD_GET_SEL_TIME_UTC_OFFSET 0x5C
|
||||
#define IPMI_CMD_SET_SEL_TIME_UTC_OFFSET 0x5D
|
||||
|
||||
/* LAN Device Commands */
|
||||
#define IPMI_CMD_SET_LAN_CONFIGURATION_PARAMETERS 0x01
|
||||
#define IPMI_CMD_GET_LAN_CONFIGURATION_PARAMETERS 0x02
|
||||
#define IPMI_CMD_SUSPEND_BMC_ARPS 0x03
|
||||
#define IPMI_CMD_GET_IP_UDP_RMCP_STATISTICS 0x04
|
||||
|
||||
/* Serial/Modem Device Commands */
|
||||
#define IPMI_CMD_SET_SERIAL_MODEM_CONFIGURATION 0x10
|
||||
#define IPMI_CMD_GET_SERIAL_MODEM_CONFIGURATION 0x11
|
||||
#define IPMI_CMD_SET_SERIAL_MODEM_MUX 0x12
|
||||
#define IPMI_CMD_GET_TAP_RESPONSE_CODES 0x13
|
||||
#define IPMI_CMD_SET_PPP_UDP_PROXY_TRANSMIT_DATA 0x14
|
||||
#define IPMI_CMD_GET_PPP_UDP_PROXY_TRANSMIT_DATA 0x15
|
||||
#define IPMI_CMD_SEND_PPP_UDP_PROXY_PACKET 0x16
|
||||
#define IPMI_CMD_GET_PPP_UDP_PROXY_RECEIVE_DATA 0x17
|
||||
#define IPMI_CMD_SERIAL_MODEM_CONNECTION_ACTIVE 0x18
|
||||
#define IPMI_CMD_CALLBACK 0x19
|
||||
#define IPMI_CMD_SET_USER_CALLBACK_OPTIONS 0x1A
|
||||
#define IPMI_CMD_GET_USER_CALLBACK_OPTIONS 0x1B
|
||||
#define IPMI_CMD_SET_SERIAL_ROUTING_MUX 0x1C
|
||||
#define IPMI_CMD_SOL_ACTIVATING 0x20
|
||||
#define IPMI_CMD_SET_SOL_CONFIGURATION_PARAMETERS 0x21
|
||||
#define IPMI_CMD_GET_SOL_CONFIGURATION_PARAMETERS 0x22
|
||||
|
||||
/* Command Forwarding Commands */
|
||||
#define IPMI_CMD_FORWARDED_COMMAND 0x30
|
||||
#define IPMI_CMD_SET_FORWARDED_COMMANDS 0x31
|
||||
#define IPMI_CMD_GET_FORWARDED_COMMANDS 0x32
|
||||
#define IPMI_CMD_ENABLE_FORWARDED_COMMANDS 0x33
|
||||
|
||||
/* Bridge Management Commands (ICMB) */
|
||||
#define IPMI_CMD_GET_BRIDGE_STATE 0x00
|
||||
#define IPMI_CMD_SET_BRIDGE_STATE 0x01
|
||||
#define IPMI_CMD_GET_ICMB_ADDRESS 0x02
|
||||
#define IPMI_CMD_SET_ICMB_ADDRESS 0x03
|
||||
#define IPMI_CMD_SET_BRIDGE_PROXY_ADDRESS 0x04
|
||||
#define IPMI_CMD_GET_BRIDGE_STATISTICS 0x05
|
||||
#define IPMI_CMD_GET_ICMB_CAPABILITIES 0x06
|
||||
#define IPMI_CMD_CLEAR_BRIDGE_STATISTICS 0x08
|
||||
#define IPMI_CMD_GET_BRIDGE_PROXY_ADDRESS 0x09
|
||||
#define IPMI_CMD_GET_ICMB_CONNECTOR_INFO 0x0A
|
||||
#define IPMI_CMD_GET_ICMB_CONNECTION_ID 0x0B
|
||||
#define IPMI_CMD_SEND_ICMB_CONNECTION_ID 0x0C
|
||||
|
||||
/* Discovery Commands (ICMB) */
|
||||
#define IPMI_CMD_PREPARE_FOR_DISCOVERY 0x10
|
||||
#define IPMI_CMD_GET_ADDRESSES 0x11
|
||||
#define IPMI_CMD_SET_DISCOVERED 0x12
|
||||
#define IPMI_CMD_GET_CHASSIS_DEVICE_ID 0x13
|
||||
#define IPMI_CMD_SET_CHASSIS_DEVICE_ID 0x14
|
||||
|
||||
/* Bridging Commands (ICMB) */
|
||||
#define IPMI_CMD_BRIDGE_REQUEST 0x20
|
||||
#define IPMI_CMD_BRIDGE_MESSAGE 0x21
|
||||
|
||||
/* Event Commands (ICMB) */
|
||||
#define IPMI_CMD_GET_EVENT_COUNT 0x30
|
||||
#define IPMI_CMD_SET_EVENT_DESTINATION 0x31
|
||||
#define IPMI_CMD_SET_EVENT_RECEPTION_STATE 0x32
|
||||
#define IPMI_CMD_SEND_ICMB_EVENT_MESSAGE 0x33
|
||||
#define IPMI_CMD_GET_EVENT_DESTINATION 0x34
|
||||
#define IPMI_CMD_GET_EVENT_RECEPTION_STATE 0x35
|
||||
|
||||
/* OEM Commands for Bridge NetFn */
|
||||
/* OEM Commands 0xC0 to 0xFE */
|
||||
|
||||
/* Other Bridge Commands */
|
||||
#define IPMI_CMD_ERROR_REPORT 0xFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_SPEC_H */
|
@ -0,0 +1,92 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
/*****************************************************************************\
|
||||
* Copyright (C) 2009-2015 Lawrence Livermore National Security, LLC.
|
||||
* Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
|
||||
* Written by Albert Chu <chu11@llnl.gov>
|
||||
* LLNL-CODE-413270
|
||||
*
|
||||
* This file is part of Ipmi-Dcmi, tools and libraries to support the
|
||||
* data center manageability interface (DCMI). For details, see
|
||||
* http://www.llnl.gov/linux/.
|
||||
*
|
||||
* Ipmi-Dcmi is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 3 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Ipmi-Dcmi is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with Ipmi-Dcmi. If not, see <http://www.gnu.org/licenses/>.
|
||||
\*****************************************************************************/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_DCMI_SPEC_H
|
||||
#define IPMI_COMP_CODE_DCMI_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* IPMI_CMD_DCMI_GET_POWER_LIMIT */
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_NO_SET_POWER_LIMIT 0x80
|
||||
#define IPMI_COMP_CODE_DCMI_NO_SET_POWER_LIMIT_STR \
|
||||
"No Set Power Limit"
|
||||
|
||||
/* IPMI_CMD_DCMI_SET_POWER_LIMIT */
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_POWER_LIMIT_OUT_OF_RANGE 0x84
|
||||
#define IPMI_COMP_CODE_DCMI_POWER_LIMIT_OUT_OF_RANGE_STR \
|
||||
"Power Limit out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_CORRECTION_TIME_OUT_OF_RANGE 0x85
|
||||
#define IPMI_COMP_CODE_DCMI_CORRECTION_TIME_OUT_OF_RANGE_STR \
|
||||
"Correction Time out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_STATISTICS_REPORTING_PERIOD_OUT_OF_RANGE 0x89 /* not a typo, is 0x89 */
|
||||
#define IPMI_COMP_CODE_DCMI_STATISTICS_REPORTING_PERIOD_OUT_OF_RANGE_STR \
|
||||
"Statistics Reporting Period out of range"
|
||||
|
||||
/* IPMI_CMD_DCMI_GET_ASSET_TAG */
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_BINARY_UNSPECIFIED 0x80
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_BINARY_UNSPECIFIED_STR \
|
||||
"Encoding type in FRU is binary / unspecified"
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_BCD_PLUS 0x81
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_BCD_PLUS_STR \
|
||||
"Encoding type in FRU is BCD Plus"
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_6BIT_ASCII_PACKED 0x82
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_6BIT_ASCII_PACKED_STR \
|
||||
"Encoding type in FRU is 6-bit ASCII Packed"
|
||||
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_SET_TO_ASCII_LATIN1_NOT_ENGLISH 0x83
|
||||
#define IPMI_COMP_CODE_DCMI_ENCODING_TYPE_IN_FRU_IS_SET_TO_ASCII_LATIN1_NOT_ENGLISH_STR \
|
||||
"Encoding type in FRU is set to ASCII+Latin1 but language code is " \
|
||||
"not set to English (indicating data is 2-byte UNICODE)"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_DCMI_SPEC_H */
|
@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#warning ipmi-comp-code-oem-spec.h header file is deprecated
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-comp-code-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-comp-code-oem-fujitsu-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-comp-code-oem-intel-node-manager-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-comp-code-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-comp-code-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_SPEC_H */
|
713
source/freeipmi/usr/include/freeipmi/spec/ipmi-comp-code-spec.h
Normal file
713
source/freeipmi/usr/include/freeipmi/spec/ipmi-comp-code-spec.h
Normal file
@ -0,0 +1,713 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef IPMI_COMP_CODE_SPEC_H
|
||||
#define IPMI_COMP_CODE_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_SUCCESS 0x00
|
||||
#define IPMI_COMP_CODE_COMMAND_SUCCESS_STR \
|
||||
"Command Completed Normally."
|
||||
|
||||
#define IPMI_COMP_CODE_NODE_BUSY 0xC0
|
||||
#define IPMI_COMP_CODE_NODE_BUSY_STR \
|
||||
"Node Busy. Command could not be processed because command " \
|
||||
"processing resources are temporarily unavailable."
|
||||
|
||||
#define IPMI_COMP_CODE_INVALID_COMMAND 0xC1
|
||||
#define IPMI_COMP_CODE_INVALID_COMMAND_STR \
|
||||
"Invalid Command. Used to indicate an unrecognized or unsupported command."
|
||||
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_INVALID_FOR_LUN 0xC2
|
||||
#define IPMI_COMP_CODE_COMMAND_INVALID_FOR_LUN_STR \
|
||||
"Command invalid for given LUN."
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_TIMEOUT 0xC3
|
||||
#define IPMI_COMP_CODE_COMMAND_TIMEOUT_STR \
|
||||
"Timeout while processing command. Response unavailable."
|
||||
|
||||
#define IPMI_COMP_CODE_OUT_OF_SPACE 0xC4
|
||||
#define IPMI_COMP_CODE_OUT_OF_SPACE_STR \
|
||||
"Out of space. Command could not be completed because of a " \
|
||||
"lack of storage space required to execute the given command " \
|
||||
"operation."
|
||||
|
||||
#define IPMI_COMP_CODE_RESERVATION_CANCELLED 0xC5
|
||||
#define IPMI_COMP_CODE_RESERVATION_CANCELLED_STR \
|
||||
"Reservation Canceled or Invalid Reservation ID."
|
||||
|
||||
#define IPMI_COMP_CODE_INVALID_RESERVATION_ID IPMI_COMP_CODE_RESERVATION_CANCELLED
|
||||
#define IPMI_COMP_CODE_INVALID_RESERVATION_ID_STR IPMI_COMP_CODE_RESERVATION_CANCELLED_STR
|
||||
|
||||
#define IPMI_COMP_CODE_REQUEST_DATA_TRUNCATED 0xC6
|
||||
#define IPMI_COMP_CODE_REQUEST_DATA_TRUNCATED_STR \
|
||||
"Request data truncated."
|
||||
|
||||
#define IPMI_COMP_CODE_REQUEST_DATA_LENGTH_INVALID 0xC7
|
||||
#define IPMI_COMP_CODE_REQUEST_DATA_LENGTH_INVALID_STR \
|
||||
"Request data length invalid."
|
||||
|
||||
#define IPMI_COMP_CODE_REQUEST_DATA_LENGTH_LIMIT_EXCEEDED 0xC8
|
||||
#define IPMI_COMP_CODE_REQUEST_DATA_LENGTH_LIMIT_EXCEEDED_STR \
|
||||
"Request data field length limit exceeded."
|
||||
|
||||
#define IPMI_COMP_CODE_PARAMETER_OUT_OF_RANGE 0xC9
|
||||
#define IPMI_COMP_CODE_PARAMETER_OUT_OF_RANGE_STR \
|
||||
"Parameter out of range. One or more parameters in the data " \
|
||||
"field of the Request are out of range. This is different from " \
|
||||
"'Invalid data field' (CCh) code in that it indicates that the " \
|
||||
"erroneous field(s) has a contiguous range of possible values."
|
||||
|
||||
#define IPMI_COMP_CODE_CANNOT_RETURN_REQUESTED_NUMBER_OF_BYTES 0xCA
|
||||
#define IPMI_COMP_CODE_CANNOT_RETURN_REQUESTED_NUMBER_OF_BYTES_STR \
|
||||
"Cannot return number of requested data bytes."
|
||||
|
||||
#define IPMI_COMP_CODE_REQUESTED_SENSOR_DATA_OR_RECORD_NOT_PRESENT 0xCB
|
||||
#define IPMI_COMP_CODE_REQUESTED_SENSOR_DATA_OR_RECORD_NOT_PRESENT_STR \
|
||||
"Requested Sensor, data, or record not present."
|
||||
|
||||
#define IPMI_COMP_CODE_INVALID_DATA_FIELD_IN_REQUEST 0xCC
|
||||
#define IPMI_COMP_CODE_INVALID_DATA_FIELD_IN_REQUEST_STR \
|
||||
"Invalid data field in Request"
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_ILLEGAL_FOR_SENSOR_OR_RECORD_TYPE 0xCD
|
||||
#define IPMI_COMP_CODE_COMMAND_ILLEGAL_FOR_SENSOR_OR_RECORD_TYPE_STR \
|
||||
"Command illegal for specified sensor or record type."
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_RESPONSE_COULD_NOT_BE_PROVIDED 0xCE
|
||||
#define IPMI_COMP_CODE_COMMAND_RESPONSE_COULD_NOT_BE_PROVIDED_STR \
|
||||
"Command response could not be provided."
|
||||
|
||||
#define IPMI_COMP_CODE_CANNOT_EXECUTE_DUPLICATE_REQUEST 0xCF
|
||||
#define IPMI_COMP_CODE_CANNOT_EXECUTE_DUPLICATE_REQUEST_STR \
|
||||
"Cannot execute duplicated request. This completion code is " \
|
||||
"for devices which cannot return the response that was returned " \
|
||||
"for the original instance of the request. Such devices should " \
|
||||
"provide separate commands that allow the completion status of " \
|
||||
"the original request to be determined. An Event Receiver does not " \
|
||||
"use this completion code, but returns the 00h completion code in " \
|
||||
"the response to (valid) duplicated requests."
|
||||
|
||||
#define IPMI_COMP_CODE_SDR_REPOSITORY_IN_UPDATE_MODE 0xD0
|
||||
#define IPMI_COMP_CODE_SDR_REPOSITORY_IN_UPDATE_MODE_STR \
|
||||
"Command response could not be provided. SDR Repository in " \
|
||||
"update mode."
|
||||
|
||||
#define IPMI_COMP_CODE_DEVICE_IN_FIRMWARE_UPDATE_MODE 0xD1
|
||||
#define IPMI_COMP_CODE_DEVICE_IN_FIRMWARE_UPDATE_MODE_STR \
|
||||
"Command response could not be provided. Device in firmware " \
|
||||
"update mode."
|
||||
|
||||
#define IPMI_COMP_CODE_BMC_INITIALIZATION_IN_PROGRESS 0xD2
|
||||
#define IPMI_COMP_CODE_BMC_INITIALIZATION_IN_PROGRESS_STR \
|
||||
"Command response could not be provided. BMC initialization or " \
|
||||
"initialization agent in progress."
|
||||
|
||||
#define IPMI_COMP_CODE_DESTINATION_UNAVAILABLE 0xD3
|
||||
#define IPMI_COMP_CODE_DESTINATION_UNAVAILABLE_STR \
|
||||
"Destination unavailable. Cannot deliver request to selected " \
|
||||
"destination. E.g. this code can be returned if a request message " \
|
||||
"is targeted to SMS, but receive message queue reception is disabled " \
|
||||
"for the particular channel."
|
||||
|
||||
#define IPMI_COMP_CODE_INSUFFICIENT_PRIVILEGE_LEVEL 0xD4
|
||||
#define IPMI_COMP_CODE_INSUFFICIENT_PRIVILEGE_LEVEL_STR \
|
||||
"Cannot execute command due to insufficient privilege level or other " \
|
||||
"security-based restriction (e.g. disabled for 'firmware firewall')."
|
||||
|
||||
#define IPMI_COMP_CODE_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Cannot execute command. Command, or request parameter(s), not " \
|
||||
"supported in present state."
|
||||
|
||||
#define IPMI_COMP_CODE_REQUEST_PARAMETER_ILLEGAL 0xD6
|
||||
#define IPMI_COMP_CODE_REQUEST_PARAMETER_ILLEGAL_STR \
|
||||
"Cannot execute command. Parameter is illegal because command " \
|
||||
"sub-function has been disabled or is unavailable " \
|
||||
"(e.g. disabled for 'firmware firewall')."
|
||||
|
||||
#define IPMI_COMP_CODE_UNSPECIFIED_ERROR 0xFF
|
||||
#define IPMI_COMP_CODE_UNSPECIFIED_ERROR_STR \
|
||||
"Unspecified error."
|
||||
|
||||
/* DEVICE-SPECIFIC (OEM) CODES 01h-7Eh
|
||||
This range is used for command-specific codes that are also
|
||||
specific for a particular device and version. A-priori knowledge of
|
||||
the device command set is required for interpretation of these
|
||||
codes. */
|
||||
|
||||
/* COMMAND-SPECIFIC CODES 80h-BEh 80h-BEh
|
||||
Standard command-specific codes. This range is reserved for
|
||||
command-specific completion codes for commands specified in this
|
||||
document. */
|
||||
|
||||
/*
|
||||
* IPMI Device "Global Commands"
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_SET_COMMAND_ENABLES */
|
||||
#define IPMI_COMP_CODE_SET_COMMAND_ENABLES_ATTMPT_TO_ENABLE_AN_UNSUPPORTED_OR_UNCONFIGURABLE_COMMAND 0x80
|
||||
#define IPMI_COMP_CODE_SET_COMMAND_ENABLES_ATTMPT_TO_ENABLE_AN_UNSUPPORTED_OR_UNCONFIGURABLE_COMMAND_STR \
|
||||
"attempt to enable an unsupported or un-configurable command"
|
||||
|
||||
/* IPMI_CMD_SET_COMMAND_SUB_FUNCTION_ENABLES */
|
||||
#define IPMI_COMP_CODE_SET_COMMAND_SUB_FUNCTION_ENABLES_ATTMPT_TO_ENABLE_AN_UNSUPPORTED_OR_UNCONFIGURABLE_COMMAND 0x80
|
||||
#define IPMI_COMP_CODE_SET_COMMAND_SUB_FUNCTION_ENABLES_ATTMPT_TO_ENABLE_AN_UNSUPPORTED_OR_UNCONFIGURABLE_COMMAND_STR \
|
||||
"attempt to enable an unsupported or un-configurable command"
|
||||
|
||||
/* IPMI_CMD_GET_COMMAND_SUB_FUNCTION_ENABLES */
|
||||
#define IPMI_COMP_CODE_GET_COMMAND_SUB_FUNCTION_ENABLES_ATTMPT_TO_ENABLE_AN_UNSUPPORTED_OR_UNCONFIGURABLE_COMMAND 0x80
|
||||
#define IPMI_COMP_CODE_GET_COMMAND_SUB_FUNCTION_ENABLES_ATTMPT_TO_ENABLE_AN_UNSUPPORTED_OR_UNCONFIGURABLE_COMMAND_STR \
|
||||
"attempt to enable an unsupported or un-configurable command"
|
||||
|
||||
/*
|
||||
* BMC Watchdog Timer Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_RESET_WATCHDOG_TIMER */
|
||||
#define IPMI_COMP_CODE_RESET_WATCHDOG_TIMER_ATTEMPT_TO_START_UNINITIALIZED_WATCHDOG 0x80
|
||||
#define IPMI_COMP_CODE_RESET_WATCHDOG_TIMER_ATTEMPT_TO_START_UNINITIALIZED_WATCHDOG_STR \
|
||||
"Attempt to start un-initialized watchdog."
|
||||
|
||||
/*
|
||||
* BMC Device and Messaging Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_GET_MESSAGE */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_MESSAGE_DATA_NOT_AVAILABLE 0x80
|
||||
#define IPMI_COMP_CODE_GET_MESSAGE_DATA_NOT_AVAILABLE_STR \
|
||||
"data not available (queue/buffer empty)"
|
||||
|
||||
/* IPMI_CMD_SEND_MESSAGE */
|
||||
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_INVALID_SESSION_HANDLE 0x80
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_INVALID_SESSION_HANDLE_STR \
|
||||
"Invalid Session Handle. The session handle does not match up with any " \
|
||||
"currently active sessions for this channel."
|
||||
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_LOST_ARBITRATION 0x81
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_LOST_ARBITRATION_STR \
|
||||
"Lost Arbitration"
|
||||
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_BUS_ERROR 0x82
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_BUS_ERROR_STR \
|
||||
"Bus Error"
|
||||
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_NAK_ON_WRITE 0x83
|
||||
#define IPMI_COMP_CODE_SEND_MESSAGE_NAK_ON_WRITE_STR \
|
||||
"NAK on Write"
|
||||
|
||||
/* IPMI_CMD_MASTER_WRITE_READ */
|
||||
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_LOST_ARBITRATION 0x81
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_LOST_ARBITRATION_STR \
|
||||
"Lost Arbitration"
|
||||
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_BUS_ERROR 0x82
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_BUS_ERROR_STR \
|
||||
"Bus Error"
|
||||
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_NAK_ON_WRITE 0x83
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_NAK_ON_WRITE_STR \
|
||||
"NAK on Write"
|
||||
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_TRUNCATED_READ 0x84
|
||||
#define IPMI_COMP_CODE_MASTER_WRITE_READ_TRUNCATED_READ_STR \
|
||||
"Truncated Read"
|
||||
|
||||
/* IPMI_CMD_SET_SYSTEM_INFO_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_INVALID_SET_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_INVALID_SET_IN_PROGRESS_STR \
|
||||
"attempt to set the 'set in progress' value (in parameter #0) " \
|
||||
"when not int the 'set complete' state."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_READ_WRITE_ONLY_PARAMETER 0x83
|
||||
#define IPMI_COMP_CODE_SET_SYSTEM_INFO_PARAMETERS_READ_WRITE_ONLY_PARAMETER_STR \
|
||||
"attempt to read write-only parameter"
|
||||
|
||||
/* IPMI_CMD_GET_SYSTEM_INFO_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_SYSTEM_INFO_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_SYSTEM_INFO_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
/* IPMI_CMD_GET_SESSION_CHALLENGE */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_SESSION_CHALLENGE_INVALID_USERNAME 0x81
|
||||
#define IPMI_COMP_CODE_GET_SESSION_CHALLENGE_INVALID_USERNAME_STR \
|
||||
"Invalid user name"
|
||||
|
||||
#define IPMI_COMP_CODE_GET_SESSION_CHALLENGE_NULL_USERNAME_NOT_ENABLED 0x82
|
||||
#define IPMI_COMP_CODE_GET_SESSION_CHALLENGE_NULL_USERNAME_NOT_ENABLED_STR \
|
||||
"Null user name (User 1) not enabled"
|
||||
|
||||
/* IPMI_CMD_ACTIVATE_SESSION */
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_NO_SESSION_SLOT_AVAILABLE 0x81
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_NO_SESSION_SLOT_AVAILABLE_STR \
|
||||
"No session slot available (BMC cannot accept any more sessions)"
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_NO_SLOT_AVAILABLE_FOR_GIVEN_USER 0x82
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_NO_SLOT_AVAILABLE_FOR_GIVEN_USER_STR \
|
||||
"No slot available for given user. (Limit of user sessions " \
|
||||
"allowed under that name has been reached)"
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_NO_SLOT_AVAILABLE_TO_SUPPORT_USER 0x83
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_NO_SLOT_AVAILALBE_TO_SUPPORT_USER_STR \
|
||||
"No slot available to support user due to maximum privilege " \
|
||||
"capability. (An implementation may only be able to support " \
|
||||
"a certain number of sessions based on what authentication " \
|
||||
"resources are required. For example, if User Level " \
|
||||
"Authentication is disabled, an implementation may be able " \
|
||||
"to allow a larger number of users that are limited to User " \
|
||||
"Level privilege, than users that require higher privilege."
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_SESSION_SEQ_NUM_OUT_OF_RANGE 0x84
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_SESSION_SEQ_NUM_OUT_OF_RANGE_STR \
|
||||
"Session sequence number out-of-range"
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_INVALID_SESSION_ID 0x85
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_INVALID_SESSION_ID_STR \
|
||||
"Invalid session ID in request"
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_EXCEEDS_PRIVILEGE_LEVEL 0x86
|
||||
#define IPMI_COMP_CODE_ACTIVATE_SESSION_EXCEEDS_PRIVILEGE_LEVEL_STR \
|
||||
"Requested maximum privilege level exceeds user and/or " \
|
||||
"channel privilege limit"
|
||||
|
||||
/* IPMI_CMD_SET_SESSION_PRIVILEGE_LEVEL */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SESSION_PRIVILEGE_LEVEL_REQUESTED_LEVEL_NOT_AVAILABLE_FOR_USER 0x81
|
||||
#define IPMI_COMP_CODE_SET_SESSION_PRIVILEGE_LEVEL_REQUESTED_LEVEL_NOT_AVAILABLE_FOR_USER_STR \
|
||||
"Requested level not available for this user"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SESSION_PRIVILEGE_LEVEL_REQUESTED_LEVEL_EXCEEDS_USER_PRIVILEGE_LIMIT 0x82
|
||||
#define IPMI_COMP_CODE_SET_SESSION_PRIVILEGE_LEVEL_REQUESTED_LEVEL_EXCEEDS_USER_PRIVILEGE_LIMIT_STR \
|
||||
"Requested level exceeds Channel and/or User Privilege Limit"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SESSION_PRIVILEGE_LEVEL_CANNOT_DISABLE_USER_LEVEL_AUTHENTICATION 0x83
|
||||
#define IPMI_COMP_CODE_SET_SESSION_PRIVILEGE_LEVEL_CANNOT_DISABLE_USER_LEVEL_AUTHENTICATION_STR \
|
||||
"Cannot disable User Level authentication"
|
||||
|
||||
/* IPMI_CMD_CLOSE_SESSION */
|
||||
|
||||
#define IPMI_COMP_CODE_CLOSE_SESSION_INVALID_SESSION_ID_IN_REQUEST 0x87
|
||||
#define IPMI_COMP_CODE_CLOSE_SESSION_INVALID_SESSION_ID_IN_REQUEST_STR \
|
||||
"Invalid session ID in request"
|
||||
|
||||
/* IPMI_CMD_SET_CHANNEL_ACCESS */
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_ACCESS_SET_NOT_SUPPORTED_ON_SELECTED_CHANNEL 0x82
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_ACCESS_SET_NOT_SUPPORTED_ON_SELECTED_CHANNEL_STR \
|
||||
"set not supported on selected channel"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_ACCESS_ACCESS_MODE_NOT_SUPPORTED 0x83
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_ACCESS_ACCESS_MODE_NOT_SUPPORTED_STR \
|
||||
"access mode not supported"
|
||||
|
||||
/* IPMI_CMD_GET_CHANNEL_ACCESS */
|
||||
#define IPMI_COMP_CODE_GET_CHANNEL_ACCESS_COMMAND_NOT_SUPPORTED_FOR_SELECTED_CHANNEL 0x82
|
||||
#define IPMI_COMP_CODE_GET_CHANNEL_ACCESS_COMMAND_NOT_SUPPORTED_FOR_SELECTED_CHANNEL_STR \
|
||||
"command not supported for selected channel"
|
||||
|
||||
/* IPMI_CMD_SET_USER_PASSWORD_COMMAND */
|
||||
#define IPMI_COMP_CODE_SET_USER_PASSWORD_COMMAND_PASSWORD_TEST_FAILED_PASSWORD_SIZE_CORRECT 0x80
|
||||
#define IPMI_COMP_CODE_SET_USER_PASSWORD_COMMAND_PASSWORD_TEST_FAILED_PASSWORD_SIZE_CORRECT_STR \
|
||||
"password test failed. Password size correct, but password " \
|
||||
"data does not match stored value."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_USER_PASSWORD_COMMAND_PASSWORD_TEST_FAILED_PASSWORD_SIZE_INCORRECT 0x81
|
||||
#define IPMI_COMP_CODE_SET_USER_PASSWORD_COMMAND_PASSWORD_TEST_FAILED_PASSWORD_SIZE_INCORRECT_STR \
|
||||
"password test failed. Wrong password size was used."
|
||||
|
||||
/* IPMI_CMD_ACTIVATE_PAYLOAD */
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_PAYLOAD_ALREADY_ACTIVE_ON_ANOTHER_SESSION 0x80
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_PAYLOAD_ALREADY_ACTIVE_ON_ANOTHER_SESSION_STR \
|
||||
"Payload already active on another session"
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_PAYLOAD_TYPE_IS_DISABLED 0x81
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_PAYLOAD_TYPE_IS_DISABLED_STR \
|
||||
"Payload type disabled. Given payload type is not configured " \
|
||||
"to be enabled for activation."
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_PAYLOAD_ACTIVATION_LIMIT_REACHED 0x82
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_PAYLOAD_ACTIVATION_LIMIT_REACHED_STR \
|
||||
"Payload activation limit reached. Cannot activate given payload type " \
|
||||
"because the maximum number of simultaneous instances of that payload type " \
|
||||
"are already running."
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_CANNOT_ACTIVATE_PAYLOAD_WITH_ENCRYPTION 0x83
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_CANNOT_ACTIVATE_PAYLOAD_WITH_ENCRYPTION_STR \
|
||||
"Cannot activate payload with encryption."
|
||||
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_CANNOT_ACTIVATE_PAYLOAD_WITHOUT_ENCRYPTION 0x84
|
||||
#define IPMI_COMP_CODE_ACTIVATE_PAYLOAD_CANNOT_ACTIVATE_PAYLOAD_WITHOUT_ENCRYPTION_STR \
|
||||
"Cannot activate payload without encryption. BMC requires encryption " \
|
||||
"for all payloads for given privilege level."
|
||||
|
||||
/* IPMI_CMD_DEACTIVATE_PAYLOAD */
|
||||
#define IPMI_COMP_CODE_DEACTIVATE_PAYLOAD_PAYLOAD_ALREADY_DEACTIVATED 0x80
|
||||
#define IPMI_COMP_CODE_DEACTIVATE_PAYLOAD_PAYLOAD_ALREADY_DEACTIVATED_STR \
|
||||
"Payload already deactivated"
|
||||
|
||||
#define IPMI_COMP_CODE_DEACTIVATE_PAYLOAD_PAYLOAD_TYPE_IS_DISABLED 0x81
|
||||
#define IPMI_COMP_CODE_DEACTIVATE_PAYLOAD_PAYLOAD_TYPE_IS_DISABLED_STR \
|
||||
"Payload type disabled. Given payload type is not configured " \
|
||||
"to be enabled for activation."
|
||||
|
||||
/* IPMI_CMD_GET_CHANNEL_PAYLOAD_VERSION */
|
||||
#define IPMI_COMP_CODE_GET_CHANNEL_PAYLOAD_VERSION_PAYLOAD_TYPE_NOT_AVAILABLE_ON_GIVEN_CHANNEL 0x80
|
||||
#define IPMI_COMP_CODE_GET_CHANNEL_PAYLOAD_VERSION_PAYLOAD_TYPE_NOT_AVAILABLE_ON_GIVEN_CHANNEL_STR \
|
||||
"Payload type not available on given channel"
|
||||
|
||||
/* IPMI_CMD_GET_CHANNEL_OEM_PAYLOAD_INFO */
|
||||
#define IPMI_COMP_CODE_GET_CHANNEL_OEM_PAYLOAD_INFO_OEM_PAYLOAD_IANA_OR_PAYLOAD_ID_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_CHANNEL_OEM_PAYLOAD_INFO_OEM_PAYLOAD_IANA_OR_PAYLOAD_ID_NOT_SUPPORTED_STR \
|
||||
"OEM Payload IANA and/or Payload ID not supported"
|
||||
|
||||
/* IPMI_CMD_SUSPEND_RESUME_PAYLOAD_ENCRYPTION */
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_OPERATION_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_OPERATION_NOT_SUPPORTED_STR \
|
||||
"Operation not supported for given payload type."
|
||||
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_OPERATION_NOT_ALLOWED_UNDER_PRESENT_CONFIGURATION 0x81
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_OPERATION_NOT_ALLOWED_UNDER_PRESENT_CONFIGURATION_STR \
|
||||
"Operation now allowed under present configuration for given payload type."
|
||||
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_ENCRYPTION_IS_NOT_AVAILABLE_FOR_SESSION 0x82
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_ENCRYPTION_IS_NOT_AVAILABLE_FOR_SESSION_STR \
|
||||
"Encryption is not available for session that payload type is active under."
|
||||
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_PAYLOAD_INSTANCE_NOT_PRESENTLY_ACTIVE 0x83
|
||||
#define IPMI_COMP_CODE_SUSPEND_RESUME_PAYLOAD_ENCRYPTION_PAYLOAD_INSTANCE_NOT_PRESENTLY_ACTIVE_STR \
|
||||
"The payload instance is not presently active."
|
||||
|
||||
/* IPMI_CMD_SET_CHANNEL_SECURITY_KEYS */
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_CANNOT_PERFORM_SET_CONFIRM_KEY_IS_LOCKED 0x80
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_CANNOT_PERFORM_SET_CONFIRM_KEY_IS_LOCKED_STR \
|
||||
"Cannot perform set/confirm. Key is locked"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_INSUFFICIENT_KEY_BYTES 0x81
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_INSUFFICIENT_KEY_BYTES_STR \
|
||||
"insufficient key bytes"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_TOO_MANY_KEY_BYTES 0x82
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_TOO_MANY_KEY_BYTES_STR \
|
||||
"too many key bytes"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_KEY_VALUE_DOES_NOT_MEET_CRITERIA 0x83
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_KEY_VALUE_DOES_NOT_MEET_CRITERIA_STR \
|
||||
"key value does not meet criteria for specified type of key"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_KR_IS_NOT_USED 0x84
|
||||
#define IPMI_COMP_CODE_SET_CHANNEL_SECURITY_KEYS_KR_IS_NOT_USED_STR \
|
||||
"K_R is not used. BMC uses a random number generation approach " \
|
||||
"that does not require a K_R value"
|
||||
|
||||
/*
|
||||
* Chassis Device Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_SET_SYSTEM_BOOT_OPTIONS */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_INVALID_SET_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_INVALID_SET_IN_PROGRESS_STR \
|
||||
"attempt to set the 'set in progress' value (in parameter #0) " \
|
||||
"when not int the 'set complete' state."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_READ_WRITE_ONLY_PARAMETER 0x83
|
||||
#define IPMI_COMP_CODE_SET_BOOT_OPTIONS_READ_WRITE_ONLY_PARAMETER_STR \
|
||||
"attempt to read write-only parameter"
|
||||
|
||||
/* IPMI_CMD_GET_SYSTEM_BOOT_OPTIONS */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_BOOT_OPTIONS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_BOOT_OPTIONS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
/*
|
||||
* Event Commands
|
||||
*/
|
||||
|
||||
/*
|
||||
* PEF and Alerting Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_SET_PEF_CONFIGURATION_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_INVALID_SET_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_INVALID_SET_IN_PROGRESS_STR \
|
||||
"attempt to set the 'set in progress' value (in parameter #0) " \
|
||||
"when not int the 'set complete' state."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_READ_WRITE_ONLY_PARAMETER 0x83
|
||||
#define IPMI_COMP_CODE_SET_PEF_CONFIGURATION_PARAMETERS_READ_WRITE_ONLY_PARAMETER_STR \
|
||||
"attempt to read write-only parameter"
|
||||
|
||||
/* IPMI_CMD_GET_PEF_CONFIGURATION_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_PEF_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_PEF_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
/* IPMI_CMD_SET_LAST_PROCESSED_EVENT_ID */
|
||||
#define IPMI_COMP_CODE_SET_LAST_PROCESSED_EVENT_ID_SEL_ERASE_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_LAST_PROCESSED_EVENT_ID_SEL_ERASE_IN_PROGRESS_STR \
|
||||
"cannot execute command, SEL erase in progress"
|
||||
|
||||
/* IPMI_CMD_GET_LAST_PROCESSED_EVENT_ID */
|
||||
#define IPMI_COMP_CODE_GET_LAST_PROCESSED_EVENT_ID_SEL_ERASE_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_GET_LAST_PROCESSED_EVENT_ID_SEL_ERASE_IN_PROGRESS_STR \
|
||||
"cannot execute command, SEL erase in progress"
|
||||
|
||||
/* IPMI_CMD_ALERT_IMMEDIATE */
|
||||
#define IPMI_COMP_CODE_ALERT_ALREADY_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_ALERT_ALREADY_IN_PROGRESS_STR \
|
||||
"Alert Immediate rejected due to alert already in progress"
|
||||
|
||||
#define IPMI_COMP_CODE_ALERT_IPMI_MESSAGING_SESSION_ACTIVE 0x82
|
||||
#define IPMI_COMP_CODE_ALERT_IPMI_MESSAGING_SESSION_ACTIVE_STR \
|
||||
"Alert Immedate rejected due to IPMI messaging session active on this channel"
|
||||
|
||||
/*
|
||||
* Sensor Device Commands
|
||||
*/
|
||||
/* IPMI_CMD_SET_SENSOR_READING_AND_EVENT_STATUS */
|
||||
#define IPMI_COMP_CODE_SENSOR_READING_OR_STATUS_NOT_SETTABLE 0x80
|
||||
#define IPMI_COMP_CODE_SENSOR_READING_OR_STATUS_NOT_SETTABLE_STR \
|
||||
"Attempt to change reading or set or clear status bits that " \
|
||||
"are not settable via this command"
|
||||
|
||||
#define IPMI_COMP_CODE_EVENT_DATA_BYTES_NOT_SETTABLE 0x81
|
||||
#define IPMI_COMP_CODE_EVENT_DATA_BYTES_NOT_SETTABLE_STR \
|
||||
"Attempted to set Event Data Bytes, but setting Event Data Bytes is not " \
|
||||
"supported for this sensor."
|
||||
|
||||
/*
|
||||
* FRU Device Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_READ_FRU_DATA */
|
||||
#define IPMI_COMP_CODE_READ_FRU_DATA_FRU_DEVICE_BUSY 0x81
|
||||
#define IPMI_COMP_CODE_READ_FRU_DATA_FRU_DEVICE_BUSY_STR \
|
||||
"FRU device busy. The requested cannot be completed because the " \
|
||||
"implementation of the logical FRU device is in a state where the FRU " \
|
||||
"information is temporarily unavailable. This could be due to a " \
|
||||
"condition such as a loss of arbitration if the FRU is implemented as a " \
|
||||
"device on a shared bus."
|
||||
|
||||
/* IPMI_CMD_WRITE_FRU_DATA */
|
||||
#define IPMI_COMP_CODE_WRITE_FRU_DATA_WRITE_PROTECTED_OFFSET 0x80
|
||||
#define IPMI_COMP_CODE_WRITE_FRU_DATA_WRITE_PROTECTED_OFFSET_STR \
|
||||
"write-protected offset. Cannot complete write because one or more " \
|
||||
"bytes of FRU data are to a write-protected offset in the FRU device. " \
|
||||
"Note that an implementation may have allowed a 'partial write' of the " \
|
||||
"data to occur."
|
||||
|
||||
#define IPMI_COMP_CODE_WRITE_FRU_DATA_FRU_DEVICE_BUSY 0x81
|
||||
#define IPMI_COMP_CODE_WRITE_FRU_DATA_FRU_DEVICE_BUSY_STR \
|
||||
"FRU device busy. The requested cannot be completed because the " \
|
||||
"implementation of the logical FRU device is in a state where the FRU " \
|
||||
"information is temporarily unavailable. This could be due to a " \
|
||||
"condition such as a loss of arbitration if the FRU is implemented as a " \
|
||||
"device on a shared bus."
|
||||
|
||||
/*
|
||||
* SDR Device Commands
|
||||
*/
|
||||
|
||||
/*
|
||||
* SEL Device Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_GET_SEL_ENTRY */
|
||||
#define IPMI_COMP_CODE_GET_SEL_ENTRY_SEL_ERASE_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_GET_SEL_ENTRY_SEL_ERASE_IN_PROGRESS_STR \
|
||||
"cannot execute command, SEL erase in progress"
|
||||
|
||||
/* IPMI_CMD_DELETE_SEL_ENTRY */
|
||||
#define IPMI_COMP_CODE_DELETE_SEL_ENTRY_SEL_OPERATION_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_DELETE_SEL_ENTRY_SEL_OPERATION_NOT_SUPPORTED_STR \
|
||||
"Operation not supported for this Record Type"
|
||||
|
||||
#define IPMI_COMP_CODE_DELETE_SEL_ENTRY_SEL_ERASE_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_DELETE_SEL_ENTRY_SEL_ERASE_IN_PROGRESS_STR \
|
||||
"cannot execute command, SEL erase in progress"
|
||||
|
||||
/*
|
||||
* LAN Device Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_SET_LAN_CONFIGURATION_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_INVALID_SET_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_INVALID_SET_IN_PROGRESS_STR \
|
||||
"attempt to set the 'set in progress' value (in parameter #0) " \
|
||||
"when not int the 'set complete' state."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_READ_WRITE_ONLY_PARAMETER 0x83
|
||||
#define IPMI_COMP_CODE_SET_LAN_CONFIGURATION_PARAMETERS_READ_WRITE_ONLY_PARAMETER_STR \
|
||||
"attempt to read write-only parameter"
|
||||
|
||||
/* IPMI_CMD_GET_LAN_CONFIGURATION_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_LAN_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_LAN_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
/*
|
||||
* Serial/Modem Device Commands
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_SET_SERIAL_MODEM_CONFIGURATION */
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_INVALID_SET_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_INVALID_SET_IN_PROGRESS_STR \
|
||||
"attempt to set the 'set in progress' value (in parameter #0) " \
|
||||
"when not int the 'set complete' state."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_READ_WRITE_ONLY_PARAMETER 0x83
|
||||
#define IPMI_COMP_CODE_SET_SERIAL_MODEM_CONFIGURATION_READ_WRITE_ONLY_PARAMETER_STR \
|
||||
"attempt to read write-only parameter"
|
||||
|
||||
/* IPMI_CMD_GET_SERIAL_MODEM_CONFIGURATION */
|
||||
#define IPMI_COMP_CODE_GET_SERIAL_MODEM_CONFIGURATION_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_SERIAL_MODEM_CONFIGURATION_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
/* IPMI_CMD_SET_SOL_CONFIGURATION_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_INVALID_SET_IN_PROGRESS 0x81
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_INVALID_SET_IN_PROGRESS_STR \
|
||||
"attempt to set the 'set in progress' value (in parameter #0) " \
|
||||
"when not int the 'set complete' state."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_READ_WRITE_ONLY_PARAMETER 0x83
|
||||
#define IPMI_COMP_CODE_SET_SOL_CONFIGURATION_PARAMETERS_READ_WRITE_ONLY_PARAMETER_STR \
|
||||
"attempt to read write-only parameter"
|
||||
|
||||
/* IPMI_CMD_GET_SOL_CONFIGURATION_PARAMETERS */
|
||||
|
||||
#define IPMI_COMP_CODE_GET_SOL_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_SOL_CONFIGURATION_PARAMETERS_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
/*
|
||||
* Bridge Management Commands (ICMB)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Discovery Commands (ICMB)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Bridging Commands (ICMB)
|
||||
*/
|
||||
|
||||
/*
|
||||
* Event Commands (ICMB)
|
||||
*/
|
||||
|
||||
/*
|
||||
* OEM Commands for Bridge NetFN
|
||||
*/
|
||||
|
||||
/*
|
||||
* OEM Bridge Commands
|
||||
*/
|
||||
|
||||
#define IPMI_COMP_CODE_GENERIC_COMPLETION_CODES_MIN 0xC0
|
||||
#define IPMI_COMP_CODE_GENERIC_COMPLETION_CODES_MAX 0xFF
|
||||
|
||||
#define IPMI_COMP_CODE_GENERIC_COMPLETION_CODES(__comp_code) \
|
||||
(((__comp_code) == IPMI_COMP_CODE_COMMAND_SUCCESS \
|
||||
|| ((__comp_code) >= IPMI_COMP_CODE_GENERIC_COMPLETION_CODES_MIN \
|
||||
&& (__comp_code) <= IPMI_COMP_CODE_GENERIC_COMPLETION_CODES_MAX)) ? 1 : 0)
|
||||
|
||||
#define IPMI_COMP_CODE_DEVICE_SPECIFIC_CODES_MIN 0x01
|
||||
#define IPMI_COMP_CODE_DEVICE_SPECIFIC_CODES_MAX 0x7E
|
||||
|
||||
#define IPMI_COMP_CODE_DEVICE_SPECIFIC_CODES(__comp_code) \
|
||||
(((__comp_code) >= IPMI_COMP_CODE_DEVICE_SPECIFIC_CODES_MIN \
|
||||
&& (__comp_code) <= IPMI_COMP_CODE_DEVICE_SPECIFIC_CODES_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_SPECIFIC_CODES_MIN 0x80
|
||||
#define IPMI_COMP_CODE_COMMAND_SPECIFIC_CODES_MAX 0xBE
|
||||
|
||||
#define IPMI_COMP_CODE_COMMAND_SPECIFIC_CODES(__comp_code) \
|
||||
(((__comp_code) >= IPMI_COMP_CODE_COMMAND_SPECIFIC_CODES_MIN \
|
||||
&& (__comp_code) <= IPMI_COMP_CODE_COMMAND_SPECIFIC_CODES_MAX) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_SPEC_H */
|
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_DEVICE_TYPES_OEM_SPEC_H
|
||||
#define IPMI_DEVICE_TYPES_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#warning ipmi-device-types-oem-spec.h header file is deprecated
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_DEVICE_TYPES_OEM_SPEC_H */
|
@ -0,0 +1,284 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_DEVICE_TYPES_SPEC_H
|
||||
#define IPMI_DEVICE_TYPES_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Note that the macros are not in sequential order, per spec table 43-12 */
|
||||
|
||||
#define IPMI_DEVICE_TYPE_DS1624_TEMPERATURE_SENSOR_EEPROM_OR_EQUIVALENT 0x02
|
||||
#define IPMI_DEVICE_TYPE_DS1621_TEMPERATURE_SENSOR_OR_EQUIVALENT 0x03
|
||||
#define IPMI_DEVICE_TYPE_LM75_TEMPERATURE_SENSOR_OR_EQUIVALENT 0x04
|
||||
#define IPMI_DEVICE_TYPE_HECETA_ASIC_OR_SIMILAR 0x05
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C01_OR_EQUIVALENT 0x08
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C02_OR_EQUIVALENT 0x09
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C04_OR_EQUIVALENT 0x0A
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C08_OR_EQUIVALENT 0x0B
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C16_OR_EQUIVALENT 0x0C
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C17_OR_EQUIVALENT 0x0D
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C32_OR_EQUIVALENT 0x0E
|
||||
#define IPMI_DEVICE_TYPE_EEPROM_24C64_OR_EQUIVALENT 0x0F
|
||||
#define IPMI_DEVICE_TYPE_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER 0x10
|
||||
#define IPMI_DEVICE_TYPE_PCF_8570_256_BYTE_RAM_OR_EQUIVALENT 0x14
|
||||
#define IPMI_DEVICE_TYPE_PCF_8573_CLOCK_CALENDAR_OR_EQUIVALENT 0x15
|
||||
#define IPMI_DEVICE_TYPE_PCF_8574A_IO_PORT_OR_EQUIVALENT 0x16
|
||||
#define IPMI_DEVICE_TYPE_PCF_8583_CLOCK_CALENDAR_OR_EQUIVALENT 0x17
|
||||
#define IPMI_DEVICE_TYPE_PCF_8593_CLOCK_CALENDAR_OR_EQUIVALENT 0x18
|
||||
#define IPMI_DEVICE_TYPE_CLOCK_CALENDAR_TYPE_NOT_SPECIFIED 0x19
|
||||
#define IPMI_DEVICE_TYPE_PCF_8591_AD_DA_CONVERTER_OR_EQUIVALENT 0x1A
|
||||
#define IPMI_DEVICE_TYPE_IO_PORT_SPECIFIC_DEVICE_NOT_SPECIFIED 0x1B
|
||||
#define IPMI_DEVICE_TYPE_AD_CONVERTER_SPECIFIC_DEVICE_NOT_SPECIFIED 0x1C
|
||||
#define IPMI_DEVICE_TYPE_DA_CONVERTER_SPECIFIC_DEVICE_NOT_SPECIFIED 0x1D
|
||||
#define IPMI_DEVICE_TYPE_AD_DA_CONVERTER_SPECIFIC_DEVICE_NOT_SPECIFIED 0x1E
|
||||
#define IPMI_DEVICE_TYPE_LCD_CONTROLLER_DRIVER_SPECIFIC_DEVICE_NOT_SPECIFIED 0x1F
|
||||
#define IPMI_DEVICE_TYPE_CORE_LOGIC_DEVICE_SPECIFIC_DEVICE_NOT_SPECIFIED 0x20
|
||||
#define IPMI_DEVICE_TYPE_LMC6874_INTELLIGENT_BATTERY_CONTROLLER_OR_EQUIVALENT 0x21
|
||||
#define IPMI_DEVICE_TYPE_INTELLIGENT_BATTERY_CONTROLLER_SPECIFIC_DEVICE_NOT_SPECIFIED 0x22
|
||||
#define IPMI_DEVICE_TYPE_COMBO_MANAGEMENT_ASIC_SPECIFIC_DEVICE_NOT_SPECIFIED 0x23
|
||||
#define IPMI_DEVICE_TYPE_MAXIM_1617_TEMPERATURE_SENSOR 0x24
|
||||
#define IPMI_DEVICE_TYPE_OTHER_UNSPECIFIED_DEVICE 0xBF
|
||||
#define IPMI_DEVICE_TYPE_OEM_MIN 0xC0
|
||||
#define IPMI_DEVICE_TYPE_OEM_MAX 0xFF
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_DS1624_TEMPERATURE_SENSOR_EEPROM_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_DS1621_TEMPERATURE_SENSOR_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_LM75_TEMPERATURE_SENSOR_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_HECETA_ASIC_OR_SIMILAR_HECETA_1 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_HECETA_ASIC_OR_SIMILAR_HECETA_2 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_HECETA_ASIC_OR_SIMILAR_LM80 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_HECETA_ASIC_OR_SIMILAR_HECETA_3 0x03
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_HECETA_ASIC_OR_SIMILAR_HECETA_4 0x04
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_HECETA_ASIC_OR_SIMILAR_HECETA_5 0x05
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C01_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C01_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C01_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C01_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C02_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C02_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C02_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C02_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C04_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C04_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C04_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C04_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C08_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C08_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C08_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C08_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C16_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C16_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C16_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C16_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C17_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C17_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C17_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C17_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C32_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C32_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C32_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C32_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* PI = processor information */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C64_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C64_OR_EQUIVALENT_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C64_OR_EQUIVALENT_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_EEPROM_24C64_OR_EQUIVALENT_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
|
||||
/* achu: not a typo, 00h and 0x02 are same. 00h for backwards compatability, see spec */
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER_IPMI_FRU_INVENTORY_BACKWARDS_COMPATABILITY 0x00
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER_DIMM_MEMORY_ID 0x01
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER_IPMI_FRU_INVENTORY 0x02
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER_SYSTEM_PROCESSOR_CARTRIDGE_FRU_PI_ROM 0x03
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER_UNSPECIFIED 0xFF
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_PCF_8570_256_BYTE_RAM_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_PCF_8573_CLOCK_CALENDAR_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_PCF_8574A_IO_PORT_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_PCF_8583_CLOCK_CALENDAR_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_PCF_8593_CLOCK_CALENDAR_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_CLOCK_CALENDAR_TYPE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_PCF_8591_AD_DA_CONVERTER_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_IO_PORT_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_AD_CONVERTER_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_DA_CONVERTER_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_AD_DA_CONVERTER_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_LCD_CONTROLLER_DRIVER_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_CORE_LOGIC_DEVICE_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_LMC6874_INTELLIGENT_BATTERY_CONTROLLER_OR_EQUIVALENT_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_INTELLIGENT_BATTERY_CONTROLLER_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_COMBO_MANAGEMENT_ASIC_SPECIFIC_DEVICE_NOT_SPECIFIED_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_MAXIM_1617_TEMPERATURE_SENSOR_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_MODIFIER_OTHER_UNSPECIFIED_DEVICE_UNSPECIFIED 0x00
|
||||
|
||||
#define IPMI_DEVICE_TYPE_VALID(__device_type) \
|
||||
((((__device_type) >= IPMI_DEVICE_TYPE_DS1624_TEMPERATURE_SENSOR_EEPROM_OR_EQUIVALENT \
|
||||
&& (__device_type) <= IPMI_DEVICE_TYPE_HECETA_ASIC_OR_SIMILAR) \
|
||||
|| ((__device_type) >= IPMI_DEVICE_TYPE_EEPROM_24C01_OR_EQUIVALENT \
|
||||
&& (__device_type) <= IPMI_DEVICE_TYPE_FRU_INVENTORY_DEVICE_BEHIND_MANAGEMENT_CONTROLLER) \
|
||||
|| ((__device_type) >= IPMI_DEVICE_TYPE_PCF_8570_256_BYTE_RAM_OR_EQUIVALENT \
|
||||
&& (__device_type) <= IPMI_DEVICE_TYPE_MAXIM_1617_TEMPERATURE_SENSOR) \
|
||||
|| (__device_type) == IPMI_DEVICE_TYPE_OTHER_UNSPECIFIED_DEVICE) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_DEVICE_TYPE_IS_OEM(__device_type) \
|
||||
(((__device_type) >= IPMI_DEVICE_TYPE_OEM_MIN \
|
||||
&& (((__device_type) - 1) <= (IPMI_DEVICE_TYPE_OEM_MAX - 1))) ? 1 : 0)
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char *const ipmi_device_types[];
|
||||
extern const char *const ipmi_oem_device_type;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_ds1624_temperature_sensor_eeprom_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_ds1624_temperature_sensor_eeprom_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_ds1621_temperature_sensor_eeprom_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_ds1621_temperature_sensor_eeprom_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_lm75_temperature_sensor_eeprom_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_lm75_temperature_sensor_eeprom_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_heceta_asic_or_similar[];
|
||||
extern unsigned int ipmi_device_type_modifier_heceta_asic_or_similar_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c01_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c01_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c02_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c02_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c04_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c04_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c08_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c08_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c16_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c16_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c17_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c17_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c32_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c32_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_eeprom_24c64_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_eeprom_24c64_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_fru_inventory_device_behind_management_controller[];
|
||||
extern unsigned int ipmi_device_type_modifier_fru_inventory_device_behind_management_controller_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_pcf_8570_256_byte_ram_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_pcf_8570_256_byte_ram_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_pcf_8573_clock_calendar_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_pcf_8573_clock_calendar_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_pcf_8574a_io_port_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_pcf_8574a_io_port_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_pcf_8583_clock_calendar_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_pcf_8583_clock_calendar_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_pcf_8593_clock_calendar_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_pcf_8593_clock_calendar_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_clock_calendar_type_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_clock_calendar_type_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_pcf_8591_ad_da_converter_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_pcf_8591_ad_da_converter_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_io_port_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_io_port_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_ad_converter_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_ad_converter_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_da_converter_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_da_converter_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_ad_da_converter_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_ad_da_converter_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_lcd_controller_driver_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_lcd_controller_driver_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_core_logic_device_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_core_logic_device_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_lmc6874_intelligent_battery_controller_or_equivalent[];
|
||||
extern unsigned int ipmi_device_type_modifier_lmc6874_intelligent_battery_controller_or_equivalent_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_intelligent_battery_controller_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_intelligent_battery_controller_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_combo_management_asic_specific_device_not_specified[];
|
||||
extern unsigned int ipmi_device_type_modifier_combo_management_asic_specific_device_not_specified_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_maxim_1617_temperature_sensor[];
|
||||
extern unsigned int ipmi_device_type_modifier_maxim_1617_temperature_sensor_max_index;
|
||||
|
||||
extern const char * const ipmi_device_type_modifier_other_unspecified_device[];
|
||||
extern unsigned int ipmi_device_type_modifier_other_unspecified_device_max_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_DEVICE_TYPES_SPEC_H */
|
150
source/freeipmi/usr/include/freeipmi/spec/ipmi-entity-ids-spec.h
Normal file
150
source/freeipmi/usr/include/freeipmi/spec/ipmi-entity-ids-spec.h
Normal file
@ -0,0 +1,150 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_ENTITY_IDS_SPEC_H
|
||||
#define IPMI_ENTITY_IDS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_ENTITY_ID_UNSPECIFIED 0x00
|
||||
#define IPMI_ENTITY_ID_OTHER 0x01
|
||||
#define IPMI_ENTITY_ID_UNKNOWN 0x02
|
||||
#define IPMI_ENTITY_ID_PROCESSOR 0x03
|
||||
#define IPMI_ENTITY_ID_DISK_OR_DISK_BAY 0x04
|
||||
#define IPMI_ENTITY_ID_PERIPHERAL_BAY 0x05 /* "peripheral bay" in spec */
|
||||
#define IPMI_ENTITY_ID_SYSTEM_MANAGEMENT_MODULE 0x06
|
||||
#define IPMI_ENTITY_ID_SYSTEM_BOARD 0x07
|
||||
#define IPMI_ENTITY_ID_MEMORY_MODULE 0x08
|
||||
#define IPMI_ENTITY_ID_PROCESSOR_MODULE 0x09
|
||||
#define IPMI_ENTITY_ID_POWER_SUPPLY 0x0A
|
||||
#define IPMI_ENTITY_ID_ADD_IN_CARD 0x0B
|
||||
#define IPMI_ENTITY_ID_FRONT_PANEL_BOARD 0x0C
|
||||
#define IPMI_ENTITY_ID_BACK_PANEL_BOARD 0x0D
|
||||
#define IPMI_ENTITY_ID_POWER_SYSTEM_BOARD 0x0E
|
||||
#define IPMI_ENTITY_ID_DRIVE_BACKPLANE 0x0F
|
||||
#define IPMI_ENTITY_ID_SYSTEM_INTERNAL_EXPANSION_BOARD 0x10
|
||||
#define IPMI_ENTITY_ID_OTHER_SYSTEM_BOARD 0x11
|
||||
#define IPMI_ENTITY_ID_PROCESSOR_BOARD 0x12
|
||||
#define IPMI_ENTITY_ID_POWER_UNIT_POWER_DOMAIN 0x13
|
||||
#define IPMI_ENTITY_ID_POWER_MODULE_DC_TO_DC_CONVERTER 0x14
|
||||
#define IPMI_ENTITY_ID_POWER_MANAGEMENT_POWER_DISTRIBUTION_BOARD 0x15
|
||||
#define IPMI_ENTITY_ID_CHASSI_BACK_PANEL_BOARD 0x16
|
||||
#define IPMI_ENTITY_ID_SYSTEM_CHASSIS 0x17
|
||||
#define IPMI_ENTITY_ID_SUB_CHASSIS 0x18
|
||||
#define IPMI_ENTITY_ID_OTHER_CHASSIS_BOARD 0x19
|
||||
#define IPMI_ENTITY_ID_DISK_DRIVE_BAY 0x1A
|
||||
#define IPMI_ENTITY_ID_PERIPHERAL_BAY2 0x1B /* "Peripheral Bay" in spec */
|
||||
#define IPMI_ENTITY_ID_DEVICE_BAY 0x1C
|
||||
#define IPMI_ENTITY_ID_FAN_COOLING_DEVICE 0x1D
|
||||
#define IPMI_ENTITY_ID_COOLING_UNIT_COOLING_DOMAIN 0x1E /* see errata */
|
||||
#define IPMI_ENTITY_ID_CABLE_INTERCONNECT 0x1F
|
||||
#define IPMI_ENTITY_ID_MEMORY_DEVICE 0x20
|
||||
#define IPMI_ENTITY_ID_SYSTEM_MANAGEMENT_SOFTWARE 0x21
|
||||
#define IPMI_ENTITY_ID_SYSTEM_FIRMWARE 0x22 /* see errata */
|
||||
#define IPMI_ENTITY_ID_OPERATING_SYSTEM 0x23
|
||||
#define IPMI_ENTITY_ID_SYSTEM_BUS 0x24
|
||||
#define IPMI_ENTITY_ID_GROUP 0x25
|
||||
#define IPMI_ENTITY_ID_REMOTE_MANAGEMENT_COMMUNICATION_DEVICE 0x26
|
||||
#define IPMI_ENTITY_ID_EXTERNAL_ENVIRONMENT 0x27
|
||||
#define IPMI_ENTITY_ID_BATTERY 0x28
|
||||
#define IPMI_ENTITY_ID_PROCESSING_BLADE 0x29
|
||||
#define IPMI_ENTITY_ID_CONNECTIVITY_SWTICH 0x2A
|
||||
#define IPMI_ENTITY_ID_PROCESSOR_MEMORY_MODULE 0x2B
|
||||
#define IPMI_ENTITY_ID_IO_MODULE 0x2C
|
||||
#define IPMI_ENTITY_ID_PROCESSOR_IO_MODULE 0x2D
|
||||
#define IPMI_ENTITY_ID_MANAGEMENT_CONTROLLER_FIRMWARE 0x2E
|
||||
#define IPMI_ENTITY_ID_IPMI_CHANNEL 0x2F
|
||||
#define IPMI_ENTITY_ID_PCI_BUS 0x30
|
||||
#define IPMI_ENTITY_ID_PCI_EXPRESS_BUS 0x31
|
||||
#define IPMI_ENTITY_ID_SCSI_BUS 0x32
|
||||
#define IPMI_ENTITY_ID_SATA_SAS_BUS 0x33
|
||||
#define IPMI_ENTITY_ID_PROCESSOR_FRONT_SIDE_BUS 0x34
|
||||
#define IPMI_ENTITY_ID_REAL_TIME_CLOCK 0x35
|
||||
/* 0x36 - reserved */
|
||||
/* achu:
|
||||
*
|
||||
* Ugh .. 0x37 is listed as air inlet in markup 4 spec, but not in
|
||||
* errata 4. Initial assumption was that it was a typo. Later, DCMI
|
||||
* v1.5 spec lits 0x37 is inlet temperature.
|
||||
*
|
||||
* So the assumption is it's not a typo now, we'll list 0x37 as
|
||||
* AIR_INLET "B"
|
||||
*/
|
||||
#define IPMI_ENTITY_ID_AIR_INLET_B 0x37
|
||||
/* 0x38 - 0x3F - reserved */
|
||||
#define IPMI_ENTITY_ID_AIR_INLET 0x40
|
||||
#define IPMI_ENTITY_ID_AIR_INLET_A IPMI_ENTITY_ID_AIR_INLET
|
||||
#define IPMI_ENTITY_ID_PROCESSOR_CPU 0x41 /* considered same as 0x03, to match DCMI */
|
||||
#define IPMI_ENTITY_ID_BASEBOARD_MAIN_SYSTEM_BOARD 0x42 /* considered same as 0x07, to match DCMI */
|
||||
#define IPMI_ENTITY_ID_CHASSIS_SPECIFIC_MIN 0x90
|
||||
#define IPMI_ENTITY_ID_CHASSIS_SPECIFIC_MAX 0xAF
|
||||
#define IPMI_ENTITY_ID_BOARD_SET_SPECIFIC_MIN 0xB0
|
||||
#define IPMI_ENTITY_ID_BOARD_SET_SPECIFIC_MAX 0xCF
|
||||
#define IPMI_ENTITY_ID_OEM_SYSTEM_INTEGRATOR_DEFINED_MIN 0xD0
|
||||
#define IPMI_ENTITY_ID_OEM_SYSTEM_INTEGRATOR_DEFINED_MAX 0xFF
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_ENTITY_ID_VALID(__entity_id) \
|
||||
((((__entity_id + 1) >= (IPMI_ENTITY_ID_UNSPECIFIED + 1) \
|
||||
&& (__entity_id) <= IPMI_ENTITY_ID_REAL_TIME_CLOCK) \
|
||||
|| ((__entity_id) >= IPMI_ENTITY_ID_AIR_INLET \
|
||||
&& (__entity_id) <= IPMI_ENTITY_ID_BASEBOARD_MAIN_SYSTEM_BOARD)) ? 1 : 0)
|
||||
|
||||
#define IPMI_ENTITY_ID_IS_CHASSIS_SPECIFIC(__entity_id) \
|
||||
(((__entity_id) >= IPMI_ENTITY_ID_CHASSIS_SPECIFIC_MIN \
|
||||
&& ((__entity_id) <= IPMI_ENTITY_ID_CHASSIS_SPECIFIC_MAX)) ? 1 : 0)
|
||||
|
||||
#define IPMI_ENTITY_ID_IS_BOARD_SET_SPECIFIC(__entity_id) \
|
||||
(((__entity_id) >= IPMI_ENTITY_ID_BOARD_SET_SPECIFIC_MIN \
|
||||
&& ((__entity_id) <= IPMI_ENTITY_ID_BOARD_SET_SPECIFIC_MAX)) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_ENTITY_ID_IS_OEM_SYSTEM_INTEGRATOR_DEFINED(__entity_id) \
|
||||
(((__entity_id) >= IPMI_ENTITY_ID_OEM_SYSTEM_INTEGRATOR_DEFINED_MIN \
|
||||
&& ((__entity_id - 1) <= (IPMI_ENTITY_ID_OEM_SYSTEM_INTEGRATOR_DEFINED_MAX - 1))) ? 1 : 0)
|
||||
|
||||
#define IPMI_ENTITY_INSTANCE_SYSTEM_RELATIVE_MIN 0x00
|
||||
#define IPMI_ENTITY_INSTANCE_SYSTEM_RELATIVE_MAX 0x5F
|
||||
|
||||
#define IPMI_ENTITY_INSTANCE_DEVICE_RELATIVE_MIN 0x60
|
||||
#define IPMI_ENTITY_INSTANCE_DEVICE_RELATIVE_MAX 0x7F
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_ENTITY_INSTANCE_SYSTEM_RELATIVE(__entity_instance) \
|
||||
(((__entity_instance + 1) >= (IPMI_ENTITY_INSTANCE_SYSTEM_RELATIVE_MIN + 1)) \
|
||||
&& ((__entity_instance) >= IPMI_ENTITY_INSTANCE_SYSTEM_RELATIVE_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_ENTITY_INSTANCE_DEVICE_RELATIVE(__entity_instance) \
|
||||
(((__entity_instance) >= IPMI_ENTITY_INSTANCE_DEVICE_RELATIVE_MIN) \
|
||||
&& ((__entity_instance) >= IPMI_ENTITY_INSTANCE_DEVICE_RELATIVE_MAX) ? 1 : 0)
|
||||
|
||||
extern const char *const ipmi_entity_ids[];
|
||||
extern const char *const ipmi_entity_id_chassis_specific;
|
||||
extern const char *const ipmi_entity_id_board_set_specific;
|
||||
extern const char *const ipmi_entity_id_oem_system_integrator;
|
||||
|
||||
/* properly capitalize, for some entries if entity has an "or" or "/" remove it and pick one element, etc. */
|
||||
extern const char *const ipmi_entity_ids_pretty[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_ENTITY_IDS_SPEC_H */
|
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#warning ipmi-event-reading-type-code-oem-spec.h header file is deprecated
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-event-reading-type-code-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-event-reading-type-code-oem-hp-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-event-reading-type-code-oem-intel-node-manager-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-event-reading-type-code-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-event-reading-type-code-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-event-reading-type-code-oem-supermicro-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_SPEC_H */
|
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Table 42-1 */
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_UNSPECIFIED 0x00
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_THRESHOLD 0x01
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_TRANSITION_STATE 0x02
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_STATE 0x03
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_PREDICTIVE_FAILURE 0x04
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_LIMIT 0x05
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_PERFORMANCE 0x06
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY 0x07
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_DEVICE_PRESENT 0x08
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_DEVICE_ENABLED 0x09
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY 0x0A
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_REDUNDANCY 0x0B
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_ACPI_POWER_STATE 0x0C
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_SENSOR_SPECIFIC 0x6F
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_MIN 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_MAX 0x7F
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_IS_UNSPECIFIED(__val) \
|
||||
(((__val) == IPMI_EVENT_READING_TYPE_CODE_UNSPECIFIED) ? 1 : 0)
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_IS_THRESHOLD(__val) \
|
||||
(((__val) == IPMI_EVENT_READING_TYPE_CODE_THRESHOLD) ? 1 : 0)
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_IS_GENERIC(__val) \
|
||||
(((__val) >= IPMI_EVENT_READING_TYPE_CODE_TRANSITION_STATE \
|
||||
&& (__val) <= IPMI_EVENT_READING_TYPE_CODE_ACPI_POWER_STATE) ? 1 : 0)
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_IS_SENSOR_SPECIFIC(__val) \
|
||||
(((__val) == IPMI_EVENT_READING_TYPE_CODE_SENSOR_SPECIFIC) ? 1 : 0)
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_IS_OEM(__val) \
|
||||
(((__val) >= IPMI_EVENT_READING_TYPE_CODE_OEM_MIN \
|
||||
&& (__val) <= IPMI_EVENT_READING_TYPE_CODE_OEM_MAX) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_SPEC_H */
|
@ -0,0 +1,103 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
/*****************************************************************************\
|
||||
* Copyright (C) 2007-2015 Lawrence Livermore National Security, LLC.
|
||||
* Copyright (C) 2007 The Regents of the University of California.
|
||||
* Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
|
||||
* Written by Albert Chu <chu11@llnl.gov>
|
||||
* UCRL-CODE-232183
|
||||
*
|
||||
* This file is part of Ipmi-fru, a tool used for retrieving
|
||||
* motherboard field replaceable unit (FRU) information. For details,
|
||||
* see http://www.llnl.gov/linux/.
|
||||
*
|
||||
* Ipmi-fru is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 3 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Ipmi-fru is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with Ipmi-fru. If not, see <http://www.gnu.org/licenses/>.
|
||||
\*****************************************************************************/
|
||||
|
||||
#ifndef IPMI_FRU_CHASSIS_TYPES_SPEC_H
|
||||
#define IPMI_FRU_CHASSIS_TYPES_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/fiid/fiid.h>
|
||||
|
||||
/*
|
||||
* achu:
|
||||
*
|
||||
* Not in IPMI spec. In "Platform Management FRU Information Storage
|
||||
* Definition" document.
|
||||
*
|
||||
* Starting w/ FRU Revision 1.2, this table is defined by SMBIOS
|
||||
* specification, Table 16 - "System Enclosure or Chassis Types"
|
||||
*/
|
||||
|
||||
#define IPMI_FRU_CHASSIS_TYPE_OTHER 0x01
|
||||
#define IPMI_FRU_CHASSIS_TYPE_UNKNOWN 0x02
|
||||
#define IPMI_FRU_CHASSIS_TYPE_DESKTOP 0x03
|
||||
#define IPMI_FRU_CHASSIS_TYPE_LOW_PROFILE_DESKTOP 0x04
|
||||
#define IPMI_FRU_CHASSIS_TYPE_PIZZA_BOX 0x05
|
||||
#define IPMI_FRU_CHASSIS_TYPE_MINI_TOWER 0x06
|
||||
#define IPMI_FRU_CHASSIS_TYPE_TOWER 0x07
|
||||
#define IPMI_FRU_CHASSIS_TYPE_PORTABLE 0x08
|
||||
#define IPMI_FRU_CHASSIS_TYPE_LAPTOP 0x09
|
||||
#define IPMI_FRU_CHASSIS_TYPE_NOTEBOOK 0x0a
|
||||
#define IPMI_FRU_CHASSIS_TYPE_HAND_HELD 0x0b
|
||||
#define IPMI_FRU_CHASSIS_TYPE_DOCKING_STATION 0x0c
|
||||
#define IPMI_FRU_CHASSIS_TYPE_ALL_IN_ONE 0x0d
|
||||
#define IPMI_FRU_CHASSIS_TYPE_SUB_NOTEBOOK 0x0e
|
||||
#define IPMI_FRU_CHASSIS_TYPE_SPACE_SAVING 0x0f
|
||||
#define IPMI_FRU_CHASSIS_TYPE_LUNCH_BOX 0x10
|
||||
#define IPMI_FRU_CHASSIS_TYPE_MAIN_SERVER_CHASSIS 0x11
|
||||
#define IPMI_FRU_CHASSIS_TYPE_EXPANSION_CHASSIS 0x12
|
||||
#define IPMI_FRU_CHASSIS_TYPE_SUBCHASSIS 0x13
|
||||
#define IPMI_FRU_CHASSIS_TYPE_BUS_EXPANSION_CHASSIS 0x14
|
||||
#define IPMI_FRU_CHASSIS_TYPE_PERIPHERAL_CHASSIS 0x15
|
||||
#define IPMI_FRU_CHASSIS_TYPE_RAID_CHASSIS 0x16
|
||||
#define IPMI_FRU_CHASSIS_TYPE_RACK_MOUNT_CHASSIS 0x17
|
||||
#define IPMI_FRU_CHASSIS_TYPE_SEALED_CASE_PC 0x18
|
||||
#define IPMI_FRU_CHASSIS_TYPE_MULTI_SYSTEM_CHASSIS 0x19
|
||||
#define IPMI_FRU_CHASSIS_TYPE_COMPACT_PCI 0x1A
|
||||
#define IPMI_FRU_CHASSIS_TYPE_ADVANCED_TCA 0x1B
|
||||
#define IPMI_FRU_CHASSIS_TYPE_BLADE 0x1C
|
||||
#define IPMI_FRU_CHASSIS_TYPE_BLADE_ENCLOSURE 0x1D
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_FRU_CHASSIS_TYPE_VALID(__chassis_type) \
|
||||
(((__chassis_type + 1) >= (IPMI_FRU_CHASSIS_TYPE_OTHER + 1) \
|
||||
&& (__chassis_type) <= IPMI_FRU_CHASSIS_TYPE_BLADE_ENCLOSURE) ? 1 : 0)
|
||||
|
||||
extern const char *const ipmi_fru_chassis_types[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_FRU_CHASSIS_TYPES_SPEC_H */
|
@ -0,0 +1,210 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
/*****************************************************************************\
|
||||
* Copyright (C) 2007-2015 Lawrence Livermore National Security, LLC.
|
||||
* Copyright (C) 2007 The Regents of the University of California.
|
||||
* Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
|
||||
* Written by Albert Chu <chu11@llnl.gov>
|
||||
* UCRL-CODE-232183
|
||||
*
|
||||
* This file is part of Ipmi-fru, a tool used for retrieving
|
||||
* motherboard field replaceable unit (FRU) information. For details,
|
||||
* see http://www.llnl.gov/linux/.
|
||||
*
|
||||
* Ipmi-fru is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 3 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Ipmi-fru is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with Ipmi-fru. If not, see <http://www.gnu.org/licenses/>.
|
||||
\*****************************************************************************/
|
||||
|
||||
#ifndef IPMI_FRU_LANGUAGE_CODES_SPEC_H
|
||||
#define IPMI_FRU_LANGUAGE_CODES_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/fiid/fiid.h>
|
||||
|
||||
/*
|
||||
* achu:
|
||||
*
|
||||
* Not in IPMI spec. In "Platform Management FRU Information Storage
|
||||
* Definition" document.
|
||||
*/
|
||||
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ENGLISH_LEGACY 0
|
||||
#define IPMI_FRU_LANGUAGE_CODE_AFAR 1
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ABKHAZIAN 2
|
||||
#define IPMI_FRU_LANGUAGE_CODE_AFRIKAANS 3
|
||||
#define IPMI_FRU_LANGUAGE_CODE_AMHARIC 4
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ARABIC 5
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ASSAMESE 6
|
||||
#define IPMI_FRU_LANGUAGE_CODE_AYMARA 7
|
||||
#define IPMI_FRU_LANGUAGE_CODE_AZERBAIJANI 8
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BASHKIR 9
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BYELORUSSIAN 10
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BULGARIAN 11
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BIHARI 12
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BISLAMA 13
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BENGALI_BANGLA 14
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TIBETAN 15
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BRETON 16
|
||||
#define IPMI_FRU_LANGUAGE_CODE_CATALAN 17
|
||||
#define IPMI_FRU_LANGUAGE_CODE_CORSICAN 18
|
||||
#define IPMI_FRU_LANGUAGE_CODE_CZECH 19
|
||||
#define IPMI_FRU_LANGUAGE_CODE_WELSH 20
|
||||
#define IPMI_FRU_LANGUAGE_CODE_DANISH 21
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GERMAN 22
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BHUTANI 23
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GREEK 24
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ENGLISH 25
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ESPERANTO 26
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SPANISH 27
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ESTONIAN 28
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BASQUE 29
|
||||
#define IPMI_FRU_LANGUAGE_CODE_PERSIAN 30
|
||||
#define IPMI_FRU_LANGUAGE_CODE_FINNISH 31
|
||||
#define IPMI_FRU_LANGUAGE_CODE_FIJI 32
|
||||
#define IPMI_FRU_LANGUAGE_CODE_FAEROESE 33
|
||||
#define IPMI_FRU_LANGUAGE_CODE_FRENCH 34
|
||||
#define IPMI_FRU_LANGUAGE_CODE_FRISIAN 35
|
||||
#define IPMI_FRU_LANGUAGE_CODE_IRISH 36
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SCOTS_GAELIC 37
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GALICIAN 38
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GUARANI 39
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GUJARATI 40
|
||||
#define IPMI_FRU_LANGUAGE_CODE_HAUSA 41
|
||||
#define IPMI_FRU_LANGUAGE_CODE_HINDI 42
|
||||
#define IPMI_FRU_LANGUAGE_CODE_CROATIAN 43
|
||||
#define IPMI_FRU_LANGUAGE_CODE_HUNGARIAN 44
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ARMENIAN 45
|
||||
#define IPMI_FRU_LANGUAGE_CODE_INTERLINGUA 46
|
||||
#define IPMI_FRU_LANGUAGE_CODE_INTERLINGUE 47
|
||||
#define IPMI_FRU_LANGUAGE_CODE_INUPIAK 48
|
||||
#define IPMI_FRU_LANGUAGE_CODE_INDONESIAN 49
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ICELANDIC 50
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ITALIAN 51
|
||||
#define IPMI_FRU_LANGUAGE_CODE_HEBREW 52
|
||||
#define IPMI_FRU_LANGUAGE_CODE_JAPANESE 53
|
||||
#define IPMI_FRU_LANGUAGE_CODE_YIDDISH 54
|
||||
#define IPMI_FRU_LANGUAGE_CODE_JAVANESE 55
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GEORGIAN 56
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KAZAKH 57
|
||||
#define IPMI_FRU_LANGUAGE_CODE_GREENLANDIC 58
|
||||
#define IPMI_FRU_LANGUAGE_CODE_CAMBODIAN 59
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KANNADA 60
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KOREAN 61
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KASHMIRI 62
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KURDISH 63
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KIRGHIZ 64
|
||||
#define IPMI_FRU_LANGUAGE_CODE_LATIN 65
|
||||
#define IPMI_FRU_LANGUAGE_CODE_LINGALA 66
|
||||
#define IPMI_FRU_LANGUAGE_CODE_LAOTHIAN 67
|
||||
#define IPMI_FRU_LANGUAGE_CODE_LITHUANIAN 68
|
||||
#define IPMI_FRU_LANGUAGE_CODE_LATVIAN_LETTISH 69
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MALAGASY 70
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MAORI 71
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MACEDONIAN 72
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MALAYALAM 73
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MONGOLIAN 74
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MOLDAVIAN 75
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MARATHI 76
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MALAY 77
|
||||
#define IPMI_FRU_LANGUAGE_CODE_MALTESE 78
|
||||
#define IPMI_FRU_LANGUAGE_CODE_BURMESE 79
|
||||
#define IPMI_FRU_LANGUAGE_CODE_NAURU 80
|
||||
#define IPMI_FRU_LANGUAGE_CODE_NEPALI 81
|
||||
#define IPMI_FRU_LANGUAGE_CODE_DUTCH 82
|
||||
#define IPMI_FRU_LANGUAGE_CODE_NORWEGIAN 83
|
||||
#define IPMI_FRU_LANGUAGE_CODE_OCCITAN 84
|
||||
#define IPMI_FRU_LANGUAGE_CODE_AFAN_OROMO 85
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ORIYA 86
|
||||
#define IPMI_FRU_LANGUAGE_CODE_PUNJABI 87
|
||||
#define IPMI_FRU_LANGUAGE_CODE_POLISH 88
|
||||
#define IPMI_FRU_LANGUAGE_CODE_PASHTO_PUSHTO 89
|
||||
#define IPMI_FRU_LANGUAGE_CODE_PORTUGUESE 90
|
||||
#define IPMI_FRU_LANGUAGE_CODE_QUECHUA 91
|
||||
#define IPMI_FRU_LANGUAGE_CODE_RHAETO_ROMANCE 92
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KIRUNDI 93
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ROMANIAN 94
|
||||
#define IPMI_FRU_LANGUAGE_CODE_RUSSIAN 95
|
||||
#define IPMI_FRU_LANGUAGE_CODE_KINYARWANDA 96
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SANSKRIT 97
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SINDHI 98
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SANGRO 99
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SERBO_CROATION 100
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SINGHALESE 101
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SLOVAK 102
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SLOVENIAN 103
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SAMOAN 104
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SHONA 105
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SOMALI 106
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ALBANIAN 107
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SERBIAN 108
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SISWATI 109
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SESOTHO 110
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SUDANESE 111
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SWEDISH 112
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SWAHILI 113
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TAMIL 114
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TELUGU 115
|
||||
/* Spec has "Tegulu", likely a typo */
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TEGULU IPMI_FRU_LANGUAGE_CODE_TELUGU
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TAJIK 116
|
||||
#define IPMI_FRU_LANGUAGE_CODE_THAI 117
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TIGRINYA 118
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TURKMEN 119
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TAGALOG 120
|
||||
#define IPMI_FRU_LANGUAGE_CODE_SETSWANA 121
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TONGA 122
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TURKISH 123
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TSONGA 124
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TATAR 125
|
||||
#define IPMI_FRU_LANGUAGE_CODE_TWI 126
|
||||
#define IPMI_FRU_LANGUAGE_CODE_UKRANIAN 127
|
||||
#define IPMI_FRU_LANGUAGE_CODE_URDU 128
|
||||
#define IPMI_FRU_LANGUAGE_CODE_UZBEK 129
|
||||
#define IPMI_FRU_LANGUAGE_CODE_VIETNAMESE 130
|
||||
#define IPMI_FRU_LANGUAGE_CODE_VOLAPUK 131
|
||||
#define IPMI_FRU_LANGUAGE_CODE_WOLOF 132
|
||||
#define IPMI_FRU_LANGUAGE_CODE_XHOSA 133
|
||||
#define IPMI_FRU_LANGUAGE_CODE_YORUBA 134
|
||||
#define IPMI_FRU_LANGUAGE_CODE_CHINESE 135
|
||||
#define IPMI_FRU_LANGUAGE_CODE_ZULU 136
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_FRU_LANGUAGE_CODE_VALID(__language_code) \
|
||||
(((__language_code + 1) >= (IPMI_FRU_LANGUAGE_CODE_ENGLISH_LEGACY + 1) \
|
||||
&& (__language_code) <= IPMI_FRU_LANGUAGE_CODE_ZULU) ? 1 : 0)
|
||||
|
||||
extern const char *const ipmi_fru_language_codes[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_FRU_LANGUAGE_CODES_SPEC_H */
|
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_IANA_ENTERPRISE_NUMBERS_SPEC_H
|
||||
#define IPMI_IANA_ENTERPRISE_NUMBERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Convenience macros, will be added as needed in code */
|
||||
#define IPMI_IANA_ENTERPRISE_ID_IBM 2
|
||||
#define IPMI_IANA_ENTERPRISE_ID_HP 11
|
||||
#define IPMI_IANA_ENTERPRISE_ID_SUN_MICROSYSTEMS 42
|
||||
#define IPMI_IANA_ENTERPRISE_ID_INTEL 343
|
||||
#define IPMI_IANA_ENTERPRISE_ID_DELL 674
|
||||
#define IPMI_IANA_ENTERPRISE_ID_MAGNUM_TECHNOLOGIES 5593
|
||||
#define IPMI_IANA_ENTERPRISE_ID_QUANTA 7244
|
||||
#define IPMI_IANA_ENTERPRISE_ID_FUJITSU 10368
|
||||
#define IPMI_IANA_ENTERPRISE_ID_PEPPERCON 10437
|
||||
#define IPMI_IANA_ENTERPRISE_ID_SUPERMICRO 10876
|
||||
#define IPMI_IANA_ENTERPRISE_ID_WISTRON 11161
|
||||
#define IPMI_IANA_ENTERPRISE_ID_INVENTEC 20569
|
||||
|
||||
/* Workarounds for motherboards with invalid enterprise IDs */
|
||||
#define IPMI_IANA_ENTERPRISE_ID_SUPERMICRO_WORKAROUND 47488
|
||||
|
||||
/* As of this writing min = 0, max = 34214 */
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_IANA_ENTERPRISE_ID_VALID(__iana_enterprise_id) \
|
||||
(((__iana_enterprise_id + 1) >= (0 + 1) \
|
||||
&& (__iana_enterprise_id) <= 44603) ? 1 : 0)
|
||||
|
||||
#define IPMI_IANA_ENTERPRISE_ID_RECOGNIZED(__iana_enterprise_id) \
|
||||
(IPMI_IANA_ENTERPRISE_ID_VALID((__iana_enterprise_id)) \
|
||||
|| (__iana_enterprise_id) == IPMI_IANA_ENTERPRISE_ID_SUPERMICRO_WORKAROUND)
|
||||
|
||||
/* Some fields can be NULL if they were not assigned/removed by IANA */
|
||||
/* consider using ipmi_iana_enerprise_numbers_string() function to
|
||||
* handle some workaround situations this array will not have.
|
||||
*/
|
||||
extern const char *const ipmi_iana_enterprise_numbers[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_IANA_ENTERPRISE_NUMBERS_SPEC_H */
|
@ -0,0 +1,63 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_IPMB_LUN_SPEC_H
|
||||
#define IPMI_IPMB_LUN_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* BMC IPMI LUNs */
|
||||
|
||||
/* BMC commands and Event Request Messages:
|
||||
Event Request Messages received on this LUN are routed to the Event
|
||||
Receiver function in the BMC, and automatically logged if SEL
|
||||
logging is enabled
|
||||
*/
|
||||
#define IPMI_BMC_IPMB_LUN_BMC 0x00
|
||||
|
||||
/* OEM LUN 1:
|
||||
OEM reserved for BMC implementer / system integrator definition.
|
||||
*/
|
||||
#define IPMI_BMC_IPMB_LUN_OEM_LUN1 0x01
|
||||
|
||||
/* SMS Message LUN (Intended for messages to System Management
|
||||
Software):
|
||||
Messages received on this LUN are routed to the Receive Message
|
||||
Queue and retrieved using a Read Message command. The SMS_Avail
|
||||
flag is set whenever the Receive Message Queue has valid contents.
|
||||
*/
|
||||
#define IPMI_BMC_IPMB_LUN_SMS_MSG_LUN 0x02
|
||||
|
||||
/* OEM LUN 2:
|
||||
OEM reserved for BMC implementer / system integrator definition.
|
||||
*/
|
||||
#define IPMI_BMC_IPMB_LUN_OEM_LUN2 0x03
|
||||
|
||||
#define IPMI_BMC_LUN_VALID(__lun) \
|
||||
(((__lun) == IPMI_BMC_IPMB_LUN_BMC \
|
||||
|| (__lun) == IPMI_BMC_IPMB_LUN_OEM_LUN1 \
|
||||
|| (__lun) == IPMI_BMC_IPMB_LUN_SMS_MSG_LUN \
|
||||
|| (__lun) == IPMI_BMC_IPMB_LUN_OEM_LUN2) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_IPMB_LUN_SPEC_H */
|
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_JEDEC_MANUFACTURER_IDENTIFICATION_CODE_SPEC_H
|
||||
#define IPMI_JEDEC_MANUFACTURER_IDENTIFICATION_CODE_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define IPMI_JEDEC_MANUFACTURER_CONTINUATION_CODES_MIN 0
|
||||
#define IPMI_JEDEC_MANUFACTURER_CONTINUATION_CODES_MAX 8
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_JEDEC_MANUFACTURER_CONTINUATION_CODES_VALID(__manufacturer_continuation_codes) \
|
||||
(((__manufacturer_continuation_codes + 1) >= (IPMI_JEDEC_MANUFACTURER_CONTINUATION_CODES_MIN + 1) \
|
||||
&& (__manufacturer_continuation_codes) <= IPMI_JEDEC_MANUFACTURER_CONTINUATION_CODES_MAX) ? 1 : 0)
|
||||
|
||||
struct ipmi_jedec_manufacturer_id_pair {
|
||||
uint8_t id;
|
||||
char *str;
|
||||
};
|
||||
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank1[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank2[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank3[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank4[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank5[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank6[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank7[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank8[];
|
||||
extern const struct ipmi_jedec_manufacturer_id_pair ipmi_jedec_manufacturer_id_bank9[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_JEDEC_MANUFACTURER_IDENTIFICATION_CODE_SPEC_H */
|
@ -0,0 +1,33 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-lan-configuration-parameters-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-lan-configuration-parameters-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_LAN_CONFIGURATION_PARAMETERS_SPEC_H */
|
@ -0,0 +1,70 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_LAN_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_SET_IN_PROGRESS 0
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_AUTHENTICATION_TYPE_SUPPORT 1
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_AUTHENTICATION_TYPE_ENABLES 2
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_IP_ADDRESS 3
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_IP_ADDRESS_SOURCE 4
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_MAC_ADDRESS 5
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_SUBNET_MASK 6
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_IPV4_HEADER_PARAMETERS 7
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_PRIMARY_RMCP_PORT_NUMBER 8
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_SECONDARY_RMCP_PORT_NUMBER 9
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_BMC_GENERATED_ARP_CONTROL 10
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_GRATUITOUS_ARP_INTERVAL 11
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_DEFAULT_GATEWAY_ADDRESS 12
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_DEFAULT_GATEWAY_MAC_ADDRESS 13
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_BACKUP_GATEWAY_ADDRESS 14
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_BACKUP_GATEWAY_MAC_ADDRESS 15
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_COMMUNITY_STRING 16
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_NUMBER_OF_DESTINATIONS 17
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_DESTINATION_TYPE 18
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_DESTINATION_ADDRESSES 19
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_VLAN_ID 20
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_VLAN_PRIORITY 21
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_RMCPPLUS_MESSAGING_CIPHER_SUITE_ENTRY_SUPPORT 22
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_RMCPPLUS_MESSAGING_CIPHER_SUITE_ENTRIES 23
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_RMCPPLUS_MESSAGING_CIPHER_SUITE_PRIVILEGE_LEVELS 24
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_DESTINATION_ADDRESS_VLAN_TAGS 25
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_BAD_PASSWORD_THRESHOLD 26
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_MIN 192
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_MAX 255
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_SELECTOR_VALID(__parameter_selector) \
|
||||
((((__parameter_selector) + 1) > (IPMI_LAN_CONFIGURATION_PARAMETER_SET_IN_PROGRESS + 1) \
|
||||
&& (__parameter_selector) <= IPMI_LAN_CONFIGURATION_PARAMETER_BAD_PASSWORD_THRESHOLD) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_SELECTOR_IS_OEM(__parameter_selector) \
|
||||
(((__parameter_selector) >= IPMI_LAN_CONFIGURATION_PARAMETER_OEM_MIN \
|
||||
&& ((__parameter_selector) - 1) <= (IPMI_LAN_CONFIGURATION_PARAMETER_OEM_MAX - 1)) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_LAN_CONFIGURATION_PARAMETERS_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_SPEC_H
|
||||
#define IPMI_NETFN_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#warning ipmi-netfn-oem-spec.h header file is deprecated
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-fujitsu-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-ibm-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-quanta-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-supermicro-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-netfn-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_SPEC_H */
|
90
source/freeipmi/usr/include/freeipmi/spec/ipmi-netfn-spec.h
Normal file
90
source/freeipmi/usr/include/freeipmi/spec/ipmi-netfn-spec.h
Normal file
@ -0,0 +1,90 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_SPEC_H
|
||||
#define IPMI_NETFN_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Notes:
|
||||
Refer to IPMIv1_5_rev1_1.pdf Table 5-1, Network Function Codes
|
||||
for complete description
|
||||
*/
|
||||
#define IPMI_NET_FN_CHASSIS_RQ 0x00
|
||||
#define IPMI_NET_FN_CHASSIS_RS 0x01
|
||||
#define IPMI_NET_FN_BRIDGE_RQ 0x02
|
||||
#define IPMI_NET_FN_BRIDGE_RS 0x03
|
||||
#define IPMI_NET_FN_SENSOR_EVENT_RQ 0x04
|
||||
#define IPMI_NET_FN_SENSOR_EVENT_RS 0x05
|
||||
#define IPMI_NET_FN_APP_RQ 0x06
|
||||
#define IPMI_NET_FN_APP_RS 0x07
|
||||
#define IPMI_NET_FN_FIRMWARE_RQ 0x08
|
||||
#define IPMI_NET_FN_FIRMWARE_RS 0x09
|
||||
#define IPMI_NET_FN_STORAGE_RQ 0x0A
|
||||
#define IPMI_NET_FN_STORAGE_RS 0x0B
|
||||
#define IPMI_NET_FN_TRANSPORT_RQ 0x0C
|
||||
#define IPMI_NET_FN_TRANSPORT_RS 0x0D
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_RQ 0x2C
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_RS 0x2D
|
||||
#define IPMI_NET_FN_OEM_GROUP_RQ 0x2E
|
||||
#define IPMI_NET_FN_OEM_GROUP_RS 0x2F
|
||||
#define IPMI_NET_FN_CONTROLLER_SPECIFIC_OEM_GROUP_MIN 0x30
|
||||
#define IPMI_NET_FN_CONTROLLER_SPECIFIC_OEM_GROUP_MAX 0x3F
|
||||
#define IPMI_NET_FN_RQ_RS_MASK 0x1
|
||||
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_IDENTIFICATION_PICMG 0x00
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_IDENTIFICATION_DMTF 0x01
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_IDENTIFICATION_SSI 0x02
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_IDENTIFICATION_VITA 0x03
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION_IDENTIFICATION_DCMI 0xDC
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
/* Include checks for possible oem network functions */
|
||||
#define IPMI_NET_FN_VALID(__net_fn) \
|
||||
((((__net_fn+1) >= IPMI_NET_FN_CHASSIS_RS \
|
||||
&& (__net_fn) <= IPMI_NET_FN_TRANSPORT_RS) \
|
||||
|| ((__net_fn) >= IPMI_NET_FN_GROUP_EXTENSION_RQ \
|
||||
&& (__net_fn) <= IPMI_NET_FN_CONTROLLER_SPECIFIC_OEM_GROUP_MAX)) ? 1 : 0)
|
||||
|
||||
#define IPMI_NET_FN_RQ_VALID(__net_fn) \
|
||||
((IPMI_NET_FN_VALID (__net_fn) \
|
||||
&& (!((__net_fn) & IPMI_NET_FN_RQ_RS_MASK))) ? 1 : 0)
|
||||
|
||||
#define IPMI_NET_FN_RS_VALID(__net_fn) \
|
||||
((IPMI_NET_FN_VALID (__net_fn) \
|
||||
&& ((__net_fn) & IPMI_NET_FN_RQ_RS_MASK)) ? 1 : 0)
|
||||
|
||||
#define IPMI_NET_FN_GROUP_EXTENSION(__net_fn) \
|
||||
(((__net_fn) == IPMI_NET_FN_GROUP_EXTENSION_RQ \
|
||||
|| (__net_fn) == IPMI_NET_FN_GROUP_EXTENSION_RS) ? 1 : 0)
|
||||
|
||||
#define IPMI_NET_FN_OEM_GROUP(__net_fn) \
|
||||
(((__net_fn) == IPMI_NET_FN_OEM_GROUP_RQ \
|
||||
|| (__net_fn) == IPMI_NET_FN_OEM_GROUP_RS) ? 1 : 0)
|
||||
|
||||
#define IPMI_NET_FN_CONTROLLER_SPECIFIC_OEM_GROUP(__net_fn) \
|
||||
(((__net_fn) >= IPMI_NET_FN_CONTROLLER_SPECIFIC_OEM_GROUP_MIN \
|
||||
&& (__net_fn) <= IPMI_NET_FN_CONTROLLER_SPECIFIC_OEM_GROUP_MAX) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_SPEC_H */
|
42
source/freeipmi/usr/include/freeipmi/spec/ipmi-oem-spec.h
Normal file
42
source/freeipmi/usr/include/freeipmi/spec/ipmi-oem-spec.h
Normal file
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_SPEC_H
|
||||
#define IPMI_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#warning ipmi-oem-spec.h header file is deprecated
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-fujitsu-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-ibm-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-quanta-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-sun-microsystems-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-supermicro-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_SPEC_H */
|
@ -0,0 +1,31 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_PEF_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_PEF_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_SET_IN_PROGRESS 0
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_PEF_CONTROL 1
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_PEF_ACTION_GLOBAL_CONTROL 2
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_PEF_STARTUP_DELAY 3
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_PEF_ALERT_STARTUP_DELAY 4
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_NUMBER_OF_EVENT_FILTERS 5
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_EVENT_FILTER_TABLE 6
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_EVENT_FILTER_TABLE_DATA_1 7
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_NUMBER_OF_ALERT_POLICY_ENTRIES 8
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_ALERT_POLICY_TABLE 9
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_SYSTEM_GUID 10
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_NUMBER_OF_ALERT_STRINGS 11
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_ALERT_STRING_KEYS 12
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_ALERT_STRINGS 13
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_NUMBER_OF_GROUP_CONTROL_TABLE_ENTRIES 14
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_GROUP_CONTROL_TABLE 15
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_OEM_MIN 96
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_OEM_MAX 127
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_SELECTOR_VALID(__parameter_selector) \
|
||||
((((__parameter_selector) + 1) > (IPMI_PEF_CONFIGURATION_PARAMETER_SET_IN_PROGRESS + 1) \
|
||||
&& (__parameter_selector) <= IPMI_PEF_CONFIGURATION_PARAMETER_GROUP_CONTROL_TABLE) ? 1 : 0)
|
||||
|
||||
#define IPMI_PEF_CONFIGURATION_PARAMETER_SELECTOR_IS_OEM(__parameter_selector) \
|
||||
(((__parameter_selector) >= IPMI_PEF_CONFIGURATION_PARAMETER_OEM_MIN \
|
||||
&& (__parameter_selector) <= IPMI_PEF_CONFIGURATION_PARAMETER_OEM_MAX) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
@ -0,0 +1,54 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_PRIVILEGE_LEVEL_SPEC_H
|
||||
#define IPMI_PRIVILEGE_LEVEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_PRIVILEGE_LEVEL_RESERVED 0x00
|
||||
#define IPMI_PRIVILEGE_LEVEL_HIGHEST_LEVEL 0x00 /* IPMI 2.0 */
|
||||
#define IPMI_PRIVILEGE_LEVEL_UNSPECIFIED 0x00 /* RMCP+ Cipher Suite Priv Config */
|
||||
#define IPMI_PRIVILEGE_LEVEL_CALLBACK 0x01
|
||||
#define IPMI_PRIVILEGE_LEVEL_USER 0x02
|
||||
#define IPMI_PRIVILEGE_LEVEL_OPERATOR 0x03
|
||||
#define IPMI_PRIVILEGE_LEVEL_ADMIN 0x04
|
||||
#define IPMI_PRIVILEGE_LEVEL_OEM 0x05
|
||||
#define IPMI_PRIVILEGE_LEVEL_NO_ACCESS 0x0F
|
||||
|
||||
#define IPMI_PRIVILEGE_LEVEL_VALID(__privilege_level) \
|
||||
(((__privilege_level) == IPMI_PRIVILEGE_LEVEL_CALLBACK \
|
||||
|| (__privilege_level) == IPMI_PRIVILEGE_LEVEL_USER \
|
||||
|| (__privilege_level) == IPMI_PRIVILEGE_LEVEL_OPERATOR \
|
||||
|| (__privilege_level) == IPMI_PRIVILEGE_LEVEL_ADMIN \
|
||||
|| (__privilege_level) == IPMI_PRIVILEGE_LEVEL_OEM) ? 1 : 0)
|
||||
|
||||
#define IPMI_1_5_PRIVILEGE_LEVEL_VALID(__privilege_level) \
|
||||
IPMI_PRIVILEGE_LEVEL_VALID (__privilege_level)
|
||||
|
||||
#define IPMI_2_0_PRIVILEGE_LEVEL_VALID(__privilege_level) \
|
||||
(((__privilege_level) == IPMI_PRIVILEGE_LEVEL_HIGHEST_LEVEL \
|
||||
|| IPMI_PRIVILEGE_LEVEL_VALID (__privilege_level)) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_PRIVILEGE_LEVEL_SPEC_H */
|
277
source/freeipmi/usr/include/freeipmi/spec/ipmi-product-id-spec.h
Normal file
277
source/freeipmi/usr/include/freeipmi/spec/ipmi-product-id-spec.h
Normal file
@ -0,0 +1,277 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_PRODUCT_ID_SPEC_H
|
||||
#define IPMI_PRODUCT_ID_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************
|
||||
* Dell *
|
||||
*******************************************/
|
||||
|
||||
/* achu: I believe 256 to be the poweredge "family" of products, but
|
||||
* I'm not sure. At minimum, it covers the 2900, 2950, R610, and
|
||||
* R710.
|
||||
*/
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_BASE 256
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_2900 IPMI_DELL_PRODUCT_ID_POWEREDGE_BASE
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_2950 IPMI_DELL_PRODUCT_ID_POWEREDGE_BASE
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_R610 IPMI_DELL_PRODUCT_ID_POWEREDGE_BASE
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_R710 IPMI_DELL_PRODUCT_ID_POWEREDGE_BASE
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_R720 IPMI_DELL_PRODUCT_ID_POWEREDGE_BASE
|
||||
|
||||
/* achu: 0 doesn't seem right? Did the manufacturer not burn the
|
||||
* right ID in?
|
||||
*/
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_C410X 0
|
||||
|
||||
/*******************************************
|
||||
* Fujitsu *
|
||||
*******************************************/
|
||||
|
||||
/*
|
||||
* Fujitsu Siemens Computers
|
||||
* Fujitsu Technology Solutions
|
||||
* iRMC S1 / iRMC S2
|
||||
*/
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_MIN 0x0200
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_MAX 0x03FF
|
||||
|
||||
// iRMC-S1 based systems
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX200S3 0x0200
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX300S3 0x0201
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX200S3 0x0202
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX300S3 0x0203
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_UNUSEDS3 0x0204
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX100S4 0x0205
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX150S5 0x0206
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX120S1 0x0207
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX630S2 0x0208
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX330S1 0x0209
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_E230RN1 0x0210
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_E230RSL 0x0211
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX330S1_SHA 0x0212
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX630S2_SHA 0x0213
|
||||
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_IS_IRMC_S1(__product_id) \
|
||||
(((__product_id) == IPMI_FUJITSU_PRODUCT_ID_TX200S3 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_TX300S3 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_RX200S3 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_RX300S3 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_UNUSEDS3 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_RX100S4 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_TX150S5 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_TX120S1 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_BX630S2 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_RX330S1 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_E230RN1 \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_E230RSL \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_RX330S1_SHA \
|
||||
|| (__product_id) == IPMI_FUJITSU_PRODUCT_ID_BX630S2_SHA) ? 1 : 0)
|
||||
|
||||
// iRMC-S2 based systems
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX600S4 0x0218
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX200S4 0x0220
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX300S4 0x0221
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX200S4 0x0222
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX300S4 0x0223
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_UNUSEDS4 0x0224
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX100S5 0x0225
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX150S6 0x0226
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX120S2 0x0227
|
||||
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX150S6_64K 0x0233
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX200S4_64K 0x0234
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX300S4_64K 0x0235
|
||||
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX200S5 0x0240
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX300S5 0x0241
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX200S5 0x0242
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX300S5 0x0243
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX620S5 0x0244
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX100S6 0x0245
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX150S7 0x0246
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX960S1 0x0254
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX924S1 0x0255
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX920S1 0x0256
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_BX922S1 0x0257
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX600S5 0x0258
|
||||
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX200S6 0x0260
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_TX300S6 0x0261
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX200S6 0x0262
|
||||
#define IPMI_FUJITSU_PRODUCT_ID_RX300S6 0x0263
|
||||
|
||||
/*******************************************
|
||||
* HP *
|
||||
*******************************************/
|
||||
|
||||
#define IPMI_HP_PRODUCT_ID_PROLIANT_DL160_G8 8192
|
||||
|
||||
/*******************************************
|
||||
* Intel *
|
||||
*******************************************/
|
||||
|
||||
#define IPMI_INTEL_PRODUCT_ID_SR870BN4 256
|
||||
#define IPMI_INTEL_PRODUCT_ID_TIGER4 IPMI_INTEL_PRODUCT_ID_SR870BN4
|
||||
|
||||
#define IPMI_INTEL_PRODUCT_ID_S5500WB 62
|
||||
#define IPMI_INTEL_PRODUCT_ID_SR1625 62
|
||||
|
||||
/* Quanta motherboard, but listed under a Intel manufacturer ID, why?? */
|
||||
#define IPMI_INTEL_PRODUCT_ID_QUANTA_QSSC_S4R 64
|
||||
|
||||
#define IPMI_INTEL_PRODUCT_ID_S2600JF 77
|
||||
|
||||
#define IPMI_INTEL_PRODUCT_ID_S5000PAL 40
|
||||
|
||||
#define IPMI_INTEL_PRODUCT_ID_WINDMILL 2818
|
||||
|
||||
#define IPMI_INTEL_PRODUCT_ID_S2600KP 111
|
||||
#define IPMI_INTEL_PRODUCT_ID_S2600WT2 112
|
||||
#define IPMI_INTEL_PRODUCT_ID_S2600WTT 112
|
||||
|
||||
/*
|
||||
* Intel derived
|
||||
*/
|
||||
|
||||
#define IPMI_CALIFORNIA_DIGITAL_PRODUCT_ID_6440 IPMI_INTEL_PRODUCT_ID_SR870BN4
|
||||
|
||||
#define IPMI_PENGUIN_COMPUTING_PRODUCT_ID_RELION_700 IPMI_INTEL_PRODUCT_ID_S5500WB
|
||||
|
||||
#define IPMI_APPRO_PRODUCT_ID_512X IPMI_INTEL_PRODUCT_ID_S2600JF
|
||||
|
||||
#define IPMI_APPRO_PRODUCT_ID_QG812X_CN IPMI_INTEL_PRODUCT_ID_QUANTA_QSSC_S4R
|
||||
|
||||
#define IPMI_QUANTA_PRODUCT_ID_WINTERFELL IPMI_INTEL_PRODUCT_ID_WINDMILL
|
||||
|
||||
#define IPMI_WIWYNN_PRODUCT_ID_WINDMILL IPMI_INTEL_PRODUCT_ID_WINDMILL
|
||||
|
||||
/*******************************************
|
||||
* IBM *
|
||||
*******************************************/
|
||||
|
||||
#define IPMI_IBM_PRODUCT_ID_X3455 20566
|
||||
#define IPMI_IBM_PRODUCT_ID_X3755 14
|
||||
|
||||
/*******************************************
|
||||
* Inventec *
|
||||
*******************************************/
|
||||
|
||||
#define IPMI_INVENTEC_PRODUCT_ID_5441 51
|
||||
#define IPMI_INVENTEC_PRODUCT_ID_5442 52
|
||||
|
||||
/*
|
||||
* Inventec derived
|
||||
*/
|
||||
|
||||
#define IPMI_DELL_PRODUCT_ID_XANADU_II IPMI_INVENTEC_PRODUCT_ID_5441
|
||||
#define IPMI_DELL_PRODUCT_ID_XANADU_III IPMI_INVENTEC_PRODUCT_ID_5442
|
||||
|
||||
/*******************************************
|
||||
* Quanta *
|
||||
*******************************************/
|
||||
|
||||
#define IPMI_QUANTA_PRODUCT_ID_S99Q 21401
|
||||
|
||||
/*
|
||||
* Quanta derived
|
||||
*/
|
||||
|
||||
#define IPMI_DELL_PRODUCT_ID_FS12_TY IPMI_QUANTA_PRODUCT_ID_S99Q
|
||||
|
||||
/*******************************************
|
||||
* Sun Microsystems *
|
||||
*******************************************/
|
||||
|
||||
#define IPMI_SUN_MICROSYSTEMS_PRODUCT_ID_X4140 18177
|
||||
|
||||
/*******************************************
|
||||
* Supermicro *
|
||||
*******************************************/
|
||||
|
||||
/* Seen in the wild w/ Peppercon IANA number 10437 */
|
||||
/* achu: there is no product name pattern here, what gives Supermicro? */
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_FOUR_BASE 4
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X7DBR_3 IPMI_SUPERMICRO_PRODUCT_ID_FOUR_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X7DB8 IPMI_SUPERMICRO_PRODUCT_ID_FOUR_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTN IPMI_SUPERMICRO_PRODUCT_ID_FOUR_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X7SBI_LN4 IPMI_SUPERMICRO_PRODUCT_ID_FOUR_BASE
|
||||
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_PEPPERCON_X7DBR_3 IPMI_SUPERMICRO_PRODUCT_ID_X7DBR_3
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_PEPPERCON_X7DB8 IPMI_SUPERMICRO_PRODUCT_ID_X7DB8
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_PEPPERCON_X8DTN IPMI_SUPERMICRO_PRODUCT_ID_X8DTN
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_PEPPERCON_X7SBI_LN4 IPMI_SUPERMICRO_PRODUCT_ID_X7SBI_LN4
|
||||
|
||||
/* Seen in the wild w/ Supermicro workaround IANA number 47488 */
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DT_BASE 43707
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTH IPMI_SUPERMICRO_PRODUCT_ID_X8DT_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTG IPMI_SUPERMICRO_PRODUCT_ID_X8DT_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTU IPMI_SUPERMICRO_PRODUCT_ID_X8DT_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DT3_LN4F IPMI_SUPERMICRO_PRODUCT_ID_X8DT_BASE
|
||||
/* achu: X8DTU-6+, why not same as above? Not sure, possibly created
|
||||
* specifically for vendor or vendor changed for themselves.
|
||||
*/
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTU_6PLUS 1549
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTL_BASE 6
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTL IPMI_SUPERMICRO_PRODUCT_ID_X8DTL_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTL_3F IPMI_SUPERMICRO_PRODUCT_ID_X8DTL_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8SIL_F 1541
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9SC_BASE 1572
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9SCL IPMI_SUPERMICRO_PRODUCT_ID_X9SC_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9SCM IPMI_SUPERMICRO_PRODUCT_ID_X9SC_BASE
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8DTNPLUS_F 1551
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X8SIE 1037
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9SCA_F_O 1585
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_H8DGU_F 43025
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_H8DG6 48145
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_H8DGU 4520
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9DRI_LN4F_PLUS 1574
|
||||
|
||||
/* Seen in the wild w/ proper IANA number 10876 */
|
||||
/* defined above: IPMI_SUPERMICRO_PRODUCT_ID_X9SCM */
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9DRI_F 1576
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9SPU_F_O 1603
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_X9SCM_IIF 1600
|
||||
|
||||
/* Seen in the wild w/ Magnum Technologies IANA number 5593 */
|
||||
#define IPMI_SUPERMICRO_PRODUCT_ID_MAGNUM_TECHNOLOGIES_X8DTL IPMI_SUPERMICRO_PRODUCT_ID_X8DTL
|
||||
|
||||
/*******************************************
|
||||
* Wistron *
|
||||
*******************************************/
|
||||
|
||||
/* achu: don't know original product name, so just using C6220.
|
||||
* Will readjust as needed if learned later.
|
||||
*/
|
||||
#define IPMI_WISTRON_PRODUCT_ID_C6220 131
|
||||
|
||||
/*
|
||||
* Wistron derived
|
||||
*/
|
||||
|
||||
#define IPMI_DELL_PRODUCT_ID_POWEREDGE_C6220 IPMI_WISTRON_PRODUCT_ID_C6220
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_PRODUCT_ID_SPEC_H */
|
@ -0,0 +1,116 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef IPMI_RMCPPLUS_STATUS_SPEC_H
|
||||
#define IPMI_RMCPPLUS_STATUS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* RMCP+ and RAKP Message Status Codes
|
||||
-------------------------------- */
|
||||
#define RMCPPLUS_STATUS_NO_ERRORS 0x00
|
||||
#define RMCPPLUS_STATUS_NO_ERRORS_STR \
|
||||
"No errors."
|
||||
|
||||
#define RMCPPLUS_STATUS_INSUFFICIENT_RESOURCES_TO_CREATE_A_SESSION 0x01
|
||||
#define RMCPPLUS_STATUS_INSUFFICIENT_RESOURCES_TO_CREATE_A_SESSION_STR \
|
||||
"Insufficient resources to create a session."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_SESSION_ID 0x02
|
||||
#define RMCPPLUS_STATUS_INVALID_SESSION_ID_STR \
|
||||
"Invalid Session ID."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_PAYLOAD_TYPE 0x03
|
||||
#define RMCPPLUS_STATUS_INVALID_PAYLOAD_TYPE_STR \
|
||||
"Invalid payload type."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_AUTHENTICATION_ALGORITHM 0x04
|
||||
#define RMCPPLUS_STATUS_INVALID_AUTHENTICATION_ALGORITHM_STR \
|
||||
"Invalid authentication algorithm."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_INTEGRITY_ALGORITHM 0x05
|
||||
#define RMCPPLUS_STATUS_INVALID_INTEGRITY_ALGORITHM_STR \
|
||||
"Invalid integrity algorithm."
|
||||
|
||||
#define RMCPPLUS_STATUS_NO_MATCHING_AUTHENTICATION_PAYLOAD 0x06
|
||||
#define RMCPPLUS_STATUS_NO_MATCHING_AUTHENTICATION_PAYLOAD_STR \
|
||||
"No matching authentication payload."
|
||||
|
||||
#define RMCPPLUS_STATUS_NO_MATCHING_INTEGRITY_PAYLOAD 0x07
|
||||
#define RMCPPLUS_STATUS_NO_MATCHING_INTEGRITY_PAYLOAD_STR \
|
||||
"No mathing integrity payload."
|
||||
|
||||
#define RMCPPLUS_STATUS_INACTIVE_SESSION_ID 0x08
|
||||
#define RMCPPLUS_STATUS_INACTIVE_SESSION_ID_STR \
|
||||
"Inactive Session ID"
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_ROLE 0x09
|
||||
#define RMCPPLUS_STATUS_INVALID_ROLE_STR \
|
||||
"Invalid role."
|
||||
|
||||
#define RMCPPLUS_STATUS_UNAUTHORIZED_ROLE_OR_PRIVILEGE_LEVEL_REQUESTED 0x0A
|
||||
#define RMCPPLUS_STATUS_UNAUTHORIZED_ROLE_OR_PRIVILEGE_LEVEL_REQUESTED_STR \
|
||||
"Unauthorized role or privelege level requested."
|
||||
|
||||
#define RMCPPLUS_STATUS_INSUFFICIENT_RESOURCES_TO_CREATE_A_SESSION_AT_THE_REQUESTED_TIME 0x0B
|
||||
#define RMCPPLUS_STATUS_INSUFFICIENT_RESOURCES_TO_CREATE_A_SESSION_AT_THE_REQUESTED_TIME_STR \
|
||||
"Insufficient resources to create a session at the requested time."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_NAME_LENGTH 0x0C
|
||||
#define RMCPPLUS_STATUS_INVALID_NAME_LENGTH_STR \
|
||||
"Invalid name length."
|
||||
|
||||
#define RMCPPLUS_STATUS_UNAUTHORIZED_NAME 0x0D
|
||||
#define RMCPPLUS_STATUS_UNAUTHORIZED_NAME_STR \
|
||||
"Unauthorized name."
|
||||
|
||||
#define RMCPPLUS_STATUS_UNAUTHORIZED_GUID 0x0E
|
||||
#define RMCPPLUS_STATUS_UNAUTHORIZED_GUID_STR \
|
||||
"Unauthorized GUID. (GUID that BMC submitted in " \
|
||||
"RAKP Message 2 was not accepted by remote console)."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_INTEGRITY_CHECK_VALUE 0x0F
|
||||
#define RMCPPLUS_STATUS_INVALID_INTEGRITY_CHECK_VALUE_STR \
|
||||
"Invalid integrity check value."
|
||||
|
||||
#define RMCPPLUS_STATUS_INVALID_CONFIDENTIALITY_ALGORITHM 0x10
|
||||
#define RMCPPLUS_STATUS_INVALID_CONFIDENTIALITY_ALGORITHM_STR \
|
||||
"Invalid confidentiality algorithm."
|
||||
|
||||
#define RMCPPLUS_STATUS_NO_CIPHER_SUITE_MATCH_WITH_PROPOSED_SECURITY_ALGORITHMS 0x11
|
||||
#define RMCPPLUS_STATUS_NO_CIPHER_SUITE_MATCH_WITH_PROPOSED_SECURITY_ALGORITHMS_STR \
|
||||
"No Cipher Suite match with proposed security algorithms."
|
||||
|
||||
#define RMCPPLUS_STATUS_ILLEGAL_OR_UNRECOGNIZED_PARAMETER 0x12
|
||||
#define RMCPPLUS_STATUS_ILLEGAL_OR_UNRECOGNIZED_PARAMETER_STR \
|
||||
"Illegal or Unrecognized parameter."
|
||||
/* Reserved - all others */
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define RMCPPLUS_STATUS_VALID(__status) \
|
||||
(((__status + 1) >= RMCPPLUS_STATUS_INSUFFICIENT_RESOURCES_TO_CREATE_A_SESSION \
|
||||
&& (__status) <= RMCPPLUS_STATUS_ILLEGAL_OR_UNRECOGNIZED_PARAMETER) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_RMCPPLUS_STATUS_SPEC_H */
|
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-fujitsu-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-hp-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-intel-node-manager-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-quanta-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-supermicro-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-and-event-code-tables-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SPEC_H */
|
@ -0,0 +1,907 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/************************************************
|
||||
* Generic Event Reading Type Code Offsets *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_LOWER_NON_CRITICAL_GOING_LOW 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_LOWER_NON_CRITICAL_GOING_HIGH 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_LOWER_CRITICAL_GOING_LOW 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_LOWER_CRITICAL_GOING_HIGH 0x03
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_LOWER_NON_RECOVERABLE_GOING_LOW 0x04
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_LOWER_NON_RECOVERABLE_GOING_HIGH 0x05
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_UPPER_NON_CRITICAL_GOING_LOW 0x06
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_UPPER_NON_CRITICAL_GOING_HIGH 0x07
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_UPPER_CRITICAL_GOING_LOW 0x08
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_UPPER_CRITICAL_GOING_HIGH 0x09
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_UPPER_NON_RECOVERABLE_GOING_LOW 0x0A
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_THRESHOLD_UPPER_NON_RECOVERABLE_GOING_HIGH 0x0B
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_STATE_TRANSITION_TO_IDLE 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_STATE_TRANSITION_TO_ACTIVE 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_STATE_TRANSITION_TO_BUSY 0x02
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_STATE_DEASSERTED 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_STATE_ASSERTED 0x01
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_PREDICTIVE_FAILURE_DEASSERTED 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_PREDICTIVE_FAILURE_ASSERTED 0x01
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_LIMIT_NOT_EXCEEDED 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_LIMIT_EXCEEDED 0x01
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_PERFORMANCE_MET 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_PERFORMANCE_LAGS 0x01
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_OK 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_NON_CRITICAL_FROM_OK 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_CRITICAL_FROM_LESS_SEVERE 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_NON_RECOVERABLE_FROM_LESS_SEVERE 0x03
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_NON_CRITICAL_FROM_MORE_SEVERE 0x04
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_CRITICAL_FROM_NON_RECOVERABLE 0x05
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_TRANSITION_TO_NON_RECOVERABLE 0x06
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_MONITOR 0x07
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_SEVERITY_INFORMATIONAL 0x08
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_DEVICE_PRESENT_DEVICE_PRESENT 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_DEVICE_PRESENT_DEVICE_ABSENT 0x01
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_DEVICE_ENABLED_DEVICE_DISABLED 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_DEVICE_ENABLED_DEVICE_ENABLED 0x01
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_RUNNING 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_IN_TEST 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_POWER_OFF 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_ON_LINE 0x03
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_OFF_LINE 0x04
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_OFF_DUTY 0x05
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_DEGRADED 0x06
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_TRANSITION_TO_POWER_SAVE 0x07
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_TRANSITION_AVAILABILITY_INSTALL_ERROR 0x08
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_FULLY_REDUNDANT 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_REDUNDANCY_LOST 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_REDUNDANCY_DEGRADED 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_NON_REDUNDANT_SUFFICIENT_RESOURCES_FROM_REDUNDANT 0x03
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_NON_REDUNDANT_SUFFICIENT_RESOURCES_FROM_INSUFFICIENT_RESOURCES 0x04
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_NON_REDUNDANT_INSUFFICIENT_RESOURCES 0x05
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_REDUNDANCY_DEGRADED_FROM_FULLY_REDUNDANT 0x06
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_REDUNDANCY_REDUNDANCY_DEGRADED_FROM_NON_REDUNDANT 0x07
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_ACPI_POWER_STATE_D0_POWER_STATE 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_ACPI_POWER_STATE_D1_POWER_STATE 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_ACPI_POWER_STATE_D2_POWER_STATE 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_ACPI_POWER_STATE_D3_POWER_STATE 0x03
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_threshold[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_threshold_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_transition_state[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_transition_state_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_state[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_state_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_predictive_failure[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_predictive_failure_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_limit[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_limit_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_performance[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_performance_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_transition_severity[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_transition_severity_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_device_present[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_device_present_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_device_enabled[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_device_enabled_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_transition_availability[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_transition_availability_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_redundancy[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_redundancy_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_acpi_power_state[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_acpi_power_state_max_index;
|
||||
|
||||
/*
|
||||
* "short" arrays are same strings, but shortened to more reasonble lengths for output
|
||||
*/
|
||||
extern const char * const ipmi_generic_event_reading_type_code_threshold_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_threshold_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_transition_state_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_transition_state_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_state_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_state_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_predictive_failure_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_predictive_failure_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_limit_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_limit_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_performance_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_performance_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_transition_severity_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_transition_severity_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_device_present_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_device_present_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_device_enabled_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_device_enabled_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_transition_availability_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_transition_availability_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_redundancy_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_redundancy_short_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_acpi_power_state_short[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_acpi_power_state_short_max_index;
|
||||
|
||||
/************************************************
|
||||
* Sensor Type Code Offsets *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_GENERAL_CHASSIS_INTRUSION 0x00
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_DRIVE_BAY_INTRUSION 0x01
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_IO_CARD_AREA_INTRUSION 0x02
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_PROCESSOR_AREA_INTRUSION 0x03
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_LAN_LEASH_LOST 0x04
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_UNAUTHORIZED_DOCK 0x05
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_FAN_AREA_INTRUSION 0x06
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT_SECURE_MODE_VIOLATION_ATTEMPT 0x00
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT_PRE_BOOT_PASSWORD_VIOLATION_USER_PASSWORD 0x01
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT_PRE_BOOT_PASSWORD_VIOLATION_ATTEMPT_SETUP_PASSWORD 0x02
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT_PRE_BOOT_PASSWORD_VIOLATION_NETWORK_BOOT_PASSWORD 0x03
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT_OTHER_PRE_BOOT_PASSWORD_VIOLATION 0x04
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT_OUT_OF_BAND_ACCESS_PASSWORD_VIOLATION 0x05
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_IERR 0x00
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_THERMAL_TRIP 0x01
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_FRB1_BIST_FAILURE 0x02
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_FRB2_HANG_IN_POST_FAILURE 0x03
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_FRB3_PROCESSOR_STARTUP_INITIALIZATION_FAILURE 0x04
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_CONFIGURATION_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_SMBIOS_UNCORRECTABLE_CPU_COMPLEX_ERROR 0x06
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_PROCESSOR_PRESENCE_DETECTED 0x07
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_PROCESSOR_DISABLED 0x08
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_TERMINATOR_PRESENCE_DETECTED 0x09
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_PROCESSOR_AUTOMATICALLY_THROTTLED 0x0A
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_MACHINE_CHECK_EXCEPTION 0x0B
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_CORRECTABLE_MACHINE_CHECK_ERROR 0x0C
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_PRESENCE_DETECTED 0x00
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_POWER_SUPPLY_FAILURE_DETECTED 0x01
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_PREDICTIVE_FAILURE 0x02
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_POWER_SUPPLY_INPUT_LOST_AC_DC 0x03
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_POWER_SUPPLY_INPUT_LOST_OR_OUT_OF_RANGE 0x04
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_POWER_SUPPLY_INPUT_OUT_OF_RANGE_BUT_PRESENT 0x05
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_CONFIGURATION_ERROR 0x06
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_POWER_SUPPLY_INACTIVE 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_VENDOR_MISMATCH 0x00
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_REVISION_MISMATCH 0x01
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_PROCESSOR_MISSING 0x02
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_POWER_SUPPLY_RATING_MISMATCH 0x03
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_VOLTAGE_RATING_MISMATCH 0x04
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_POWER_OFF_POWER_DOWN 0x00
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_POWER_CYCLE 0x01
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_240VA_POWER_DOWN 0x02
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_INTERLOCK_POWER_DOWN 0x03
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_AC_LOST 0x04
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_SOFT_POWER_CONTROL_FAILURE 0x05
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_POWER_UNIT_FAILURE_DETECTED 0x06
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT_PREDICTIVE_FAILURE 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_CORRECTABLE_MEMORY_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_UNCORRECTABLE_MEMORY_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_PARITY 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_MEMORY_SCRUB_FAILED 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_MEMORY_DEVICE_DISABLED 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_CORRECTABLE_MEMORY_ERROR_LOGGING_LIMIT_REACHED 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_PRESENCE_DETECTED 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_CONFIGURATION_ERROR 0x07
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_SPARE 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_MEMORY_AUTOMATICALLY_THROTTLED 0x09
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_CRITICAL_OVERTEMPERATURE 0x0A
|
||||
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_DRIVE_PRESENCE 0x00
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_DRIVE_FAULT 0x01
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_PREDICTIVE_FAILURE 0x02
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_HOT_SPARE 0x03
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_CONSISTENCY_CHECK_PARITY_CHECK_IN_PROGRESS 0x04
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_IN_CRITICAL_ARRAY 0x05
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_IN_FAILED_ARRAY 0x06
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_REBUILD_REMAP_IN_PROGRESS 0x07
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT_REBUILD_REMAP_ABORTED 0x08
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_SYSTEM_FIRMWARE_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_SYSTEM_FIRMWARE_HANG 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_SYSTEM_FIRMWARE_PROGRESS 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNSPECIFIED 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_NO_SYSTEM_MEMORY 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_NO_USABLE_SYSTEM_MEMORY 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNRECOVERABLE_HARD_DISK_ATPI_IDE_DEVICE_FAILURE 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNRECOVERABLE_SYSTEM_BOARD_FAILURE 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNRECOVERABLE_DISKETTE_SUBSYSTEM_FAILURE 0x05
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNRECOVERABLE_HARD_DISK_CONTROLLER_FAILURE 0x06
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNRECOVERABLE_PS2_OR_USB_KEYBOARD_FAILURE 0x07
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_REMOVABLE_BOOT_MEDIA_NOT_FOUND 0x08
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_UNRECOVERABLE_VIDEO_CONTROLLER_FAILURE 0x09
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_NO_VIDEO_DEVICE_DETECTED 0x0A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_FIRMWARE_ROM_CORRUPTION_DETECTED 0x0B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_CPU_VOLTAGE_MISMATCH 0x0C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_ERROR_CPU_SPEED_MATCHING_FAILURE 0x0D
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_UNSPECIFIED 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_MEMORY_INITIALIZATION 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_HARD_DISK_INITIALIZATION 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_SECONDARY_PROCESSORS_INITIALIZATION 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_USER_AUTHENTICATION 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_USER_INITIATED_SYSTEM_SETUP 0x05
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_USB_RESOURCE_CONFIGURATION 0x06
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_PCI_RESOURCE_CONFIGURATION 0x07
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_OPTION_ROM_INITIALIZATION 0x08
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_VIDEO_INITIALIZATION 0x09
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_CACHE_INITIALIZATION 0x0A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_SM_BUS_INITIALIZATION 0x0B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_KEYBOARD_CONTROLLER_INITIALIZATION 0x0C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_EMBEDDED_CONTROLLER_MANAGEMENT_CONTROLLER_INITIALIZATION 0x0D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_DOCKING_STATION_ATTACHMENT 0x0E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_ENABLING_DOCKING_STATION 0x0F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_DOCKING_STATION_EJECTION 0x10
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_DISABLING_DOCKING_STATION 0x11
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_CALLING_OPERATING_SYSTEM_WAKE_UP_VECTOR 0x12
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_STARTING_OPERATING_SYSTEM_BOOT_PROCESS 0x13
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_BASEBOARD_OR_MOTHERBOARD_INITIALIZATION 0x14
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_RESERVED 0x15
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_FLOPPY_INITIALIZATION 0x16
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_KEYBOARD_TEST 0x17
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_POINTING_DEVICE_TEST 0x18
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_HANG_PRIMARY_PROCESSOR_INITIALIZATION 0x19
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_UNSPECIFIED 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_MEMORY_INITIALIZATION 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_HARD_DISK_INITIALIZATION 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_SECONDARY_PROCESSORS_INITIALIZATION 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_USER_AUTHENTICATION 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_USER_INITIATED_SYSTEM_SETUP 0x05
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_USB_RESOURCE_CONFIGURATION 0x06
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_PCI_RESOURCE_CONFIGURATION 0x07
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_OPTION_ROM_INITIALIZATION 0x08
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_VIDEO_INITIALIZATION 0x09
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_CACHE_INITIALIZATION 0x0A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_SM_BUS_INITIALIZATION 0x0B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_KEYBOARD_CONTROLLER_INITIALIZATION 0x0C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_EMBEDDED_CONTROLLER_MANAGEMENT_CONTROLLER_INITIALIZATION 0x0D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_DOCKING_STATION_ATTACHMENT 0x0E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_ENABLING_DOCKING_STATION 0x0F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_DOCKING_STATION_EJECTION 0x10
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_DISABLING_DOCKING_STATION 0x11
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_CALLING_OPERATING_SYSTEM_WAKE_UP_VECTOR 0x12
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_STARTING_OPERATING_SYSTEM_BOOT_PROCESS 0x13
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_BASEBOARD_OR_MOTHERBOARD_INITIALIZATION 0x14
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_RESERVED 0x15
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_FLOPPY_INITIALIZATION 0x16
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_KEYBOARD_TEST 0x17
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_POINTING_DEVICE_TEST 0x18
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA2_OFFSET_SYSTEM_FIRMWARE_PROGRESS_PRIMARY_PROCESSOR_INITIALIZATION 0x19
|
||||
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_CORRECTABLE_MEMORY_ERROR_LOGGING_DISABLED 0x00
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_EVENT_TYPE_LOGGING_DISABLED 0x01
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_LOG_AREA_RESET_CLEARED 0x02
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_ALL_EVENT_LOGGING_DISABLED 0x03
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_SEL_FULL 0x04
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_SEL_ALMOST_FULL 0x05
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_CORRECTABLE_MACHINE_CHECK_ERROR_LOGGING_DISABLED 0x06
|
||||
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_EVENT_DATA3_OFFSET_EVENT_TYPE_LOGGING_DISABLED_DEASSERTION_EVENT 0x0
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_EVENT_DATA3_OFFSET_EVENT_TYPE_LOGGING_DISABLED_ASSERTION_EVENT 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_EVENT_DATA3_OFFSET_EVENT_TYPE_LOGGING_DISABLED_LOGGING_HAS_BEEN_DISABLED_FOR_ALL_EVENTS_OF_A_GIVEN_TYPE 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_EVENT_DATA3_OFFSET_CORRECTABLE_MACHINE_CHECK_ERROR_LOGGING_DISABLED_ENTITY_INSTANCE_NUMBER 0x0
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED_EVENT_DATA3_OFFSET_CORRECTABLE_MACHINE_CHECK_ERROR_LOGGING_DISABLED_VENDOR_SPECIFIC_PROCESSOR_NUMBER 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_BIOS_WATCHDOG_RESET 0x00
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_RESET 0x01
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_SHUT_DOWN 0x02
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_POWER_DOWN 0x03
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_POWER_CYCLE 0x04
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_NMI_DIAGNOSTIC_INTERRUPT 0x05
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_EXPIRED_STATUS_ONLY 0x06
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1_OS_WATCHDOG_PRE_TIMEOUT_INTERRUPT_NON_NMI 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_SYSTEM_RECONFIGURED 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_OEM_SYSTEM_BOOT_EVENT 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_UNDETERMINED_SYSTEM_HARDWARE_FAILURE 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_ENTRY_ADDED_TO_AUXILIARY_LOG 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_PEF_ACTION 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_TIMESTAMP_CLOCK_SYNCH 0x05
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_ENTRY_ACTION_ENTRY_ADDED 0x0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_ENTRY_ACTION_ENTRY_ADDED_BECAUSE_EVENT_DID_NOT_BE_MAP_TO_STANDARD_IPMI_EVENT 0x1
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_ENTRY_ACTION_ENTRY_ADDED_ALONG_WITH_ONE_OR_MORE_CORRESPONDING_SEL_ENTRIES 0x2
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_ENTRY_ACTION_LOG_CLEARED 0x3
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_ENTRY_ACTION_LOG_DISABLED 0x4
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_ENTRY_ACTION_LOG_ENABLED 0x5
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_TYPE_MCA 0x0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_TYPE_OEM1 0x1
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_ENTRY_ADDED_TO_AUXILIARY_LOG_LOG_TYPE_OEM2 0x2
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_PEF_ACTION_BITMASK_ALERT 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_PEF_ACTION_BITMASK_POWER_OFF 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_PEF_ACTION_BITMASK_RESET 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_PEF_ACTION_BITMASK_POWER_CYCLE 0x08
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_PEF_ACTION_BITMASK_OEM_ACTION 0x10
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_PEF_ACTION_BITMASK_DIAGNOSTIC_INTERRUPT 0x20
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_TIMESTAMP_CLOCK_SYNCH_EVENT_IS_FIRST_OF_PAIR 0x0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_TIMESTAMP_CLOCK_SYNCH_EVENT_IS_SECOND_OF_PAIR 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_TIMESTAMP_CLOCK_SYNCH_SEL_TIMESTAMP_CLOCK_UPDATED 0x0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OFFSET_TIMESTAMP_CLOCK_SYNCH_SDR_TIMESTAMP_CLOCK_UPDATED 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_FRONT_PANEL_NMI_DIAGNOSTIC_INTERRUPT 0x00
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_BUS_TIMEOUT 0x01
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_IO_CHANNEL_CHECK_NMI 0x02
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_SOFTWARE_NMI 0x03
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_PCI_PERR 0x04
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_PCI_SERR 0x05
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EISA_FAIL_SAFE_TIMEOUT 0x06
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_BUS_CORRECTABLE_ERROR 0x07
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_BUS_UNCORRECTABLE_ERROR 0x08
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_FATAL_NMI 0x09
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_BUS_FATAL_ERROR 0x0A
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_BUS_DEGRADED 0x0B
|
||||
|
||||
#define IPMI_SENSOR_TYPE_BUTTON_SWITCH_POWER_BUTTON_PRESSED 0x00
|
||||
#define IPMI_SENSOR_TYPE_BUTTON_SWITCH_SLEEP_BUTTON_PRESSED 0x01
|
||||
#define IPMI_SENSOR_TYPE_BUTTON_SWITCH_RESET_BUTTON_PRESSED 0x02
|
||||
#define IPMI_SENSOR_TYPE_BUTTON_SWITCH_FRU_LATCH_OPEN 0x03
|
||||
#define IPMI_SENSOR_TYPE_BUTTON_SWITCH_FRU_SERVICE_REQUEST_BUTTON 0x04
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CHIP_SET_SOFT_POWER_CONTROL_FAILURE 0x00
|
||||
#define IPMI_SENSOR_TYPE_CHIP_SET_THERMAL_TRIP 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S0_G0 0x00
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S1 0x01
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S2 0x02
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S3 0x03
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S4 0x04
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S5_G2 0x05
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S4_S5_SOFT_OFF 0x06
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_G3 0x07
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_SLEEPING_S1_S2_S3 0x08
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_G1_SLEEPING 0x09
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_S5_ENTERED_BY_OVERRIDE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_LEGACY_ON_STATE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA2_LEGACY_OFF_STATE 0x0C
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S0_G0 0x00
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S1 0x01
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S2 0x02
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S3 0x03
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S4 0x04
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S5_G2 0x05
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S4_S5_SOFT_OFF 0x06
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_G3 0x07
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_SLEEPING_S1_S2_S3 0x08
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_G1_SLEEPING 0x09
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_S5_ENTERED_BY_OVERRIDE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_LEGACY_ON_STATE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_LEGACY_OFF_STATE 0x0C
|
||||
#define IPMI_SENSOR_TYPE_CHIP_EVENT_DATA3_UNKNOWN 0x0D
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CABLE_INTERCONNECT_IS_CONNECTED 0x00
|
||||
#define IPMI_SENSOR_TYPE_CABLE_INTERCONNECT_CONFIGURATION_ERROR 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_INITIATED_BY_POWER_UP 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_INITIATED_BY_HARD_RESET 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_INITIATED_BY_WARM_RESET 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_USER_REQUESTED_PXE_BOOT 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_AUTOMATIC_BOOT_TO_DIAGNOSTIC 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_OS_RUN_TIME_SOFTWARE_INITIATED_HARD_RESET 0x05
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_OS_RUN_TIME_SOFTWARE_INITIATED_WARM_RESET 0x06
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_SYSTEM_RESTART 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_UNKNOWN 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_CHASSIS_CONTROL_COMMAND 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_RESET_VIA_PUSHBUTTON 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_POWER_UP_VIA_POWER_PUSHBUTTON 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_WATCHDOG_EXPIRATION 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_OEM 0x05
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_AUTOMATIC_POWER_UP_DUE_TO_ALWAYS_RESTORE_POWER_RESTORE_POLICY 0x06
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_AUTOMATIC_POWER_UP_DUE_TO_RESTORE_PREVIOUS_POWER_STATE_POWER_RESTORE_POLICY 0x07
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_RESET_VIA_PEF 0x08
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_POWER_CYCLE_VIA_PEF 0x09
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_SOFT_RESET 0x0A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED_EVENT_DATA2_OFFSET_SYSTEM_RESTART_POWER_UP_VIA_RTC_WAKEUP 0x0B
|
||||
|
||||
#define IPMI_SENSOR_TYPE_BOOT_ERROR_NO_BOOTABLE_MEDIA 0x00
|
||||
#define IPMI_SENSOR_TYPE_BOOT_ERROR_NON_BOOTABLE_DISKETTE_LEFT_IN_DRIVE 0x01
|
||||
#define IPMI_SENSOR_TYPE_BOOT_ERROR_PXE_SERVER_NOT_FOUND 0x02
|
||||
#define IPMI_SENSOR_TYPE_BOOT_ERROR_INVALID_BOOT_SECTOR 0x03
|
||||
#define IPMI_SENSOR_TYPE_BOOT_ERROR_TIMEOUT_WAITING_FOR_USER_SELECTION_OF_BOOT_SOURCE 0x04
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_A_BOOT_COMPLETED 0x00
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_C_BOOT_COMPLETED 0x01
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_PXE_BOOT_COMPLETED 0x02
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_DIAGNOSTIC_BOOT_COMPLETED 0x03
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_CD_ROM_BOOT_COMPLETED 0x04
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_ROM_BOOT_COMPLETED 0x05
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_BOOT_COMPLETED_BOOT_DEVICE_NOT_SPECIFIED 0x06
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_BASE_OS_HYPERVISOR_INSTALLATION_STARTED 0x07
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_BASE_OS_HYPERVISOR_INSTALLATION_COMPLETED 0x08
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_BASE_OS_HYPERVISOR_INSTALLATION_ABORTED 0x09
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT_BASE_OS_HYPERVISOR_INSTALLATION_FAILED 0x0A
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_CRITICAL_STOP_DURING_OS_LOAD 0x00
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_RUN_TIME_CRITICAL_STOP 0x01
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OS_GRACEFUL_STOP 0x02
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OS_GRACEFUL_SHUTDOWN 0x03
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_SOFT_SHUTDOWN_INITIATED_BY_PEF 0x04
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_AGENT_NOT_RESPONDING 0x05
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_FAULT_STATUS_ASSERTED 0x00
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_IDENTIFY_STATUS_ASSERTED 0x01
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_CONNECTOR_DEVICE_INSTALLED_ATTACHED 0x02
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_CONNECTOR_READY_FOR_DEVICE_INSTALLATION 0x03
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_CONNECTOR_READY_FOR_DEVICE_REMOVAL 0x04
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_POWER_IS_OFF 0x05
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_CONNECTOR_DEVICE_REMOVAL_REQUEST 0x06
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_INTERLOCK_ASSERTED 0x07
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_IS_DISABLED 0x08
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_SLOT_HOLDS_SPARE_DEVICE 0x09
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_PCI 0x00
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_DRIVE_ARRAY 0x01
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_EXTERNAL_PERIPHERAL_CONNECTOR 0x02
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_DOCKING 0x03
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_OTHER_STANDARD_INTERNAL_EXPANSION_SLOT 0x04
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_SLOT_ASSOCIATED_WITH_ENTITY_SPECIFIED_BY_ENTITY_ID_FOR_SENSOR 0x05
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_ADVANCEDTCA 0x06
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_DIMM_MEMORY_DEVICE 0x07
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_FAN 0x08
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_PCI_EXPRESS 0x09
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_SCSI 0x0A
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_SATA_SAS 0x0B
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR_EVENT_DATA2_USB 0x0C
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S0_G0 0x00
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S1 0x01
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S2 0x02
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S3 0x03
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S4 0x04
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S5_G2 0x05
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S4_S5_SOFT_OFF 0x06
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_G3_MECHANICAL_OFF 0x07
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_SLEEPING_IN_AN_S1_S2_OR_S3_STATES 0x08
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_G1_SLEEPING 0x09
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_S5_ENTERED_BY_OVERRIDE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_LEGACY_ON_STATE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_LEGACY_OFF_STATE 0x0C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_UNSPECIFIED 0x0D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE_UNKNOWN 0x0E
|
||||
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_TIMER_EXPIRED 0x00
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_HARD_RESET 0x01
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_POWER_DOWN 0x02
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_POWER_CYCLE 0x03
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_RESERVED1 0x04
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_RESERVED2 0x05
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_RESERVED3 0x06
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_RESERVED4 0x07
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_TIMER_INTERRUPT 0x08
|
||||
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_INTERRUPT_TYPE_NONE 0x0
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_INTERRUPT_TYPE_SMI 0x1
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_INTERRUPT_TYPE_NMI 0x2
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_INTERRUPT_TYPE_MESSAGE_INTERRUPT 0x3
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_INTERRUPT_TYPE_UNSPECIFIED 0xF
|
||||
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_RESERVED 0x0
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_BIOS_FRB2 0x1
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_BIOS_POST 0x2
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_OS_LOAD 0x3
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_SMS_OS 0x4
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_OEM 0x5
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2_EVENT_DATA2_TIMER_USE_AT_EXPIRATION_UNSPECIFIED 0xF
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_ALERT_PLATFORM_GENERATED_PAGE 0x00
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_ALERT_PLATFORM_GENERATED_LAN_ALERT 0x01
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_ALERT_PLATFORM_EVENT_TRAP_GENERATED 0x02
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_ALERT_PLATFORM_GENERATED_SNMP_TRAP 0x03
|
||||
|
||||
#define IPMI_SENSOR_TYPE_ENTITY_PRESENCE_ENTITY_PRESENT 0x00
|
||||
#define IPMI_SENSOR_TYPE_ENTITY_PRESENCE_ENTITY_ABSENT 0x01
|
||||
#define IPMI_SENSOR_TYPE_ENTITY_PRESENCE_ENTITY_DISABLED 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_LAN_HEARTBEAT_LOST 0x00
|
||||
#define IPMI_SENSOR_TYPE_LAN_HEARTBEAT 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_SENSOR_ACCESS_DEGRADED_OR_UNAVAILABLE 0x00
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_CONTROLLER_ACCESS_DEGRADED_OR_UNAVAILABLE 0x01
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_MANAGEMENT_CONTROLLER_OFF_LINE 0x02
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_MANAGEMENT_CONTROLLER_UNAVAILABLE 0x03
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_SENSOR_FAILURE 0x04
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_FRU_FAILURE 0x05
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_EVENT_DATA2_OFFSET_FRU_FAILURE_DEVICE_IS_NOT_A_LOGICAL_FRU_DEVICE 0x0
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH_EVENT_DATA2_OFFSET_FRU_FAILURE_DEVICE_IS_LOGICAL_FRU_DEVICE 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_BATTERY_BATTERY_LOW 0x00
|
||||
#define IPMI_SENSOR_TYPE_BATTERY_BATTERY_FAILED 0x01
|
||||
#define IPMI_SENSOR_TYPE_BATTERY_BATTERY_PRESENCE_DETECTED 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_SESSION_ACTIVATED 0x00
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_SESSION_DEACTIVATED 0x01
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_INVALID_USERNAME_OR_PASSWORD 0x02
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_INVALID_PASSWORD_DISABLE 0x03
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_EVENT_DATA3_OFFSET_SESSION_DEACTIVATED_DEACTIVATION_CAUSE_UNSPECIFIED 0x0
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_EVENT_DATA3_OFFSET_SESSION_DEACTIVATED_DEACTIVATION_CAUSE_CLOSE_SESSION_COMMAND 0x1
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_EVENT_DATA3_OFFSET_SESSION_DEACTIVATED_DEACTIVATION_CAUSE_TIMEOUT 0x2
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT_EVENT_DATA3_OFFSET_SESSION_DEACTIVATED_DEACTIVATION_CAUSE_CONFIGURATION_CHANGE 0x3
|
||||
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_HARDWARE_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY 0x00
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_FIRMWARE_OR_SOFTWARE_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY 0x01
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_HARDWARE_INCOMPATABILITY_DETECTED_WITH_ASSOCIATED_ENTITY 0x02
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_FIRMWARE_OR_SOFTWARE_INCOMPATABILITY_DETECTED_WITH_ASSOCIATED_ENTITY 0x03
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_ENTITY_IS_OF_AN_INVALID_OR_UNSUPPORTED_HARDWARE_VERSION 0x04
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_ENTITY_CONTAINS_AN_INVALID_OR_UNSUPPORTED_FIRMWARE_OR_SOFTWARE_VERSION 0x05
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_HARDWARE_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL 0x06
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_UNSPECIFIED 0x00
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_DEVICE_ID 0x01
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_FIRMWARE_REVISION 0x02
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_DEVICE_REVISION 0x03
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_MANUFACTURER_ID 0x04
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_IPMI_VERSION 0x05
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_AUXILIARY_FIRMWARE_ID 0x06
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_CONTROLLER_FIRMWARE_BOOT_BLOCK 0x07
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_OTHER_MANAGEMENT_CONTROLLER_FIRMWARE 0x08
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_SYSTEM_FIRMWARE_CHANGE 0x09
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_SMBIOS_CHANGE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_OPERATING_SYSTEM_CHANGE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_OPERATING_SYSTEM_LOADER_CHANGE 0x0C
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_SERVICE_OR_DIAGNOSTIC_PARTITION_CHANGE 0x0D
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_SOFTWARE_AGENT_CHANGE 0x0E
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_SOFTWARE_APPLICATION_CHANGE 0x0F
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_MANAGEMENT_SOFTWARE_MIDDLEWARE_CHANGE 0x10
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_PROGRAMMABLE_HARDWARE_CHANGE 0x11
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_BOARD_FRU_MODULE_CHANGE 0x12
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_BOARD_FRU_COMPONENT_CHANGE 0x13
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_BOARD_FRU_REPLACED_WITH_EQUIVALENT_VERSION 0x14
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_BOARD_FRU_REPLACED_WITH_NEWER_VERSION 0x15
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_BOARD_FRU_REPLACED_WITH_OLDER_VERSION 0x16
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OFFSET_SOFTWARE_OR_FW_CHANGE_DETECTED_WITH_ASSOCIATED_ENTITY_WAS_SUCCESSFUL_BOARD_FRU_HARDWARE_CONFIGURATION_CHANGE 0x17
|
||||
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_NOT_INSTALLED 0x00
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_INACTIVE 0x01
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_ACTIVATION_REQUESTED 0x02
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_ACTIVATION_IN_PROGRESS 0x03
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_ACTIVE 0x04
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_DEACTIVATION_REQUESTED 0x05
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_DEACTIVATION_IN_PROGRESS 0x06
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_FRU_COMMUNICATION_LOST 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_NORMAL_STATE_CHANGE 0x0
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_CHANGE_COMMAND_BY_SOFTWARE_EXTERNAL_TO_FRU 0x1
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_STATE_CHANGE_DUE_TO_OPERATOR_CHANGING_A_HANDLE_LATCH 0x2
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_STATE_CHANGE_DUE_TO_OPERATOR_PRESSING_THE_HOTSWAP_PUSH_BUTTON 0x3
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_STATE_CHANGE_DUE_TO_FRU_PROGRAMMATIC_ACTION 0x4
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_COMMUNICATION_LOST 0x5
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_COMMUNICATION_LOST_DUE_TO_LOCAL_FAILURE 0x6
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_STATE_CHANGE_DUE_TO_UNEXPECTED_EXTRACTION 0x7
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_STATE_CHANGE_DUE_TO_OPERATOR_INTERVENTION_UPDATE 0x8
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_UNABLE_TO_COMPUTE_IPMB_ADDRESS 0x9
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_UNEXPECTED_DEACTIVATION 0xA
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE_EVENT_DATA2_OFFSET_COMMUNICATION_LOST_CAUSE_OF_STATE_CHANGE_STATE_CHANGE_CAUSE_UNKNOWN 0xF
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_sensor_type_physical_security[];
|
||||
extern unsigned int ipmi_sensor_type_physical_security_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_platform_security_violation_attempt[];
|
||||
extern unsigned int ipmi_sensor_type_platform_security_violation_attempt_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_processor[];
|
||||
extern unsigned int ipmi_sensor_type_processor_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_power_supply[];
|
||||
extern unsigned int ipmi_sensor_type_power_supply_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_power_unit[];
|
||||
extern unsigned int ipmi_sensor_type_power_unit_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_memory[];
|
||||
extern unsigned int ipmi_sensor_type_memory_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_drive_slot[];
|
||||
extern unsigned int ipmi_sensor_type_drive_slot_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_firmware_progress[];
|
||||
extern unsigned int ipmi_sensor_type_system_firmware_progress_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_event_logging_disabled[];
|
||||
extern unsigned int ipmi_sensor_type_event_logging_disabled_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_watchdog1[];
|
||||
extern unsigned int ipmi_sensor_type_watchdog1_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_critical_interrupt[];
|
||||
extern unsigned int ipmi_sensor_type_critical_interrupt_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_button_switch[];
|
||||
extern unsigned int ipmi_sensor_type_button_switch_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_chip_set[];
|
||||
extern unsigned int ipmi_sensor_type_chip_set_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_cable_interconnect[];
|
||||
extern unsigned int ipmi_sensor_type_cable_interconnect_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_boot_initiated[];
|
||||
extern unsigned int ipmi_sensor_type_system_boot_initiated_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_boot_error[];
|
||||
extern unsigned int ipmi_sensor_type_boot_error_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_os_boot[];
|
||||
extern unsigned int ipmi_sensor_type_os_boot_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_os_critical_stop[];
|
||||
extern unsigned int ipmi_sensor_type_os_critical_stop_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_slot_connector[];
|
||||
extern unsigned int ipmi_sensor_type_slot_connector_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_acpi_power_state[];
|
||||
extern unsigned int ipmi_sensor_type_acpi_power_state_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_watchdog2[];
|
||||
extern unsigned int ipmi_sensor_type_watchdog2_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_platform_alert[];
|
||||
extern unsigned int ipmi_sensor_type_platform_alert_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_entity_presence[];
|
||||
extern unsigned int ipmi_sensor_type_entity_presence_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_lan[];
|
||||
extern unsigned int ipmi_sensor_type_lan_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_management_subsystem_health[];
|
||||
extern unsigned int ipmi_sensor_type_management_subsystem_health_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_battery[];
|
||||
extern unsigned int ipmi_sensor_type_battery_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_session_audit[];
|
||||
extern unsigned int ipmi_sensor_type_session_audit_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_version_change[];
|
||||
extern unsigned int ipmi_sensor_type_version_change_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_fru_state[];
|
||||
extern unsigned int ipmi_sensor_type_fru_state_max_index;
|
||||
|
||||
/*
|
||||
* "short" arrays are same strings, but shortened to more reasonble lengths for output
|
||||
*/
|
||||
extern const char * const ipmi_sensor_type_physical_security_short[];
|
||||
extern unsigned int ipmi_sensor_type_physical_security_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_platform_security_violation_attempt_short[];
|
||||
extern unsigned int ipmi_sensor_type_platform_security_violation_attempt_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_processor_short[];
|
||||
extern unsigned int ipmi_sensor_type_processor_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_power_supply_short[];
|
||||
extern unsigned int ipmi_sensor_type_power_supply_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_power_unit_short[];
|
||||
extern unsigned int ipmi_sensor_type_power_unit_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_memory_short[];
|
||||
extern unsigned int ipmi_sensor_type_memory_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_drive_slot_short[];
|
||||
extern unsigned int ipmi_sensor_type_drive_slot_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_firmware_progress_short[];
|
||||
extern unsigned int ipmi_sensor_type_system_firmware_progress_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_event_logging_disabled_short[];
|
||||
extern unsigned int ipmi_sensor_type_event_logging_disabled_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_watchdog1_short[];
|
||||
extern unsigned int ipmi_sensor_type_watchdog1_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event_short[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_critical_interrupt_short[];
|
||||
extern unsigned int ipmi_sensor_type_critical_interrupt_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_button_switch_short[];
|
||||
extern unsigned int ipmi_sensor_type_button_switch_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_chip_set_short[];
|
||||
extern unsigned int ipmi_sensor_type_chip_set_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_cable_interconnect_short[];
|
||||
extern unsigned int ipmi_sensor_type_cable_interconnect_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_boot_initiated_short[];
|
||||
extern unsigned int ipmi_sensor_type_system_boot_initiated_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_boot_error_short[];
|
||||
extern unsigned int ipmi_sensor_type_boot_error_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_os_boot_short[];
|
||||
extern unsigned int ipmi_sensor_type_os_boot_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_os_critical_stop_short[];
|
||||
extern unsigned int ipmi_sensor_type_os_critical_stop_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_slot_connector_short[];
|
||||
extern unsigned int ipmi_sensor_type_slot_connector_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_acpi_power_state_short[];
|
||||
extern unsigned int ipmi_sensor_type_acpi_power_state_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_watchdog2_short[];
|
||||
extern unsigned int ipmi_sensor_type_watchdog2_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_platform_alert_short[];
|
||||
extern unsigned int ipmi_sensor_type_platform_alert_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_entity_presence_short[];
|
||||
extern unsigned int ipmi_sensor_type_entity_presence_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_lan_short[];
|
||||
extern unsigned int ipmi_sensor_type_lan_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_management_subsystem_health_short[];
|
||||
extern unsigned int ipmi_sensor_type_management_subsystem_health_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_battery_short[];
|
||||
extern unsigned int ipmi_sensor_type_battery_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_session_audit_short[];
|
||||
extern unsigned int ipmi_sensor_type_session_audit_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_version_change_short[];
|
||||
extern unsigned int ipmi_sensor_type_version_change_short_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_fru_state_short[];
|
||||
extern unsigned int ipmi_sensor_type_fru_state_short_max_index;
|
||||
|
||||
/*
|
||||
* event data 2
|
||||
*/
|
||||
extern const char * const ipmi_sensor_type_system_firmware_progress_event_data2_offset_system_firmware_error[];
|
||||
extern unsigned int ipmi_sensor_type_system_firmware_progress_event_data2_offset_system_firmware_error_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_firmware_progress_event_data2_offset_system_firmware_hang[];
|
||||
extern unsigned int ipmi_sensor_type_system_firmware_progress_event_data2_offset_system_firmware_hang_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_firmware_progress_event_data2_offset_system_firmware_progress[];
|
||||
extern unsigned int ipmi_sensor_type_system_firmware_progress_event_data2_offset_system_firmware_progress_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event_event_data2_offset_entry_added_to_auxiliary_log_log_entry_action[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_event_data2_offset_entry_added_to_auxiliary_log_log_entry_action_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event_event_data2_offset_entry_added_to_auxiliary_log_log_type[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_event_data2_offset_entry_added_to_auxiliary_log_log_type_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event_event_data2_offset_pef_action[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_event_data2_offset_pef_action_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event_event_data2_offset_timestamp_clock_synch_first_second[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_event_data2_offset_timestamp_clock_synch_first_second_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_event_event_data2_offset_timestamp_clock_synch_timestamp_clock_type[];
|
||||
extern unsigned int ipmi_sensor_type_system_event_event_data2_offset_timestamp_clock_synch_timestamp_clock_type_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_chip_set_event_data2_offset_soft_power_control_failure[];
|
||||
extern unsigned int ipmi_sensor_type_chip_set_event_data2_offset_soft_power_control_failure_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_system_boot_initiated_event_data2_offset_system_restart_restart_cause[];
|
||||
extern unsigned int ipmi_sensor_type_system_boot_initiated_event_data2_offset_system_restart_restart_cause_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_slot_connector_event_data2_offset_slot_holds_spare_device_slot_connector_type[];
|
||||
extern unsigned int ipmi_sensor_type_slot_connector_event_data2_offset_slot_holds_spare_device_slot_connector_type_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_watchdog2_event_data2_interrupt_type[];
|
||||
extern unsigned int ipmi_sensor_type_watchdog2_event_data2_interrupt_type_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_watchdog2_event_data2_timer_use_at_expiration[];
|
||||
extern unsigned int ipmi_sensor_type_watchdog2_event_data2_timer_use_at_expiration_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_management_subsystem_health_event_data2_offset_fru_failure_logical_fru_device[];
|
||||
extern unsigned int ipmi_sensor_type_management_subsystem_health_event_data2_offset_fru_failure_logical_fru_device_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_version_change_event_data2_offset_software_or_fw_change_detected_with_associated_entity_was_successful_version_change_type[];
|
||||
extern unsigned int ipmi_sensor_type_version_change_event_data2_offset_software_or_fw_change_detected_with_associated_entity_was_successful_version_change_type_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_fru_state_event_data2_offset_communication_lost_cause_of_state_change[];
|
||||
extern unsigned int ipmi_sensor_type_fru_state_event_data2_offset_communication_lost_cause_of_state_change_max_index;
|
||||
|
||||
/*
|
||||
* event data 2
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_sensor_type_power_supply_event_data3_offset_configuration_error_error_type[];
|
||||
extern unsigned int ipmi_sensor_type_power_supply_event_data3_offset_configuration_error_error_type_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_event_logging_disabled_event_data3_offset_event_type_logging_disabled_assertion_event[];
|
||||
extern unsigned int ipmi_sensor_type_event_logging_disabled_event_data3_offset_event_type_logging_disabled_assertion_event_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_event_logging_disabled_event_data3_offset_event_type_logging_disabled_logging_disabled_all_events[];
|
||||
extern unsigned int ipmi_sensor_type_event_logging_disabled_event_data3_offset_event_type_logging_disabled_logging_disabled_all_events_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_chip_set_event_data3_offset_soft_power_control_failure[];
|
||||
extern unsigned int ipmi_sensor_type_chip_set_event_data3_offset_soft_power_control_failure_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_session_audit_event_data3_offset_session_deactivated_deactivation_cause[];
|
||||
extern unsigned int ipmi_sensor_type_session_audit_event_data3_offset_session_deactivated_deactivation_cause_max_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-numbers-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-numbers-oem-intel-node-manager-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-numbers-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-numbers-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-numbers-oem-quanta-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-numbers-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_SPEC_H */
|
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-fujitsu-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-hp-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-intel-node-manager-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-supermicro-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sensor-types-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_SPEC_H */
|
@ -0,0 +1,92 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SENSOR_TYPE_RESERVED 0x00
|
||||
#define IPMI_SENSOR_TYPE_TEMPERATURE 0x01
|
||||
#define IPMI_SENSOR_TYPE_VOLTAGE 0x02
|
||||
#define IPMI_SENSOR_TYPE_CURRENT 0x03
|
||||
#define IPMI_SENSOR_TYPE_FAN 0x04
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY 0x05
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_SECURITY_VIOLATION_ATTEMPT 0x06
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR 0x07
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY 0x08
|
||||
#define IPMI_SENSOR_TYPE_POWER_UNIT 0x09
|
||||
#define IPMI_SENSOR_TYPE_COOLING_DEVICE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_OTHER_UNITS_BASED_SENSOR 0x0B
|
||||
#define IPMI_SENSOR_TYPE_MEMORY 0x0C
|
||||
#define IPMI_SENSOR_TYPE_DRIVE_SLOT 0x0D
|
||||
#define IPMI_SENSOR_TYPE_POST_MEMORY_RESIZE 0x0E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS 0x0F
|
||||
#define IPMI_SENSOR_TYPE_EVENT_LOGGING_DISABLED 0x10
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG1 0x11
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT 0x12
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT 0x13
|
||||
#define IPMI_SENSOR_TYPE_BUTTON_SWITCH 0x14
|
||||
#define IPMI_SENSOR_TYPE_MODULE_BOARD 0x15
|
||||
#define IPMI_SENSOR_TYPE_MICROCONTROLLER_COPROCESSOR 0x16
|
||||
#define IPMI_SENSOR_TYPE_ADD_IN_CARD 0x17
|
||||
#define IPMI_SENSOR_TYPE_CHASSIS 0x18
|
||||
#define IPMI_SENSOR_TYPE_CHIP_SET 0x19
|
||||
#define IPMI_SENSOR_TYPE_OTHER_FRU 0x1A
|
||||
#define IPMI_SENSOR_TYPE_CABLE_INTERCONNECT 0x1B
|
||||
#define IPMI_SENSOR_TYPE_TERMINATOR 0x1C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_BOOT_INITIATED 0x1D
|
||||
#define IPMI_SENSOR_TYPE_BOOT_ERROR 0x1E
|
||||
/* OS BOOT renamed Base OS Boot/Installation Status, but gonna keep legacy name for ease */
|
||||
#define IPMI_SENSOR_TYPE_OS_BOOT 0x1F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP 0x20
|
||||
#define IPMI_SENSOR_TYPE_SLOT_CONNECTOR 0x21
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_ACPI_POWER_STATE 0x22
|
||||
#define IPMI_SENSOR_TYPE_WATCHDOG2 0x23
|
||||
#define IPMI_SENSOR_TYPE_PLATFORM_ALERT 0x24
|
||||
#define IPMI_SENSOR_TYPE_ENTITY_PRESENCE 0x25
|
||||
#define IPMI_SENSOR_TYPE_MONITOR_ASIC_IC 0x26
|
||||
#define IPMI_SENSOR_TYPE_LAN 0x27
|
||||
#define IPMI_SENSOR_TYPE_MANAGEMENT_SUBSYSTEM_HEALTH 0x28
|
||||
#define IPMI_SENSOR_TYPE_BATTERY 0x29
|
||||
#define IPMI_SENSOR_TYPE_SESSION_AUDIT 0x2A
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE 0x2B
|
||||
#define IPMI_SENSOR_TYPE_FRU_STATE 0x2C
|
||||
#define IPMI_SENSOR_TYPE_OEM_MIN 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OEM_MAX 0xFF
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_VALID(__sensor_type) \
|
||||
((((__sensor_type) + 1) >= (IPMI_SENSOR_TYPE_RESERVED + 1) \
|
||||
&& (__sensor_type) <= IPMI_SENSOR_TYPE_FRU_STATE) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_IS_OEM(__sensor_type) \
|
||||
(((__sensor_type) >= IPMI_SENSOR_TYPE_OEM_MIN \
|
||||
&& (((__sensor_type) - 1) <= (IPMI_SENSOR_TYPE_OEM_MAX - 1))) ? 1 : 0)
|
||||
|
||||
extern const char *const ipmi_sensor_types[];
|
||||
extern const char *const ipmi_oem_sensor_type;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_SPEC_H */
|
@ -0,0 +1,146 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_UNITS_SPEC_H
|
||||
#define IPMI_SENSOR_UNITS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SENSOR_UNIT_UNSPECIFIED 0
|
||||
#define IPMI_SENSOR_UNIT_DEGREES_C 1
|
||||
#define IPMI_SENSOR_UNIT_DEGREES_F 2
|
||||
#define IPMI_SENSOR_UNIT_DEGREES_K 3
|
||||
#define IPMI_SENSOR_UNIT_VOLTS 4
|
||||
#define IPMI_SENSOR_UNIT_AMPS 5
|
||||
#define IPMI_SENSOR_UNIT_WATTS 6
|
||||
#define IPMI_SENSOR_UNIT_JOULES 7
|
||||
#define IPMI_SENSOR_UNIT_COULOMBS 8
|
||||
#define IPMI_SENSOR_UNIT_VA 9
|
||||
#define IPMI_SENSOR_UNIT_NITS 10
|
||||
#define IPMI_SENSOR_UNIT_LUMEN 11
|
||||
#define IPMI_SENSOR_UNIT_LUX 12
|
||||
#define IPMI_SENSOR_UNIT_CANDELA 13
|
||||
#define IPMI_SENSOR_UNIT_KPA 14
|
||||
#define IPMI_SENSOR_UNIT_PSI 15
|
||||
#define IPMI_SENSOR_UNIT_NEWTON 16
|
||||
#define IPMI_SENSOR_UNIT_CFM 17
|
||||
#define IPMI_SENSOR_UNIT_RPM 18
|
||||
#define IPMI_SENSOR_UNIT_HZ 19
|
||||
#define IPMI_SENSOR_UNIT_MICROSECOND 20
|
||||
#define IPMI_SENSOR_UNIT_MILLISECOND 21
|
||||
#define IPMI_SENSOR_UNIT_SECOND 22
|
||||
#define IPMI_SENSOR_UNIT_MINUTE 23
|
||||
#define IPMI_SENSOR_UNIT_HOUR 24
|
||||
#define IPMI_SENSOR_UNIT_DAY 25
|
||||
#define IPMI_SENSOR_UNIT_WEEK 26
|
||||
#define IPMI_SENSOR_UNIT_MIL 27
|
||||
#define IPMI_SENSOR_UNIT_INCHES 28
|
||||
#define IPMI_SENSOR_UNIT_FEET 29
|
||||
#define IPMI_SENSOR_UNIT_CU_IN 30
|
||||
#define IPMI_SENSOR_UNIT_CU_FEET 31
|
||||
#define IPMI_SENSOR_UNIT_MM 32
|
||||
#define IPMI_SENSOR_UNIT_CM 33
|
||||
#define IPMI_SENSOR_UNIT_M 34
|
||||
#define IPMI_SENSOR_UNIT_CU_CM 35
|
||||
#define IPMI_SENSOR_UNIT_CU_M 36
|
||||
#define IPMI_SENSOR_UNIT_LITERS 37
|
||||
#define IPMI_SENSOR_UNIT_FLUID_OUNCE 38
|
||||
#define IPMI_SENSOR_UNIT_RADIANS 39
|
||||
#define IPMI_SENSOR_UNIT_STERADIANS 40
|
||||
#define IPMI_SENSOR_UNIT_REVOLUTIONS 41
|
||||
#define IPMI_SENSOR_UNIT_CYCLES 42
|
||||
#define IPMI_SENSOR_UNIT_GRAVITIES 43
|
||||
#define IPMI_SENSOR_UNIT_OUNCE 44
|
||||
#define IPMI_SENSOR_UNIT_POUND 45
|
||||
#define IPMI_SENSOR_UNIT_FT_LB 46
|
||||
#define IPMI_SENSOR_UNIT_OZ_IN 47
|
||||
#define IPMI_SENSOR_UNIT_GAUSS 48
|
||||
#define IPMI_SENSOR_UNIT_GILBERTS 49
|
||||
#define IPMI_SENSOR_UNIT_HENRY 50
|
||||
#define IPMI_SENSOR_UNIT_MILLIHENRY 51
|
||||
#define IPMI_SENSOR_UNIT_FARAD 52
|
||||
#define IPMI_SENSOR_UNIT_MICROFARAD 53
|
||||
#define IPMI_SENSOR_UNIT_OHMS 54
|
||||
#define IPMI_SENSOR_UNIT_SIEMENS 55
|
||||
#define IPMI_SENSOR_UNIT_MOLE 56
|
||||
#define IPMI_SENSOR_UNIT_BECQUEREL 57
|
||||
#define IPMI_SENSOR_UNIT_PPM 58
|
||||
#define IPMI_SENSOR_UNIT_RESERVED 59
|
||||
#define IPMI_SENSOR_UNIT_DECIBELS 60
|
||||
#define IPMI_SENSOR_UNIT_DBA 61
|
||||
#define IPMI_SENSOR_UNIT_DBC 62
|
||||
#define IPMI_SENSOR_UNIT_GRAY 63
|
||||
#define IPMI_SENSOR_UNIT_SIEVERT 64
|
||||
#define IPMI_SENSOR_UNIT_COLOR_TEMP_DEG_K 65
|
||||
#define IPMI_SENSOR_UNIT_BIT 66
|
||||
#define IPMI_SENSOR_UNIT_KILOBIT 67
|
||||
#define IPMI_SENSOR_UNIT_MEGABIT 68
|
||||
#define IPMI_SENSOR_UNIT_GIGABIT 69
|
||||
#define IPMI_SENSOR_UNIT_BYTE 70
|
||||
#define IPMI_SENSOR_UNIT_KILOBYTE 71
|
||||
#define IPMI_SENSOR_UNIT_MEGABYTE 72
|
||||
#define IPMI_SENSOR_UNIT_GIGABYTE 73
|
||||
#define IPMI_SENSOR_UNIT_WORD 74
|
||||
#define IPMI_SENSOR_UNIT_DWORD 75
|
||||
#define IPMI_SENSOR_UNIT_QWORD 76
|
||||
#define IPMI_SENSOR_UNIT_LINE 77
|
||||
#define IPMI_SENSOR_UNIT_HIT 78
|
||||
#define IPMI_SENSOR_UNIT_MISS 79
|
||||
#define IPMI_SENSOR_UNIT_RETRY 80
|
||||
#define IPMI_SENSOR_UNIT_RESET 81
|
||||
#define IPMI_SENSOR_UNIT_OVERRUN_OVERFLOW 82
|
||||
#define IPMI_SENSOR_UNIT_UNDERRUN 83
|
||||
#define IPMI_SENSOR_UNIT_COLLISION 84
|
||||
#define IPMI_SENSOR_UNIT_PACKETS 85
|
||||
#define IPMI_SENSOR_UNIT_MESSAGES 86
|
||||
#define IPMI_SENSOR_UNIT_CHARACTERS 87
|
||||
#define IPMI_SENSOR_UNIT_ERROR 88
|
||||
#define IPMI_SENSOR_UNIT_CORRECTABLE_ERROR 89
|
||||
#define IPMI_SENSOR_UNIT_UNCORRECTABLE_ERROR 90
|
||||
#define IPMI_SENSOR_UNIT_FATAL_ERROR 91
|
||||
#define IPMI_SENSOR_UNIT_GRAMS 92
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_UNIT_VALID(__sensor_unit) \
|
||||
(((__sensor_unit + 1) >= (IPMI_SENSOR_UNIT_UNSPECIFIED + 1) \
|
||||
&& (__sensor_unit) <= IPMI_SENSOR_UNIT_GRAMS) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_RATE_UNIT_NONE 0
|
||||
#define IPMI_SENSOR_RATE_UNIT_PER_US 1
|
||||
#define IPMI_SENSOR_RATE_UNIT_PER_MS 2
|
||||
#define IPMI_SENSOR_RATE_UNIT_PER_S 3
|
||||
#define IPMI_SENSOR_RATE_UNIT_PER_MINUTE 4
|
||||
#define IPMI_SENSOR_RATE_UNIT_PER_HOUR 5
|
||||
#define IPMI_SENSOR_RATE_UNIT_PER_DAY 6
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_RATE_UNIT_VALID(__sensor_rate_unit) \
|
||||
(((__sensor_rate_unit + 1) >= (IPMI_SENSOR_RATE_UNIT_NONE + 1) \
|
||||
&& (__sensor_rate_unit) <= IPMI_SENSOR_RATE_UNIT_PER_DAY) ? 1 : 0)
|
||||
|
||||
extern const char *const ipmi_sensor_units[];
|
||||
extern const char *const ipmi_sensor_units_abbreviated[];
|
||||
extern const char *const ipmi_sensor_rate_units[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_UNITS_SPEC_H */
|
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETERS_OEM_SPEC_H */
|
@ -0,0 +1,92 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_SET_IN_PROGRESS 0
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_AUTH_TYPE_SUPPORT 1
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_AUTH_TYPE_ENABLES 2
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_CONNECTION_MODE 3
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_SESSION_INACTIVITY_TIMEOUT 4
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_CHANNEL_CALLBACK_CONTROL 5
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_SESSION_TERMINATION 6
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_IPMI_MESSAGING_COMM_SETTINGS 7
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_MUX_SWITCH_CONTROL 8
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_MODEM_RING_TIME 9
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_MODEM_INIT_STRING 10
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_MODEM_ESCAPE_SEQUENCE 11
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_MODEM_HANG_UP_SEQUENCE 12
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_MODEM_DIAL_COMMAND 13
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PAGE_BLACKOUT_INTERVAL 14
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_COMMUNITY_STRING 15
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_NO_OF_ALERT_DESTINATIONS 16
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_DESTINATION_INFO 17
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_CALL_RETRY_INTERVAL 18
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_DESTINATION_COMM_SETTINGS 19
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_NO_OF_DIAL_STRINGS 20
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_DESTINATION_DIAL_STRINGS 21
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_NO_OF_ALERT_DESTINATION_IP_ADDRS 22
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_DESTINATION_IP_ADDRS 23
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_NO_OF_TAP_ACCOUNTS 24
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_TAP_ACCOUNT 25
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_TAP_PASSWORDS 26
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_TAP_PAGER_ID_STRINGS 27
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_TAP_SERVICE_SETTINGS 28
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_TERMINAL_MODE_CONF 29
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_PROTOCOL_OPTIONS 30
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_PRIMARY_RMCP_PORT_NO 31
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_SECONDARY_RMCP_PORT_NO 32
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_LINK_AUTH 33
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_CHAP_NAME 34
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCM 35
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_SNOOP_ACCM 36
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_NO_OF_PPP_ACCOUNT 37
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_DIAL_STRING_SELECTOR 38
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_BMC_IP_ADDRESSES 39
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_USER_NAMES 40
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_USER_DOMAINS 41
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_USER_PASSWORDS 42
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_AUTH_SETTINGS 43
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_ACCOUNT_CONNECTION_HOLD_TIMES 44
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_UDP_PROXY_IP_HEADER_DATA 45
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_UDP_PROXY_TRANSMIT_BUFFER_SIZE 46
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_UDP_PROXY_RECEIVE_BUFFER_SIZE 47
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_REMOTE_CONSOLE_IP_ADDRESS 48
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_OEM_MIN 192
|
||||
#define IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_OEM_MAX 255
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SERIAL_PARAMETER_SELECTOR_VALID(__parameter_selector) \
|
||||
((((__parameter_selector) + 1) > (IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_SET_IN_PROGRESS + 1) \
|
||||
&& (__parameter_selector) <= IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_PPP_REMOTE_CONSOLE_IP_ADDRESS) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_SERIAL_PARAMETER_SELECTOR_IS_OEM(__parameter_selector) \
|
||||
(((__parameter_selector) >= IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_OEM_MIN \
|
||||
&& ((__parameter_selector) - 1) <= (IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETER_OEM_MAX - 1)) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SERIAL_MODEM_CONFIGURATION_PARAMETERS_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_OEM_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-slave-address-oem-intel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-slave-address-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-slave-address-oem-linux-kernel-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-slave-address-oem-quanta-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-slave-address-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_OEM_SPEC_H */
|
@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
Slave Addresses - 7 bits
|
||||
|
||||
BIOS 0x00 to 0x0F
|
||||
SMI HANDLER 0x10 to 0x1F
|
||||
System Management Software 0x20 to 0x2F
|
||||
OEM 0x30 to 0x3F
|
||||
Remote Console Software 0x40 to 0x46
|
||||
Terminal Mode Remote Console Software 0x47
|
||||
*/
|
||||
|
||||
/*
|
||||
Software IDs - 8 bits, Least Significant Bit is 0x1
|
||||
|
||||
BIOS 0x01 to 0x1F
|
||||
SMI HANDLER 0x21 to 0x3F
|
||||
System Management Software 0x41 to 0x5F
|
||||
OEM 0x61 to 0x7F
|
||||
Remote Console Software 0x81 to 0x8D
|
||||
Terminal Mode Remote Console Software 0x8F
|
||||
*/
|
||||
|
||||
#define IPMI_SLAVE_ADDRESS_BMC 0x20
|
||||
#define IPMI_LAN_SLAVE_ADDRESS_BMC IPMI_SLAVE_ADDRESS_BMC
|
||||
#define IPMI_SSIF_SMBUS_SLAVE_ADDRESS 0x42
|
||||
|
||||
#define IPMI_LAN_SOFTWARE_ID_REMOTE_CONSOLE_SOFTWARE 0x81
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_SPEC_H */
|
@ -0,0 +1,33 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SOL_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-sol-configuration-parameters-oem-inventec-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-sol-configuration-parameters-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SOL_CONFIGURATION_PARAMETERS_OEM_SPEC_H */
|
@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SOL_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SET_IN_PROGRESS 0
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_ENABLE 1
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_AUTHENTICATION 2
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_CHARACTER_ACCUMULATE_INTERVAL_AND_SEND_THRESHOLD 3
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_RETRY 4
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_NON_VOLATILE_BIT_RATE 5
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_VOLATILE_BIT_RATE 6
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_PAYLOAD_CHANNEL 7
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SOL_PAYLOAD_PORT_NUMBER 8
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_OEM_MIN 192
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_OEM_MAX 255
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SELECTOR_VALID(__parameter_selector) \
|
||||
((((__parameter_selector) + 1) > (IPMI_SOL_CONFIGURATION_PARAMETER_SET_IN_PROGRESS + 1) \
|
||||
&& (__parameter_selector) <= IPMI_SOL_CONFIGURATION_PARAMETER_SOL_PAYLOAD_PORT_NUMBER) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_SELECTOR_IS_OEM(__parameter_selector) \
|
||||
(((__parameter_selector) >= IPMI_SOL_CONFIGURATION_PARAMETER_OEM_MIN \
|
||||
&& ((__parameter_selector) - 1) <= (IPMI_SOL_CONFIGURATION_PARAMETER_OEM_MAX - 1)) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SOL_CONFIGURATION_PARAMETERS_SPEC_H */
|
@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_BOOT_OPTION_PARAMETERS_OEM_SPEC_H
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* IPMI_SYSTEM_BOOT_OPTION_PARAMETERS_OEM_SPEC_H */
|
@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_BOOT_OPTION_PARAMETERS_SPEC_H
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_SET_IN_PROGRESS 0x0
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_SERVICE_PARTITION_SELECTOR 0x1
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_SERVICE_PARTITION_SCAN 0x2
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_BMC_BOOT_FLAG_VALID_BIT_CLEARING 0x3
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_BOOT_INFO_ACKNOWLEDGE 0x4
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_BOOT_FLAGS 0x5
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_BOOT_INITIATOR_INFO 0x6
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_BOOT_INITIATOR_MAILBOX 0x7
|
||||
|
||||
/* Add +1 to avoid compiler warnings */
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_SELECTOR_VALID(__parameter_selector) \
|
||||
((((__parameter_selector + 1)) > (IPMI_SYSTEM_BOOT_OPTION_PARAMETER_SET_IN_PROGRESS+1) && \
|
||||
(__parameter_selector) <= IPMI_SYSTEM_BOOT_OPTION_PARAMETER_BOOT_INITIATOR_MAILBOX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_BOOT_OPTION_PARAMETER_SELECTOR_IS_OEM(__parameter_selector) \
|
||||
(((__parameter_selector) >= 96 && (__parameter_selector) <= 127) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* IPMI_SYSTEM_BOOT_OPTION_PARAMETERS_SPEC_H */
|
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_INFO_PARAMETERS_OEM_SPEC_H
|
||||
#define IPMI_SYSTEM_INFO_PARAMETERS_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <freeipmi/spec/oem/ipmi-system-info-parameters-oem-dell-spec.h>
|
||||
#include <freeipmi/spec/oem/ipmi-system-info-parameters-oem-wistron-spec.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* IPMI_SYSTEM_INFO_PARAMETERS_SPEC_H */
|
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_INFO_PARAMETERS_SPEC_H
|
||||
#define IPMI_SYSTEM_INFO_PARAMETERS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_SET_IN_PROGRESS 0
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_SYSTEM_FIRMWARE_VERSION 1
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_SYSTEM_NAME 2
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_PRIMARY_OPERATING_SYSTEM_NAME 3
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OPERATING_SYSTEM_NAME 4
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_PRESENT_OS_VERSION_NUMBER 5
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_BMC_URL 6
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_BASE_OS_HYPERVISOR_URL 7
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_MIN 192
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_MAX 255
|
||||
|
||||
/* Add +1 to avoid compiler warnings */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_SELECTOR_VALID(__parameter_selector) \
|
||||
((((__parameter_selector) + 1) > (IPMI_SYSTEM_INFO_PARAMETER_SET_IN_PROGRESS + 1) \
|
||||
&& (__parameter_selector) <= IPMI_SYSTEM_INFO_PARAMETER_BASE_OS_HYPERVISOR_URL) ? 1 : 0)
|
||||
|
||||
/* To avoid gcc warnings, subtract -1 in comparison */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_SELECTOR_IS_OEM(__parameter_selector) \
|
||||
(((__parameter_selector) >= IPMI_SYSTEM_INFO_PARAMETER_OEM_MIN \
|
||||
&& ((__parameter_selector) - 1) <= (IPMI_SYSTEM_INFO_PARAMETER_OEM_MAX - 1)) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* IPMI_SYSTEM_INFO_PARAMETERS_SPEC_H */
|
@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_SOFTWARE_ID_SPEC_H
|
||||
#define IPMI_SYSTEM_SOFTWARE_ID_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Table 5-4 */
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_BIOS_MIN 0x01
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_BIOS_MAX 0x0F
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_SMI_HANDLER_MIN 0x10
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_SMI_HANDLER_MAX 0x1F
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_SYSTEM_MANAGEMENT_SOFTWARE_MIN 0x20
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_SYSTEM_MANAGEMENT_SOFTWARE_MAX 0x2F
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_OEM_MIN 0x30
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_OEM_MAX 0x3F
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_REMOTE_CONSOLE_SOFTWARE_MIN 0x40
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_REMOTE_CONSOLE_SOFTWARE_MAX 0x46
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_TERMINAL_MODE_REMOTE_CONSOLE_SOFTWARE 0x47
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_RESERVED_MIN 0x48
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_BIOS(__val) \
|
||||
(((__val + 1) >= IPMI_SYSTEM_SOFTWARE_TYPE_BIOS_MIN \
|
||||
&& (__val) <= IPMI_SYSTEM_SOFTWARE_TYPE_BIOS_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_SMI_HANDLER(__val) \
|
||||
(((__val) >= IPMI_SYSTEM_SOFTWARE_TYPE_SMI_HANDLER_MIN \
|
||||
&& (__val) <= IPMI_SYSTEM_SOFTWARE_TYPE_SMI_HANDLER_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_SYSTEM_MANAGEMENT_SOFTWARE(__val) \
|
||||
(((__val) >= IPMI_SYSTEM_SOFTWARE_TYPE_SYSTEM_MANAGEMENT_SOFTWARE_MIN \
|
||||
&& (__val) <= IPMI_SYSTEM_SOFTWARE_TYPE_SYSTEM_MANAGEMENT_SOFTWARE_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_OEM(__val) \
|
||||
(((__val) >= IPMI_SYSTEM_SOFTWARE_TYPE_OEM_MIN \
|
||||
&& (__val) <= IPMI_SYSTEM_SOFTWARE_TYPE_OEM_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_REMOTE_CONSOLE_SOFTWARE(__val) \
|
||||
(((__val) >= IPMI_SYSTEM_SOFTWARE_TYPE_REMOTE_CONSOLE_SOFTWARE_MIN \
|
||||
&& (__val) <= IPMI_SYSTEM_SOFTWARE_TYPE_REMOTE_CONSOLE_SOFTWARE_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_TERMINAL_MODE_REMOTE_CONSOLE_SOFTWARE(__val) \
|
||||
(((__val) == IPMI_SYSTEM_SOFTWARE_TYPE_TERMINAL_MODE_REMOTE_CONSOLE_SOFTWARE)) ? 1 : 0)
|
||||
|
||||
#define IPMI_SYSTEM_SOFTWARE_TYPE_IS_RESERVED(__val) \
|
||||
(((__val) >= IPMI_SYSTEM_SOFTWARE_TYPE_RESERVED_MIN) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SYSTEM_SOFTWARE_ID_SPEC_H */
|
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_TIMESTAMP_SPEC_H
|
||||
#define IPMI_TIMESTAMP_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_TIMESTAMP_UNSPECIFIED 0xFFFFFFFF
|
||||
|
||||
#define IPMI_TIMESTAMP_POST_INIT_MIN 0x00000000
|
||||
#define IPMI_TIMESTAMP_POST_INIT_MAX 0x20000000
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_TIMESTAMP_POST_INIT(__timestamp) \
|
||||
((((__timestamp + 1) >= (IPMI_TIMESTAMP_POST_INIT_MIN + 1) \
|
||||
&& (__timestamp) <= IPMI_TIMESTAMP_POST_INIT_MAX)) ? 1 : 0)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_TIMESTAMP_SPEC_H */
|
@ -0,0 +1,86 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_DELL_SPEC_H
|
||||
#define IPMI_CMD_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
#define IPMI_CMD_OEM_DELL_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_DELL_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_DELL_SET_EXTENDED_CONFIGURATION 0x03
|
||||
|
||||
/* IPMI_NET_FN_OEM_DELL_GENERIC_RQ / IPMI_NET_FN_OEM_DELL_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_DELL_RESET_TO_DEFAULTS 0x21
|
||||
#define IPMI_CMD_OEM_DELL_SET_NIC_SELECTION 0x24
|
||||
#define IPMI_CMD_OEM_DELL_GET_NIC_SELECTION 0x25
|
||||
#define IPMI_CMD_OEM_DELL_QUERY_CHASSIS_IDENTIFY_STATUS 0x32
|
||||
#define IPMI_CMD_OEM_DELL_GET_CPLD_VERSION 0x33
|
||||
#define IPMI_CMD_OEM_DELL_GET_POWER_CONSUMPTION_DATA 0x9C
|
||||
#define IPMI_CMD_OEM_DELL_RESET_POWER_CONSUMPTION_DATA 0x9D
|
||||
#define IPMI_CMD_OEM_DELL_POWER_SUPPLY_INFO 0xB0
|
||||
#define IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL 0xB1
|
||||
#define IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE 0xB2
|
||||
#define IPMI_CMD_OEM_DELL_POWER_CONSUMPTION 0xB3
|
||||
#define IPMI_CMD_OEM_DELL_FRONT_PANEL_INFO 0xB5
|
||||
/* renamed "front panel info" in 12g */
|
||||
#define IPMI_CMD_OEM_DELL_LCD_INFO IPMI_CMD_OEM_DELL_FRONT_PANEL_INFO
|
||||
/* achu: this one is taken from code, is correct name? */
|
||||
#define IPMI_CMD_OEM_DELL_POWER_CAPACITY_STATUS 0xBA
|
||||
#define IPMI_CMD_OEM_DELL_GET_POWER_HEAD_ROOM 0xBB
|
||||
#define IPMI_CMD_OEM_DELL_ROLLBACK_FIRMWARE_VERSION 0xBE
|
||||
#define IPMI_CMD_OEM_DELL_GET_IDRAC_FIRMWARE_VERSION_NUMBER 0xBF
|
||||
#define IPMI_CMD_OEM_DELL_GET_ACTIVE_LOM_STATUS 0xC1
|
||||
#define IPMI_CMD_OEM_DELL_IDRAC_VIRTUAL_MAC 0xC9
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
#define IPMI_CMD_OEM_DELL_GET_BLADE_SLOT_ID 0x18
|
||||
#define IPMI_CMD_OEM_DELL_SET_NIC_SELECTION_FAILOVER 0x28
|
||||
#define IPMI_CMD_OEM_DELL_GET_NIC_SELECTION_FAILOVER 0x29
|
||||
#define IPMI_CMD_OEM_DELL_FRESH_AIR 0x35
|
||||
#define IPMI_CMD_OEM_DELL_GET_LAST_POST_CODE 0x99
|
||||
#define IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL2 0xCC
|
||||
#define IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE2 0xCD
|
||||
|
||||
/*
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_DELL_GENERIC_RQ / IPMI_NET_FN_OEM_DELL_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_DELL_SLOT_POWER_CONTROL 0xF0
|
||||
|
||||
/* IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RQ / IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RS */
|
||||
#define IPMI_CMD_OEM_DELL_PORT_MAP 0xC8
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_DELL_SPEC_H */
|
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_CMD_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu iRMC S1 / iRMC S2
|
||||
*
|
||||
* http://manuals.ts.fujitsu.com/file/4390/irmc_s2-en.pdf
|
||||
*/
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
#define IPMI_CMD_OEM_FUJITSU_POWER 0x01
|
||||
#define IPMI_CMD_OEM_FUJITSU_COMMUNICATION 0x02
|
||||
#define IPMI_CMD_OEM_FUJITSU_FAN_TEST 0x10
|
||||
#define IPMI_CMD_OEM_FUJITSU_BIOS 0xF1
|
||||
#define IPMI_CMD_OEM_FUJITSU_SYSTEM 0xF5
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_FUJITSU_SET_FIRMWARE_SELECTOR 0x04
|
||||
#define IPMI_CMD_OEM_FUJITSU_GET_FIRMWARE_SELECTOR 0x05
|
||||
|
||||
/* IPMI_NET_FN_OEM_FUJITSU_GENERIC_RQ / IPMI_NET_FN_OEM_FUJITSU_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_FUJITSU_GET_REMOTE_STORAGE_CONNECTION_OR_STATUS 0x19
|
||||
#define IPMI_CMD_OEM_FUJITSU_SET_VIDEO_DISPLAY_ON_OFF 0x1A
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_IBM_SPEC_H
|
||||
#define IPMI_CMD_OEM_IBM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IBM x3455/x3755
|
||||
*/
|
||||
/* IPMI_NET_FN_OEM_IBM_LED_RQ / IPMI_NET_FN_OEM_IBM_LED_RS */
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_IBM_GET_LED 0xC0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_IBM_SPEC_H */
|
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_ENABLE_DISABLE_NODE_MANAGER_POLICY_CONTROL 0xC0
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY 0xC1
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY 0xC2
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS 0xC3
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS 0xC4
|
||||
/* legacy names */
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_THRESHOLDS IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_ALERT_THRESHOLDS IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS 0xC5
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY_SUSPEND_PERIODS 0xC6
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_RESET_NODE_MANAGER_STATISTICS 0xC7
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_STATISTICS 0xC8
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_CAPABILITIES 0xC9
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_VERSION 0xCA
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POWER_DRAW_RANGE 0xCB
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_TURBO_SYNCHRONIZATION_RATIO 0xCC
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_TURBO_SYNCHRONIZATION_RATIO 0xCD
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_DESTINATION 0xCE
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_ALERT_DESTINATION 0xCF
|
||||
#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_LIMITING_POLICY_ID 0xF2
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_INTEL_SPEC_H
|
||||
#define IPMI_CMD_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_INTEL_GENERIC_RQ / IPMI_NET_FN_OEM_INTEL_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_INTEL_RESTORE_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_INTEL_SET_FAULT_INDICATION 0x57
|
||||
|
||||
/* IPMI_NET_FN_OEM_INTEL_CONFIG_RQ / IPMI_NET_FN_OEM_INTEL_CONFIG_RS */
|
||||
#define IPMI_CMD_OEM_INTEL_SET_SMTP_CONFIGURATION 0x37
|
||||
#define IPMI_CMD_OEM_INTEL_GET_SMTP_CONFIGURATION 0x38
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_INTEL_GENERIC_RQ / IPMI_NET_FN_OEM_INTEL_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_INTEL_SET_POWER_RESTORE_DELAY 0x54
|
||||
#define IPMI_CMD_OEM_INTEL_GET_POWER_RESTORE_DELAY 0x55
|
||||
#define IPMI_CMD_OEM_INTEL_GET_BMC_SERVICE_STATUS 0xB2
|
||||
#define IPMI_CMD_OEM_INTEL_CONTROL_BMC_SERVICES 0xB1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,77 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_CMD_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_INVENTEC_UPDATE_FIRMARE 0x01
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_UPDATE_STATUS 0x02
|
||||
#define IPMI_CMD_OEM_INVENTEC_COPY_IMAGE_DATA 0x03
|
||||
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_DEDICATED_MAC_ADDRESS 0x21
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_SHARED_MAC_ADDRESS 0x23
|
||||
|
||||
/* IPMI_NET_FN_OEM_INVENTEC_GENERIC_RQ / IPMI_NET_FN_OEM_INVENTEC_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_INVENTEC_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_EXTENDED_CONFIGURATION 0x03
|
||||
#define IPMI_CMD_OEM_INVENTEC_RESTORE_TO_DEFAULTS 0x04
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_RESTORE_STATUS 0x05
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_SYSTEM_GUID 0xB3
|
||||
|
||||
/* IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RQ / IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RS */
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_WEB_PORT_NUM 0x02
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_WEB_PORT_NUM 0x03
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_BOARD_ID 0x10
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_BOARD_ID 0x11
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_ASSET_TAG 0x12
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_LAN_SOURCE 0x13
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_LAN_SOURCE 0x14
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_FCB_FW_VERSION 0x15
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FCB_FW_VERSION 0x16
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_FAN_CONTROL 0x61
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FAN_CONTROL 0x62
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_FSC_TABLE 0x63
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FSC_TABLE 0x64
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FCB_SKU_INFO 0x6A
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FCB_POWER_THROTTLING_STATUS 0x6B
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_GET_PIC_MODEL 0x70
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_SET_FLASH_PIN 0x71
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_GET_FLASH_PIN 0x72
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_NEW_MASTER_WRITE_READ 0x73
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_POWER_THROTTLING_BEHAVIOR 0xB1
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_POWER_THROTTLING_BEHAVIOR 0xB2
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_PSU_MISMATCH_AND_TYPE 0xB3
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_CMD_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_QUANTA_UPDATE_FIRMARE 0x01
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_UPDATE_STATUS 0x02
|
||||
#define IPMI_CMD_OEM_QUANTA_COPY_IMAGE_DATA 0x03
|
||||
#define IPMI_CMD_OEM_QUANTA_USB_FIRMWARE_UPDATE 0x04
|
||||
|
||||
/* IPMI_NET_FN_OEM_QUANTA_GENERIC_RQ / IPMI_NET_FN_OEM_QUANTA_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_QUANTA_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_QUANTA_SET_EXTENDED_CONFIGURATION 0x03
|
||||
#define IPMI_CMD_OEM_QUANTA_RESET_TO_DEFAULTS 0x04
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_RESTORE_STATUS 0x05
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_SENSOR_TEMPERATURE_READING 0x10
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_PROCESSOR_INFORMATION 0x18
|
||||
#define IPMI_CMD_OEM_QUANTA_SET_POWER_ON_BY_WAKE_ON_LAN_EVENT 0x1B
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
#define IPMI_CMD_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Sun 4140
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
#define IPMI_CMD_OEM_SUN_GET_LED 0x21
|
||||
#define IPMI_CMD_OEM_SUN_SET_LED 0x22
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_SUN_MICROSYSTEMS_SPEC_H */
|
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro H8QME
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_EXTRA_FIRMWARE_INFO 0x20
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_RESET_INTRUSION 0x03
|
||||
|
||||
/*
|
||||
* Supermicro X8DTG
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_GENERIC_EXTENSION 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_CMD_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_WISTRON_UPDATE_FIRMARE 0x01
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_UPDATE_STATUS 0x02
|
||||
#define IPMI_CMD_OEM_WISTRON_COPY_IMAGE_DATA 0x03
|
||||
#define IPMI_CMD_OEM_WISTRON_USB_FIRMWARE_UPDATE 0x04
|
||||
#define IPMI_CMD_OEM_WISTRON_WRITE_PROPRIETARY_STRING 0x0B
|
||||
#define IPMI_CMD_OEM_WISTRON_READ_PROPRIETARY_STRING 0x0C
|
||||
#define IPMI_CMD_OEM_WISTRON_CLEAR_PROPRIETARY_STRING 0x0D
|
||||
|
||||
/* IPMI_NET_FN_OEM_WISTRON_GENERIC_RQ / IPMI_NET_FN_OEM_WISTRON_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_WISTRON_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_EXTENDED_CONFIGURATION 0x03
|
||||
#define IPMI_CMD_OEM_WISTRON_RESET_TO_DEFAULTS 0x04
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_RESTORE_STATUS 0x05
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_CONFIGURATION 0x11
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_CONFIGURATION 0x12
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_NAME 0x13
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_NAME 0x14
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_SENSOR_INFO 0x15
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_SENSOR_INFO 0x16
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_ENCLOSURE_POWER_CAPPING 0x17
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_ENCLOSURE_POWER_CAPPING 0x18
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_FAN_SPEED_CONTROL 0x19
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_FAN_SPEED_CONTROL 0x1A
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_LED_STATUS 0x1B
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_LED_STATUS 0x1C
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_HDD_INFO 0x1D
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_PSU_INFO 0x1E
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_PSU_INFO 0x1F
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_SERVICE_TAG 0x20
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_SERVICE_TAG 0x25
|
||||
#define IPMI_CMD_OEM_WISTRON_SYNCHRONIZE CHASSIS_SERVICE_TAG 0x26
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_PSU_CONFIGURATION 0x27
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_PSU_CONFIGURATION 0x28
|
||||
#define IPMI_CMD_OEM_WISTRON_SYNCHRONIZE_CHASSIS_ENCLOSURE_POWER 0x29
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_THERMAL_THROTTLING 0x2A
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_THERMAL_THROTTLING 0x2B
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_BMC_SC_BMC_PROTOCOL_VERSION 0x2C
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_SC_SC_BMC_PROTOCOL_VERSION 0x2D
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_POWER_READINGS 0x2E
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_POWER_READINGS 0x2F
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_PASSWORD_POLICY 0x51
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_DELL_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_DELL_GET_EXTENDED_CONFIGURATION
|
||||
* IPMI_CMD_OEM_DELL_SET_EXTENDED_CONFIGURATION
|
||||
* IPMI_CMD_OEM_DELL_SET_NIC_SELECTION_FAILOVER
|
||||
* IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL2
|
||||
* IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE2
|
||||
* IPMI_CMD_SET_SYSTEM_INFO_PARAMETERS
|
||||
* IPMI_CMD_GET_SYSTEM_INFO_PARAMETERS
|
||||
*/
|
||||
#define IPMI_COMP_CODE_OEM_DELL_NOT_LICENSED 0x6F
|
||||
#define IPMI_COMP_CODE_OEM_DELL_NOT_LICENSED_STR \
|
||||
"Not licensed"
|
||||
|
||||
/* w/ IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL2
|
||||
* IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE2
|
||||
*/
|
||||
#define IPMI_COMP_CODE_OEM_DELL_SUBSYSTEM_LEVEL_POWER_IS_NOT_SUPPORTED 0x81
|
||||
#define IPMI_COMP_CODE_OEM_DELL_SUBSYSTEM_LEVEL_POWER_IS_NOT_SUPPORTED_STR \
|
||||
"subsystem-level power is not supported"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_DELL_SPEC_H */
|
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu RX100 S5
|
||||
*
|
||||
* http://manuals.ts.fujitsu.com/file/4390/irmc_s2-en.pdf
|
||||
*/
|
||||
/* IPMI_CMD_OEM_FUJITSU_BIOS - w/ GET_CPU_INFO Command Specifier */
|
||||
#define IPMI_COMP_CODE_OEM_FUJITSU_BIOS_UNPOPULATED_CPU_SOCKET 0x01
|
||||
#define IPMI_COMP_CODE_OEM_FUJITSU_BIOS_UNPOPULATED_CPU_SOCKET_STR \
|
||||
"Unpopulated CPU Socket"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,205 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_ENABLE_DISABLE_NODE_MANAGER_POLICY_CONTROL */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_RESET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_STATISTICS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_POLICY_ID 0x80
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_POLICY_ID_STR \
|
||||
"Invalid Policy Id"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_ENABLE_DISABLE_NODE_MANAGER_POLICY_CONTROL */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_RESET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_CAPABILITIES */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POWER_DRAW_RANGE */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_DOMAIN_ID 0x81
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_DOMAIN_ID_STR \
|
||||
"Invalid Domain Id"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_TRIGGER_TYPE 0x82
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_TRIGGER_TYPE_STR \
|
||||
"unknown or unsupported Policy Trigger Type"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_CONFIGURATION_ACTION 0x83
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_CONFIGURATION_ACTION_STR \
|
||||
"unknown or unsupported Policy Configuration Action"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POWER_LIMIT_OUT_OF_RANGE 0x84
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POWER_LIMIT_OUT_OF_RANGE_STR \
|
||||
"Power Limit out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CORRECTION_TIME_OUT_OF_RANGE 0x85
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CORRECTION_TIME_OUT_OF_RANGE_STR \
|
||||
"Correction Time out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POLICY_TRIGGER_VALUE_OUT_OF_RANGE 0x86
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POLICY_TRIGGER_VALUE_OUT_OF_RANGE_STR \
|
||||
"Policy Trigger value out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_STATISTICS_REPORTING_PERIOD_OUT_OF_RANGE 0x89
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_STATISTICS_REPORTING_PERIOD_OUT_OF_RANGE_STR \
|
||||
"Statistics Reporting Period out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_VALUE_OF_AGGRESSIVE_CPU_POWER_CORRECTION_FIELD 0x8B
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_VALUE_OF_AGGRESSIVE_CPU_POWER_CORRECTION_FIELD_STR \
|
||||
"Invalid value of Aggressive CPU Power Correction field"
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Policy could not be updated since PolicyId already exists and is enabled"
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_ILLEGAL 0xD6
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_ILLEGAL_STR \
|
||||
"Command disabled/unavailable due to lack of RTC synchronization"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* No longer in 3.0 */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_LIMIT_IN_ONE_OF_THRESHOLDS_IS_INVALID 0x84
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_LIMIT_IN_ONE_OF_THRESHOLDS_IS_INVALID_STR \
|
||||
"Limit in one of thresholds is invalid"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID 0x87
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID_STR \
|
||||
"Number of thresholds is too large or power limits are invalid"
|
||||
|
||||
/* legacy name */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_THRESHOLDS IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_THRESHOLDS_STR IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID_STR
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Alert thresholds can not be changed for enabled policy, disable it first"
|
||||
|
||||
/* legacy name */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED_STR IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED_STR
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_ONE_OF_PERIODS_IN_THE_TABLE_IS_INCONSISTENT 0x85
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_ONE_OF_PERIODS_IN_THE_TABLE_IS_INCONSISTENT_STR \
|
||||
"One of the periods in the table is inconsistent. Start time is greater than or " \
|
||||
"equal to stop time or stop time sets time beyond 1 day"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_SUSPEND_PERIODS 0x87
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_SUSPEND_PERIODS_STR \
|
||||
"Invalid Number of policy suspend periods"
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Suspend periods can not be changed for enabled policy, disable it first"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_RESET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_STATISTICS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_MODE 0x88
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_MODE_STR \
|
||||
"Invalid Mode"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_CAPABILITIES */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TRIGGER_TYPE 0x82
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TRIGGER_TYPE_STR \
|
||||
"unknown Policy Trigger Type"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TYPE 0x83
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TYPE_STR \
|
||||
"unknown Policy Type"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_LIMITING_POLICY_ID */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NO_POLICY_IS_CURRENTLY_LIMITING 0xA1
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NO_POLICY_IS_CURRENTLY_LIMITING_STR \
|
||||
"No policy is currently limiting for the specified DomainID"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_TURBO_SYNCHRONIZATION_RATIO */
|
||||
/* IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_TURBO_SYNChRONIZATION_RATIO */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_WRONG_CPU_SOCKET_NUMBER 0xA1
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_WRONG_CPU_SOCKET_NUMBER_STR \
|
||||
"Wrong CPU socket number"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_COMMAND_RESPONSE_TIMEOUT 0xA2
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_COMMAND_RESPONSE_TIMEOUT_STR \
|
||||
"Command response timeout"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_READ_FSC_IN_THE_RESPONSE 0xA4
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_READ_FSC_IN_THE_RESPONSE_STR \
|
||||
"Bad read FSC in the response"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_WRITE_FCS_FIELD_IN_THE_RESPONSE 0xA5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_WRITE_FCS_FIELD_IN_THE_RESPONSE_STR \
|
||||
"Bad write FCS field in the response"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CPU_NOT_PRESENT 0xAC
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CPU_NOT_PRESENT_STR \
|
||||
"CPU not present"
|
||||
|
||||
/* standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_PLATFORM_NOT_IN_S0_S1_STATE 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_PLATFORM_NOT_IN_S0_S1_STATE_STR \
|
||||
"Platform not in the S0/S1 state "
|
||||
|
||||
/* standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INCORRECT_ACTIVE_CORES_CONFIGURATION 0xC9
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INCORRECT_ACTIVE_CORES_CONFIGURATION_STR \
|
||||
"Incorrect active cores configuration. Number of active cores exceeding number of cores on CPU"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_INTEL_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_SMTP_CONFIGURATION */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_GET_SMTP_CONFIGURATION */
|
||||
|
||||
/* achu: document from Intel also sites a "write read-only parameter"
|
||||
* error code, but I assume that is a cut and paste typo. Shouldn't
|
||||
* be possible for the "get" command
|
||||
*/
|
||||
|
||||
#define IPMI_COMP_CODE_GET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_OEM_WISTRON_GET_CHASSIS_LED_STATUS */
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER 0x80
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER_STR \
|
||||
"Not yet received any information from Satellite Controller"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS 0x81
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS_STR \
|
||||
"Satellite Controller Not Reporting for more than 10 consecutive seconds, but SC was alive before"
|
||||
|
||||
/* IPMI_CMD_OEM_WISTRON_SET_CHASSIS_LED_STATUS */
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER 0x80
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER_STR \
|
||||
"Not yet received any information from Satellite Controller"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS 0x81
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS_STR \
|
||||
"Satellite Controller Not Reporting for more than 10 consecutive seconds, but SC was alive before"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_DOES_NOT_SUPPORT_CHASSIS_LED_REQUESTED 0x82
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_DOES_NOT_SUPPORT_CHASSIS_LED_REQUESTED_STR \
|
||||
"Satellite Controller does not support one or many chassis LED requested"
|
||||
|
||||
/* IPMI_CMD_OEM_WISTRON_GET_CHASSIS_POWER_READINGS */
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_BMC_HAS_NOT_YET_RECEIVED_ANY_COMMANDS_FROM_SC 0x81
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_BMC_HAS_NOT_YET_RECEIVED_ANY_COMMANDS_FROM_SC_STR \
|
||||
"BMC has not yet received any commands from SC"
|
||||
|
||||
/* achu: spec says "timeout" I'm going to say "timedout" */
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_SC_HAS_TIMEDOUT 0x82
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_SC_HAS_TIMEDOUT_STR \
|
||||
"BMC has received Set Chassis Power Readings/Set Sensor Info from SC, but SC has timedout and is considered offline now."
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
|
||||
/* achu: the strings are all over the place, "status" is the best name
|
||||
* I can think of
|
||||
*/
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS 0x70
|
||||
|
||||
/* achu: names taken from code, are correct names? */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_OEM_DIAGNOSTIC_EVENT_DATA 0x7E
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_FAILURE 0x8A
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_HP_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_HP_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* HP Proliant DL160 G8
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_HP_UID_LIGHT 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_HP_HEALTH_LED 0x71
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_HP_SPEC_H */
|
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT 0x75
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_THERMAL_SENSOR_ON_DIMM 0x76
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_CUPS_EVENT 0x72
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,103 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_PCIE_FATAL_SENSOR 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_PCIE_CORRECTABLE_SENSOR 0x71
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QPI_CORRECTABLE_SENSOR 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QPI_NON_FATAL_SENSOR 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QPI_FATAL_SENSOR 0x74
|
||||
|
||||
/*
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
/* achu: Similar to above, but some events changed and some new ones,
|
||||
* so new macros to differentiate
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_FATAL_SENSOR 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_CORRECTABLE_SENSOR 0x71
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_QPI_CORRECTABLE_SENSOR 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_QPI_NON_FATAL_SENSOR 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_QPI_FATAL_SENSOR 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_CORRECTABLE_ERROR 0x76
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_UNCORRECTABLE_ERROR 0x77
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
/* achu: some are similar to above, but different names, new events,
|
||||
* new numbers, so making new macros to differentiate */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_CORRECTABLE_ERROR 0x71
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_QPI_CORRECTABLE_ERRORS 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_OPI_FATAL_ERROR 0x73
|
||||
/* continuation for IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_OPI_FATAL_ERROR for more offsets */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_OPI_FATAL_ERROR_2 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_CHIPSET_PROPRIETARY 0x75
|
||||
/* continuation for IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR for more offsets */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR_2 0x76
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_QPI_LINK_WIDTH_REDUCED 0x77
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_MEMORY_ERROR_EXTENSION 0x7F
|
||||
|
||||
/*
|
||||
* Intel Windmill
|
||||
* (Quanta Winterfell)
|
||||
* (Wiwynn Windmill)
|
||||
*/
|
||||
/* achu: Like Intel Node Manager, but no Intel Node Manager on these nodes, so cut & paste to differentiate */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_WINDMILL_ME_FW_HEALTH_SENSOR 0x75
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_WINDMILL_OTHER_IIO_ERROR_SENSOR 0x70
|
||||
|
||||
/*
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
*/
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_CORRECTABLE_ERROR 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_FATAL_ERROR 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_FATAL_ERROR_2 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_LINK_WIDTH_REDUCED 0x77
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_PCI_EXPRESS_FATAL_ERRORS 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_PCI_EXPRESS_FATAL_ERRORS_2 0x76
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_PCI_EXPRESS_CORRECTABLE_ERRORS 0x71
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_FIRMWARE_UPDATE_STATUS_SENSOR 0x70
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_BIOS_RECOVERY_START 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_BIOS_RECOVERY_FINISH 0xF0
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_IERR_RECOVERY_DUMP_INFO 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_BIOS 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro X7DBR-3 (X7DBR_3)
|
||||
* Supermicro X7DB8
|
||||
* Supermicro X8DTN
|
||||
* Supermicro X7SBI-LN4 (X7SBI_LN4)
|
||||
* Supermicro X8DTH
|
||||
* Supermicro X8DTG
|
||||
* Supermicro X8DTU
|
||||
* Supermicro X8DT3-LN4F (X8DT3_LN4F)
|
||||
* Supermicro X8DTU-6+ (X8DTU_6PLUS)
|
||||
* Supermicro X8DTL
|
||||
* Supermicro X8DTL-3F (X8DTL_3F)
|
||||
* Supermicro X8SIL-F (X8SIL_F)
|
||||
* Supermicro X9SCL
|
||||
* Supermicro X9SCM
|
||||
* Supermicro X8DTN+-F (X8DTNPLUS_F)
|
||||
* Supermicro X8SIE
|
||||
* Supermicro X9SCA-F-O (X9SCA_F_O)
|
||||
* Supermicro H8DGU-F (H8DGU_F)
|
||||
* Supermicro X9DRi-F (X9DRI_F)
|
||||
* Supermicro X9DRI-LN4F+ (X9DRI_LN4F_PLUS)
|
||||
* Supermicro X9SPU-F-O (X9SPU_F_O)
|
||||
* Supermicro X9SCM-iiF (X9SCM_IIF)
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_GENERIC 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY 192
|
||||
|
||||
/* w/ IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY_NO_RETRIES 0x00
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY_INDEFINITE_RETRY 0xFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_LAN_CONFIGURATION_PARAMETERS_INVENTEC_SPEC_H */
|
@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY 192
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL 193
|
||||
|
||||
/* w/ IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY_NO_RETRIES 0x00
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY_INDEFINITE_RETRY 0xFF
|
||||
|
||||
/* w/ IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_BITMASK 0x80
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_SHIFT 7
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_LINK_DOWN_RESILIENCE_ENABLED 1
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_DHCP_RE_DISCOVERY_ENABLED 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_LAN_CONFIGURATION_PARAMETERS_WISTRON_SPEC_H */
|
@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_DELL_SPEC_H
|
||||
#define IPMI_NETFN_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_RS 0x31
|
||||
|
||||
/*
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RQ 0x34
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RS 0x35
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_DELL_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_NETFN_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu RX100 S5
|
||||
*/
|
||||
#define IPMI_NET_FN_OEM_FUJITSU_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_FUJITSU_GENERIC_RS 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_IBM_SPEC_H
|
||||
#define IPMI_NETFN_OEM_IBM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IBM x3455/x3755
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_IBM_LED_RQ 0x3A
|
||||
#define IPMI_NET_FN_OEM_IBM_LED_RS 0x3B
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_IBM_SPEC_H */
|
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_INTEL_SPEC_H
|
||||
#define IPMI_NETFN_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_INTEL_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_INTEL_GENERIC_RS 0x31
|
||||
|
||||
#define IPMI_NET_FN_OEM_INTEL_CONFIG_RQ 0x32
|
||||
#define IPMI_NET_FN_OEM_INTEL_CONFIG_RS 0x33
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_NETFN_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_GENERIC_RS 0x31
|
||||
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RQ 0x34
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RS 0x35
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_NETFN_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_QUANTA_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_QUANTA_GENERIC_RS 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_NETFN_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro H8QME
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_GENERIC_RS 0x31
|
||||
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_PEPPERCON_RQ 0x3C
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_PEPPERCON_RS 0x3D
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_NETFN_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_WISTRON_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_WISTRON_GENERIC_RS 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_WISTRON_SPEC_H */
|
1312
source/freeipmi/usr/include/freeipmi/spec/oem/ipmi-oem-dell-spec.h
Normal file
1312
source/freeipmi/usr/include/freeipmi/spec/oem/ipmi-oem-dell-spec.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,244 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu iRMC S1 / iRMC S2
|
||||
*
|
||||
* All of the below are from
|
||||
*
|
||||
* http://manuals.ts.fujitsu.com/file/4390/irmc_s2-en.pdf
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_POWER */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_ON_SOURCE 0x15
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_OFF_SOURCE 0x16
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_POWER_OFF_INHIBIT 0x1C
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_OFF_INHIBIT 0x1D
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_NEXT_POWER_ON_TIME 0x20
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_COMMUNICATION */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SYSTEM_OS_SHUTDOWN_REQUEST 0x05
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SYSTEM_OS_SHUTDOWN_REQUEST_AND_RESET 0x06
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_AGENT_CONNECT_STATUS 0x08
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SHUTDOWN_REQUEST_CANCELLED 0x09
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_FAN_TEST */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_WRITE_TO_SYSTEM_DISPLAY 0x02
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_BIOS */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_BIOS_POST_STATE 0x09
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_CPU_INFO 0x15
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_SYSTEM */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SYSTEM_STATUS 0x10
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_EEPROM_VERSION_INFO 0x12
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SEL_ENTRY_LONG_TEXT 0x43
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SEL_ENTRY_TEXT 0x45
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_IDENTIFY_LED 0xB0
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_IDENTIFY_LED 0xB1
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_ERROR_LED 0xB3
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_RESET_NONVOLATILE_CFG_VARIABLES_TO_DEFAULT 0xDF
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_RESET_CONFIGSPACE_VARIABLES_TO_DEFAULT 0xE0
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_GET_REMOTE_STORAGE_CONNECTION_OR_STATUS */
|
||||
/* achu: making up names, not listed in documents */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_REMOTE_STORAGE_CONNECTED 0x01
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_REMOTE_STORAGE_STATUS 0x02
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_ON_SOURCE */
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_SOFTWARE_OR_COMMAND 0x00
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_POWER_SWITCH 0x01
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_AUTOMATIC_RESTART_AFTER_POWER_FAILURE 0x02
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_CLOCK_OR_TIMER 0x03
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_AUTOMATIC_RESTART_AFTER_FAN_FAILURE_SHUTDOWN 0x04
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_AUTOMATIC_RESTART_AFTER_CRITICAL_TEMPERATURE_SHUTDOWN 0x05
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_AFTER_WATCHDOG_TIMEOUT 0x08
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REMOTE_ON 0x09
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_AFTER_A_CPU_ERROR 0x0C
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_BY_HARDWARE_RESET 0x15
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_AFTER_WARM_START 0x16
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_POWERED_ON_BY_A_PCI_BUS_POWER_MANAGEMENT_EVENT 0x1A
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_POWERED_ON_BY_REMOTE_CONTROL_VIA_REMOTE_MANAGER 0x1D
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_RESET_BY_REMOTE_CONTROL_VIA_REMOTE_MANAGER 0x1E
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_OFF_SOURCE */
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_SOFTWARE 0x00
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_POWER_SWITCH 0x01
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_AC_POWER_FAIL 0x02
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_CLOCK_OR_TIMER 0x03
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_FAN_FAILURE 0x04
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_CRITICAL_TEMPERATURE 0x05
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_FINAL_POWER_OFF_AFTER_REPEATED_WATCHDOG_TIMEOUTS 0x08
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_FINAL_POWER_OFF_AFTER_REPEATED_CPU_ERRORS 0x0C
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_POWERED_OFF_BY_REMOTE_CONTROL_VIA_REMOTE_MANAGER 0x1D
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SYSTEM_STATUS */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SYSTEM_POWER_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SYSTEM_POWER_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SEL_ENTRIES_AVAILABLE_BITMASK 0x10
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SEL_ENTRIES_AVAILABLE_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_WATCHDOG_ACTIVE_BITMASK 0x04
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_WATCHDOG_ACTIVE_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_AGENT_CONNECTED_BITMASK 0x02
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_AGENT_CONNECTED_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_POST_STATE_BITMASK 0x01
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_POST_STATE_SHIFT 0
|
||||
|
||||
/* rename from "localize" */
|
||||
/* Bit 7 */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_LOCAL_LED_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_LOCAL_LED_SHIFT 7
|
||||
/* Bit 6..4 currently undefined */
|
||||
|
||||
/* Bit 3..2 */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_CSS_LED_BITMASK 0x0C
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_CSS_LED_SHIFT 2
|
||||
|
||||
/* Bit 1..0 */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_GLOBAL_ERROR_LED_BITMASK 0x03
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_GLOBAL_ERROR_LED_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_NEW_SEL_ENTRY_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_NEW_SEL_ENTRY_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_SEL_CLEARED_BITMASK 0x40
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_SEL_CLEARED_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SDR_MODIFIED_BITMASK 0x20
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SDR_MODIFIED_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NONVOLATILE_IPMI_VARIABLE_MODIFIED_BITMASK 0x10
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NONVOLATILE_IPMI_VARIABLE_MODIFIED_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_CONFIGSPACE_MODIFIED_BITMASK 0x08
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_CONFIGSPACE_MODIFIED_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NEW_OUTPUT_ON_LOCALVIEW_DISPLAY_BITMASK 0x01
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NEW_OUTPUT_ON_LOCALVIEW_DISPLAY_SHIFT 0
|
||||
|
||||
/* achu: not defined in Fujitsu docs. "off" is confirmed to be
|
||||
* correct, but "on" and "blink" are being gussed based on ordering of
|
||||
* error leds in LED sections.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_CSS_LED_OFF 0x0
|
||||
#define IPMI_OEM_FUJITSU_CSS_LED_ON 0x1
|
||||
#define IPMI_OEM_FUJITSU_CSS_LED_BLINK 0x2
|
||||
|
||||
/* achu: not defined in Fujitsu docs. "off" is confirmed to be
|
||||
* correct, but "on" and "blink" are being gussed based on ordering of
|
||||
* error leds in LED sections.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_GLOBAL_ERROR_LED_OFF 0x0
|
||||
#define IPMI_OEM_FUJITSU_GLOBAL_ERROR_LED_ON 0x1
|
||||
#define IPMI_OEM_FUJITSU_GLOBAL_ERROR_LED_BLINK 0x2
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_EEPROM_VERSION_INFO */
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_NUMBER_MIN 0
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_NUMBER_MAX 1
|
||||
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_CHECKSUM_OK 0x01
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_CHECKSUM_ERROR 0x00
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SEL_ENTRY_LONG_TEXT */
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S1_MAX_READ_LENGTH 32
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S2_MAX_READ_LENGTH 100
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S1_MAX_DATA_LENGTH 80
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S2_MAX_DATA_LENGTH 100
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_MAX_READ_LENGTH 100
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_MAX_DATA_LENGTH 100
|
||||
|
||||
/*
|
||||
* CSS (Customer Self Service)
|
||||
*
|
||||
* If the component is marked as CSS, the customer can replace it by
|
||||
* himself without a service technican (e.g. Memory DIMM etc.) CSS is
|
||||
* combined with the severity information.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_CSS_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_CSS_SHIFT 7
|
||||
|
||||
/*
|
||||
* Severity of a decoded event. All events should have an assigned severity.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_BITMASK 0x70
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_FUJITSU_CSS_COMPONENT 1
|
||||
#define IPMI_OEM_FUJITSU_NO_CSS_COMPONENT 0
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_INFORMATIONAL 0
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_MINOR 1
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_MAJOR 2
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_CRITICAL 3
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_IDENTIFY_LED / IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_IDENTIFY_LED */
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_ON 0x1
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_OFF 0x0
|
||||
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_BITMASK 0x01
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_SHIFT 0
|
||||
|
||||
/* IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_ERROR_LED */
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_OFF_GEL_OFF 0
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_OFF_GEL_ON 1
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_OFF_GEL_BLINK 2
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_ON_GEL_OFF 3
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_ON_GEL_ON 4
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_ON_GEL_BLINK 5
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_BLINK_GEL_OFF 6
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_BLINK_GEL_ON 7
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_BLINK_GEL_BLINK 8
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_REMOTE_STORAGE_STATUS */
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_CONNECTION_MIN 0
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_CONNECTION_MAX 1
|
||||
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_CONNECTED 0x01
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_NOT_CONNECTED 0x00
|
||||
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_INVALID_UNKNOWN 0x00
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_IDLE 0x01
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTION_ATTEMPT_PENDING 0x02
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTED 0x03
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTION_ATTEMPTS_RETRIES_EXHAUSTED_FAILED 0x04
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTION_LOST 0x05
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_DISCONNECT_PENDING 0x06
|
||||
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_INVALID_UNKNOWN 0x00
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_STORAGE_SERVER_IPMI 0x01
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_APPLET 0x02
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_NONE_NOT_CONNECTED 0x03
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,132 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_IBM_SPEC_H
|
||||
#define IPMI_OEM_IBM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IBM x3455/x3755
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_IBM_GET_LED */
|
||||
|
||||
#define IPMI_OEM_IBM_LED_STATE_INACTIVE 0x0
|
||||
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_LED 0x1
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_SENSOR 0x2
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_USER 0x3
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_BIOS_OR_ADMINISTRATOR 0x4
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3455_LOCATION 0x1
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU 0x0010
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU1 0x0030
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU2 0x0031
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU3 0x0032
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU4 0x0033
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU1_BOARD 0x00B8
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU2_BOARD 0x00B9
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU3_BOARD 0x00BA
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU4_BOARD 0x00BB
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_1 0x0060
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_2 0x0061
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_3 0x0062
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_4 0x0063
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_5 0x0064
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_6 0x0065
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_7 0x0066
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_8 0x0067
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_9 0x0068
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_10 0x0069
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_11 0x006A
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_12 0x006B
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_13 0x006C
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_14 0x006D
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_15 0x006E
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_16 0x006F
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_17 0x00C0
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_18 0x00C1
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_19 0x00C2
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_20 0x00C3
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_21 0x00C4
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_22 0x00C5
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_23 0x00C6
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_24 0x00C7
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_25 0x00C8
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_26 0x00C9
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_27 0x00CA
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_28 0x00CB
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_29 0x00CC
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_30 0x00CD
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_31 0x00CE
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_32 0x00CF
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN 0x0014
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_1 0x0050
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_2 0x0051
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_3 0x0052
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_4 0x0053
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_5 0x0054
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_6 0x0055
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_7 0x0056
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_8 0x0057
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI 0x0020
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_1 0x0070
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_2 0x0071
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_3 0x0072
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_4 0x0073
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_5 0x0074
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_6 0x0075
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_SERVERAID_8K_BATT 0x00D0
|
||||
#define IPMI_OEM_IBM_LED_X3755_SERVERAID_8K_ERR 0x00D1
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_ALERT 0x00D9
|
||||
#define IPMI_OEM_IBM_LED_X3755_BK_BLUE 0x00D8
|
||||
#define IPMI_OEM_IBM_LED_X3755_BOARD 0x000E
|
||||
#define IPMI_OEM_IBM_LED_X3755_CNFG 0x0006
|
||||
#define IPMI_OEM_IBM_LED_X3755_DASD 0x0013
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAULT 0x0000
|
||||
#define IPMI_OEM_IBM_LED_X3755_HTX 0x00B0
|
||||
#define IPMI_OEM_IBM_LED_X3755_INFO 0x0003
|
||||
#define IPMI_OEM_IBM_LED_X3755_LOCATION 0x0001
|
||||
#define IPMI_OEM_IBM_LED_X3755_MEM 0x0015
|
||||
#define IPMI_OEM_IBM_LED_X3755_NMI 0x0019
|
||||
#define IPMI_OEM_IBM_LED_X3755_OVERSPEC 0x001B
|
||||
#define IPMI_OEM_IBM_LED_X3755_RAID 0x000F
|
||||
#define IPMI_OEM_IBM_LED_X3755_SEER 0x000B
|
||||
#define IPMI_OEM_IBM_LED_X3755_SP 0x001E
|
||||
#define IPMI_OEM_IBM_LED_X3755_TEMP 0x001C
|
||||
#define IPMI_OEM_IBM_LED_X3755_VRM 0x0011
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_UNKNOWN1 0x0040
|
||||
#define IPMI_OEM_IBM_LED_X3755_UNKNOWN2 0x0041
|
||||
#define IPMI_OEM_IBM_LED_X3755_UNKNOWN3 0x0047
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_IBM_SPEC_H */
|
@ -0,0 +1,112 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_INTEL_SPEC_H
|
||||
#define IPMI_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_RESTORE_CONFIGURATION */
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_OPERATION_INITIATE_RESTORE 0xAA
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_OPERATION_GET_RESTORE_STATUS 0x00
|
||||
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_RESTORE_PROGRESS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_RESTORE_PROGRESS_RESTORE_COMPLETED 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_SET_SMTP_CONFIGURATION / IPMI_CMD_OEM_INTEL_GET_SMTP_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_ENABLE_SMTP 0x00
|
||||
/* MS byte first */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_SERVER_ADDRESS 0x01
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_USER_NAME 0x02
|
||||
/* write only */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_USER_PASSWORD 0x03
|
||||
/* read only */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_NUMBER_OF_DESTINATIONS 0x04
|
||||
/* max 2 blocks - doc says 64 bytes, but 2 blocks appears to be correct */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_EMAIL_ADDRESS 0x05
|
||||
/* max 2 blocks */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SUBJECT 0x06
|
||||
/* max 4 blocks */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_MESSAGE_CONTENT 0x07
|
||||
/* max 4 blocks according to doc, but according to firmware max 1 block when you write */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SENDER_EMAIL_ADDRESS 0x08
|
||||
/* max 2 blocks */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_HOST_NAME 0x09
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_STRING_BLOCK_LENGTH 16
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_USER_NAME_MAX_BLOCKS 1
|
||||
/* XXX: document says max 20 bytes, but fails on second block, so we use 1 block */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_USER_PASSWORD_MAX_BLOCKS 1
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_EMAIL_ADDRESS_MAX_BLOCKS 2
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SUBJECT_MAX_BLOCKS 2
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_MESSAGE_CONTENT_MAX_BLOCKS 4
|
||||
/* XXX: document indicates 2 blocks, but firmware has errors on > 1 block, so we use 1 block */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SENDER_EMAIL_ADDRESS_MAX_BLOCKS 1
|
||||
/* XXX: document indicates 2 blocks, but firmware has errors on > 1 block, so we use 1 block */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_HOST_NAME_MAX_BLOCKS 1
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_STRING_LENGTH_MAX (4*IPMI_OEM_INTEL_SMTP_STRING_BLOCK_LENGTH)
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_USER_PASSWORD_LENGTH_MAX 20
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_VALID(__value) \
|
||||
(((__value + 1) >= (IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_ENABLE_SMTP + 1) \
|
||||
&& (__value) <= IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_HOST_NAME) ? 1 : 0)
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_NO_SET_SELECTOR 0x0
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_NO_BLOCK_SELECTOR 0x0
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_ENABLE_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_SMTP_ENABLE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_ENABLE 0x1
|
||||
#define IPMI_OEM_INTEL_SMTP_DISABLE 0x0
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_SET_POWER_RESTORE_DELAY / IPMI_CMD_OEM_INTEL_GET_POWER_RESTORE_DELAY */
|
||||
#define IPMI_OEM_INTEL_POWER_RESTORE_DELAY_MSB_MASK 0x07
|
||||
#define IPMI_OEM_INTEL_POWER_RESTORE_DELAY_LSB_MASK 0xFF
|
||||
|
||||
#define IPMI_OEM_INTEL_POWER_RESTORE_DELAY_MAX 0x07FF
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_GET_BMC_SERVICE_STATUS / IPMI_CMD_OEM_INTEL_CONTROL_BMC_SERVICES */
|
||||
|
||||
#define IPMI_OEM_INTEL_DISABLE_SERVICES 0x00
|
||||
#define IPMI_OEM_INTEL_ENABLE_SERVICES 0x01
|
||||
|
||||
#define IPMI_OEM_INTEL_STANDARD_SERVICES_SSH 0x80
|
||||
#define IPMI_OEM_INTEL_STANDARD_SERVICES_HTTP 0x20
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,332 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
/* achu: all named from doc except 'lan' configuration id, which I assumed names */
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_GET_EXTENDED_CONFIGURATION / IPMI_OEM_INVENTEC_SET_EXTENDED_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_NIC 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_SOL 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_SECURITY 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_ACCOUNT_STATUS 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_DNS 0x06
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_WEB_SERVER_CONFIGURATION 0x0C
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_FIRMWARE_LOG 0x0E
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_FIRMWARE_INFORMATION 0x0F
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_FIRMWARE_UPDATE 0x10
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_POWER_MANAGEMENT 0x11
|
||||
|
||||
/* nic status - 1 byte, 0 = shared, 1 = dedicated
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_NIC_MODE 0x01
|
||||
|
||||
/* sol idle timeout - 2 bytes, ls byte first, 0h = no timeout, default = 01h
|
||||
*
|
||||
* telnet/ssh redirect enable - 1 byte, 0 = disable, 1 = enabled
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SOL_SOL_IDLE_TIMEOUT 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_SSH_REDIRECT_ENABLE 0x02
|
||||
|
||||
/* service disabled - 1 byte, bitmask
|
||||
* - 0x01 = all service except IPMI are disabled
|
||||
* (takes precedence over other bits)
|
||||
* - 0x02 = KVM/Virtual Storage
|
||||
* - 0x04 = HTTP/HTTPS
|
||||
* - 0x08 = SSH/Telnet
|
||||
*
|
||||
* max authentication failures - 1 byte, 0 = disable
|
||||
*
|
||||
* lockout window - 2 bytes, in seconds, 0 = disable, default = 180
|
||||
*
|
||||
* lockout time - 2 bytes, in seconds, 0 = disable, default = 3600
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_MAX_AUTHENTICATION_FAILURES 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_LOCKOUT_WINDOW 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_LOCKOUT_TIME 0x04
|
||||
|
||||
/* number of user - 1 byte, read only
|
||||
*
|
||||
* number of enabled user - 1 byte, read only
|
||||
*
|
||||
* user name - 1-17 bytes, read only
|
||||
* - Inventec 5441/Xanadu II - reports stored as p-string, does not return p-string
|
||||
* - Inventec 5442/Xanadu III - returns as p-string
|
||||
*
|
||||
* account status - 1 byte
|
||||
* - 0x00 - status unspecified
|
||||
* - 0x01 - enabled via set user password
|
||||
* - 0x02 - disabled via set user password
|
||||
* - 0x03 - user id is lockout
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_USER 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_ENABLED_USER 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_USER_NAME 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS 0x04
|
||||
|
||||
/* DNS DHCP enable - 1 byte, 0 - false, 1 - true
|
||||
* - DNS server IP addresses should be assigned from DHCP server
|
||||
*
|
||||
* DNS Server1 - 4 bytes
|
||||
* - IP address for DNS server 1, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Server2 - 4 bytes
|
||||
* - IP address for DNS server 2, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Register BMC - 0 - false, 1 - true
|
||||
* - Enable registering the BMC host name on the DNS server
|
||||
*
|
||||
* DNS BMC Host Name - 1-64 bytes
|
||||
* - Specifies the DNS BMC host name, read only if DNS Register BMC is TRUE.
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Domain Name DHCP Enable - 1 byte
|
||||
* - DNS domain name should be assigned from DHCP
|
||||
*
|
||||
* DNS Domain Name - 1-256 bytes
|
||||
* - DNS domain name string, read only if DNS Domain Name DHCP Enable is TRUE
|
||||
* - Stored as P-string
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DHCP_ENABLE 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER1 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER2 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTER_BMC 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME_DHCP_ENABLE 0x06
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME 0x07
|
||||
|
||||
/* web server enabled - 1 byte, 0 = false, 1 = true (default)
|
||||
*
|
||||
* max web sessions - 1 byte, read only
|
||||
*
|
||||
* active web sessions - 1 byte, read only
|
||||
*
|
||||
* web server timeout - 4 bytes, in seconds, 0 = disable, range 60-1920, default 300
|
||||
*
|
||||
* http port num - 2 bytes, default 80
|
||||
*
|
||||
* https port num - 2 bytes, default 443
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_ENABLED 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_MAX_WEB_SESSIONS 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_ACTIVE_WEB_SESSIONS 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_TIMEOUT 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTP_PORT_NUM 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTPS_PORT_NUM 0x06
|
||||
|
||||
/* entity - 1 byte (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* update date / time - 3 bytes, from 0:00 1/1/08, lsbyte first
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_ENTITY 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_FIRMWARE_VERSION 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BRANCH 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BUILD_INFORMATION 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_UPDATE_DATE_TIME 0x05
|
||||
|
||||
/* name - 1-16 bytes (read only)
|
||||
*
|
||||
* description - 1-256 bytes (read only)
|
||||
*
|
||||
* entity - 1 byte (read only)
|
||||
*
|
||||
* product info - 1-64 bytes (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH 0x06
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION 0x07
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME_LEN 16
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION_LEN 256
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO_LEN 64
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION_LEN 16
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH_LEN 16
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION_LEN 16
|
||||
|
||||
/* remote update enable - 1 byte, ??
|
||||
*
|
||||
* protocol - 1 byte, bitmask, 7:3 reserved, 2 : http, 1: ftp, 0: tftp (read only)
|
||||
*
|
||||
* uri - 1-256 bytes
|
||||
* note - first char should be a file or unit separator
|
||||
*
|
||||
* connection retry - 1 byte, 0 = no retries
|
||||
*
|
||||
* retry interval - 1 byte, in 5 second increments
|
||||
*
|
||||
* delay time - 1 byte, in seconds, 0h = immediate, ffh = random between 5 and 10
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_CONNECTION_RETRY 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME 0x06
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL_INCREMENTS 5
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI_LEN 256
|
||||
|
||||
/* power management enable - 1 byte, bit 7: 0 = disable, 1 = enable, reset reserved
|
||||
*
|
||||
* power staggery ac recovery - 1 byte, 0x00 = immediate power on
|
||||
* (default), 0x01 = auto, random between min and max below, 0x02 =
|
||||
* user defined, must be between min and max below
|
||||
*
|
||||
* power on delay - 2 bytes
|
||||
*
|
||||
* minimum power on delay - 2 bytes (read only)
|
||||
*
|
||||
* maximum power on delay - 2 bytes
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_ON_DELAY 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MINIMUM_POWER_ON_DELAY 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MAXIMUM_POWER_ON_DELAY 0x05
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_READ_ALL_BYTES 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_NIC_MODE */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_NIC_MODE_SHARED 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_NIC_MODE_DEDICATED 0x01
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_ENABLE_ALL 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_ALL 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_KVM_VIRTUAL_STORAGE 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_HTTP_HTTPS 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SSH_TELNET 0x08
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_UNSPECIFIED 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_ENABLED 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_DISABLED 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_LOCKOUT 0x03
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_DNS_DNS_BMC_HOST_NAME_MAX 64
|
||||
|
||||
/* IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_DNS_DNS_DOMAIN_NAME_MAX 256
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_BMC 0
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_SYSTEM_BIOS 1
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_PDB 2
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_FCB 3
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_TFTP 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_FTP 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_HTTP 0x04
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_DELAY_TIME_RANDOM 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE */
|
||||
/* DPNM = Dynamic Power Node Management */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_BITMASK 0x80
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_SHIFT 7
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_ENABLE 1
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_DISABLE 0
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_IMMEDIATE 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_AUTO 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_USER_DEFINED 0x02
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_UPDATE_FIRMARE */
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_INTERFACE_SYSTEM_INTERFACE 0x00
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_INTERFACE_NETWORKING 0x01
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_INTERFACE_USB 0x02
|
||||
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_BITMASK 0x80
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_FORCE_UPDATE 1
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_NORMAL_UPDATE 0
|
||||
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_OEM_DELL_CONFIG_PRESERVE 0x00
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_OEM_DELL_CONFIG_NOPRESERVE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_GET_UPDATE_STATUS */
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_TRANSMITTING_IMAGE 0x00
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_VALIDATING_IMAGE 0x01
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_PROGRAMMING 0x02
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_READY_TO_ACCEPT_IMAGE 0x03
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_GENERAL_ERROR 0x80
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_CANNOT_ESTABLISH_CONNECTION 0x81
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_PATH_NOT_FOUND 0x82
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_TRANSMISSION_ABORT 0x83
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_CHECKSUM_ERROR 0x84
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_INCORRECT_PLATFORM 0x85
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_COMPLETED 0xFF
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_RESTORE_TO_DEFAULTS */
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_RESTORE_FLAG_RESTORE_PARAMETERS_NOT_INCLUDED_BELOW 0x7
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_RESTORE_FLAG_REMAINING_PARAMETERS_STAY_WHAT_IT_IS 0x0
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_RESTORE_FLAG_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_PEF_BITMASK 0x10
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_SERIAL_CONFIGURATION_BITMASK 0x08
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_SOL_CONFIGURATION_BITMASK 0x04
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_LAN_CONFIGURATION_BITMASK 0x02
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_USER_ACCOUNTS_BITMASK 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_GET_RESTORE_STATUS */
|
||||
#define IPMI_OEM_INVENTEC_GET_RESTORE_STATUS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_INVENTEC_GET_RESTORE_STATUS_RESTORE_COMPLETE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_SET_ASSET_TAG */
|
||||
#define IPMI_OEM_INVENTEC_ASSET_TAG_MAX 10
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,331 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
|
||||
/* achu: all named from doc except 'lan' configuration id, which I assumed names */
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_GET_EXTENDED_CONFIGURATION / IPMI_OEM_QUANTA_SET_EXTENDED_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_NIC 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_SOL 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_SECURITY 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_ACCOUNT_STATUS 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_DNS 0x06
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_WEB_SERVER_CONFIGURATION 0x0C
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_FIRMWARE_LOG 0x0E
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_FIRMWARE_INFORMATION 0x0F
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_FIRMWARE_UPDATE 0x10
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_POWER_MANAGEMENT 0x11
|
||||
|
||||
/* nic status - 1 byte, 0 = shared, 1 = dedicated
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_NIC_MODE 0x01
|
||||
|
||||
/* sol idle timeout - 2 bytes, ls byte first, 0h = no timeout, default = 01h
|
||||
*
|
||||
* telnet/ssh redirect enable - 1 byte, 0 = disable, 1 = enabled
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SOL_SOL_IDLE_TIMEOUT 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_SSH_REDIRECT_ENABLE 0x02
|
||||
|
||||
/* service disabled - 1 byte, bitmask
|
||||
* - 0x01 = all service except IPMI are disabled
|
||||
* (takes precedence over other bits)
|
||||
* - 0x02 = KVM/Virtual Storage
|
||||
* - 0x04 = HTTP/HTTPS
|
||||
* - 0x08 = SSH/Telnet
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED 0x01
|
||||
|
||||
/* number of user - 1 byte, read only
|
||||
*
|
||||
* number of enabled user - 1 byte, read only
|
||||
*
|
||||
* user name - 1-17 bytes, read only
|
||||
* - Quanta 5441/Xanadu II - reports stored as p-string, does not return p-string
|
||||
* - Quanta 5442/Xanadu III - returns as p-string
|
||||
*
|
||||
* account status - 1 byte
|
||||
* - 0x00 - status unspecified
|
||||
* - 0x01 - enabled via set user password
|
||||
* - 0x02 - disabled via set user password
|
||||
* - 0x03 - user id is lockout
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_USER 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_ENABLED_USER 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_USER_NAME 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS 0x04
|
||||
|
||||
/* DNS DHCP enable - 1 byte, 0 - false, 1 - true
|
||||
* - DNS server IP addresses should be assigned from DHCP server
|
||||
*
|
||||
* DNS Server1 - 4 bytes
|
||||
* - IP address for DNS server 1, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Server2 - 4 bytes
|
||||
* - IP address for DNS server 2, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Register BMC - 0 - false, 1 - true
|
||||
* - Enable registering the BMC host name on the DNS server
|
||||
*
|
||||
* DNS BMC Host Name - 1-64 bytes
|
||||
* - Specifies the DNS BMC host name, read only if DNS Register BMC is TRUE.
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Domain Name DHCP Enable - 1 byte
|
||||
* - DNS domain name should be assigned from DHCP
|
||||
*
|
||||
* DNS Domain Name - 1-256 bytes
|
||||
* - DNS domain name string, read only if DNS Domain Name DHCP Enable is TRUE
|
||||
* - Stored as P-string
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DHCP_ENABLE 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER1 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER2 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTER_BMC 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME_DHCP_ENABLE 0x06
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME 0x07
|
||||
|
||||
/* web server enabled - 1 byte, 0 = false, 1 = true (default)
|
||||
*
|
||||
* max web sessions - 1 byte, read only
|
||||
*
|
||||
* active web sessions - 1 byte, read only
|
||||
*
|
||||
* web server timeout - 4 bytes, in seconds, 0 = disable, range 60-1920, default 300
|
||||
*
|
||||
* http port num - 2 bytes, default 80
|
||||
*
|
||||
* https port num - 2 bytes, default 443
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_ENABLED 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_MAX_WEB_SESSIONS 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_ACTIVE_WEB_SESSIONS 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_TIMEOUT 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTP_PORT_NUM 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTPS_PORT_NUM 0x06
|
||||
|
||||
/* entity - 1 byte (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* update date / time - 3 bytes, from 0:00 1/1/08, lsbyte first
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_ENTITY 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_FIRMWARE_VERSION 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BRANCH 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BUILD_INFORMATION 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_UPDATE_DATE_TIME 0x05
|
||||
|
||||
/* name - 1-16 bytes (read only)
|
||||
*
|
||||
* description - 1-256 bytes (read only)
|
||||
*
|
||||
* entity - 1 byte (read only)
|
||||
*
|
||||
* product info - 1-64 bytes (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH 0x06
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION 0x07
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME_LEN 16
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION_LEN 256
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO_LEN 64
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION_LEN 16
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH_LEN 16
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION_LEN 16
|
||||
|
||||
/* remote update enable - 1 byte, ??
|
||||
*
|
||||
* protocol - 1 byte, bitmask, 7:3 reserved, 2 : http, 1: ftp, 0: tftp (read only)
|
||||
*
|
||||
* uri - 1-256 bytes
|
||||
* note - first char should be a file or unit separator
|
||||
*
|
||||
* connection retry - 1 byte, 0 = no retries
|
||||
*
|
||||
* retry interval - 1 byte, in 5 second increments
|
||||
*
|
||||
* delay time - 1 byte, in seconds, 0h = immediate, ffh = random between 5 and 10
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_CONNECTION_RETRY 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME 0x06
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL_INCREMENTS 5
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI_LEN 256
|
||||
|
||||
/* power management enable - 1 byte, bit 7: 0 = disable, 1 = enable, reset reserved
|
||||
*
|
||||
* power staggery ac recovery - 1 byte, 0x00 = immediate power on
|
||||
* (default), 0x01 = auto, random between min and max below, 0x02 =
|
||||
* user defined, must be between min and max below
|
||||
*
|
||||
* power on delay - 2 bytes
|
||||
*
|
||||
* minimum power on delay - 2 bytes (read only)
|
||||
*
|
||||
* maximum power on delay - 2 bytes
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_ON_DELAY 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MINIMUM_POWER_ON_DELAY 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MAXIMUM_POWER_ON_DELAY 0x05
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_READ_ALL_BYTES 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_NIC_MODE */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_NIC_MODE_SHARED 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_NIC_MODE_DEDICATED 0x01
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_ENABLE_ALL 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_ALL 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_KVM_VIRTUAL_STORAGE 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_HTTP_HTTPS 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SSH_TELNET 0x08
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_UNSPECIFIED 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_ENABLED 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_DISABLED 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_LOCKOUT 0x03
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_DNS_DNS_BMC_HOST_NAME_MAX 64
|
||||
|
||||
/* IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_DNS_DNS_DOMAIN_NAME_MAX 256
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_BMC 0
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_SYSTEM_BIOS 1
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_PDB 2
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_FCB 3
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_TFTP 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_FTP 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_HTTP 0x04
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_DELAY_TIME_RANDOM 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE */
|
||||
/* DPNM = Dynamic Power Node Management */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_BITMASK 0x80
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_SHIFT 7
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_ENABLE 1
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_DISABLE 0
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_IMMEDIATE 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_AUTO 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_USER_DEFINED 0x02
|
||||
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_RESET_TO_DEFAULTS */
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_RESTORE_FLAG_RESTORE_PARAMETERS_NOT_INCLUDED_BELOW 0x7
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_RESTORE_FLAG_REMAINING_PARAMETERS_STAY_WHAT_IT_IS 0x0
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_RESTORE_FLAG_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_PEF_BITMASK 0x10
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_SERIAL_CONFIGURATION_BITMASK 0x08
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_SOL_CONFIGURATION_BITMASK 0x04
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_LAN_CONFIGURATION_BITMASK 0x02
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_USER_ACCOUNTS_BITMASK 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_GET_RESTORE_STATUS */
|
||||
#define IPMI_OEM_QUANTA_GET_RESTORE_STATUS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_QUANTA_GET_RESTORE_STATUS_RESTORE_COMPLETE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_GET_PROCESSOR_INFORMATION */
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_CELERON 0x00
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_PENTIUM_3 0x01
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_PENTIUM_4 0x02
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_XEON 0x03
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_PRESTONIA 0x04
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_NOCONA 0x05
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_OPTERON 0x06
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_DEMPSEY 0x07
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_CLOVERTOWN 0x08
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_TIGERTON 0x09
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_DUNNINGTON 0x0A
|
||||
/* achu: listed as "Hapertown" in spec, assuming typo */
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_HARPERTOWN 0x0B
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_WOLFDALE_DP 0x0C
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_NEHALEM_EP 0x0D
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_WESTMERE_EP 0x0E
|
||||
/* 0x0F-0xFE - Reserved */
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_NO_CPU_PRESENT 0xFF
|
||||
|
||||
/*******************************************
|
||||
* Sun Microsystems *
|
||||
*******************************************/
|
||||
|
||||
/*
|
||||
* Sun 4140
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_SUN_GET_LED / IPMI_CMD_OEM_SUN_SET_LED */
|
||||
#define IPMI_OEM_SUN_LED_MODE_OFF 0
|
||||
#define IPMI_OEM_SUN_LED_MODE_ON 1
|
||||
#define IPMI_OEM_SUN_LED_MODE_STANDBY 2
|
||||
#define IPMI_OEM_SUN_LED_MODE_SLOW 3
|
||||
#define IPMI_OEM_SUN_LED_MODE_FAST 4
|
||||
|
||||
#define IPMI_OEM_SUN_LED_FORCE_GO_THRU_CONTROLLER 0
|
||||
#define IPMI_OEM_SUN_LED_FORCE_DIRECTLY_ACCESS_DEVICE 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
#define IPMI_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Sun 4140
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_SUN_GET_LED / IPMI_CMD_OEM_SUN_SET_LED */
|
||||
#define IPMI_OEM_SUN_LED_MODE_OFF 0
|
||||
#define IPMI_OEM_SUN_LED_MODE_ON 1
|
||||
#define IPMI_OEM_SUN_LED_MODE_STANDBY 2
|
||||
#define IPMI_OEM_SUN_LED_MODE_SLOW 3
|
||||
#define IPMI_OEM_SUN_LED_MODE_FAST 4
|
||||
|
||||
#define IPMI_OEM_SUN_LED_FORCE_GO_THRU_CONTROLLER 0
|
||||
#define IPMI_OEM_SUN_LED_FORCE_DIRECTLY_ACCESS_DEVICE 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_SUN_MICROSYSTEMS_SPEC_H */
|
@ -0,0 +1,77 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro X8DTG
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_SUPERMICRO_GENERIC_EXTENSION */
|
||||
#define IPMI_OEM_SUPERMICRO_SUB_COMMAND_BMC_SERVICES 0xF0
|
||||
|
||||
/* w/ IPMI_OEM_SUPERMICRO_SUB_COMMAND_BMC_SERVICES */
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_ACTION_DISABLE 0x00
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_ACTION_ENABLE 0x01
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_ACTION_STATUS 0x02
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_STATUS_DISABLED 0x00
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_STATUS_ENABLED 0x01
|
||||
|
||||
/*
|
||||
* Supermicro X8DTU, X8STi, X9DRW
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_CHANNEL 0x07
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_PS1 0x70
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_PS2 0x72
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_PS3 0x74
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_MAGIC 0x0C
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_GOOD 0x01
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_BAD 0x00
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_CHANNEL 0x07
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_PS1 0x78
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_PS2 0x7A
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_PS3 0x7C
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_MAGIC 0x78
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_GOOD 0x01
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_BAD 0x00
|
||||
|
||||
/*
|
||||
* Supermicro X10DRU-i+
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_CHANNEL 0x07
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_PS1 0xB0
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_PS2 0xB2
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_MAGIC 0x79
|
||||
/* achu: Both of these mean good ... yeah, makes no sense :P */
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_GOOD1 0x00
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_GOOD2 0x02
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,437 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* achu: all named from doc except 'lan' configuration id, which I assumed names */
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_GET_EXTENDED_CONFIGURATION / IPMI_OEM_WISTRON_SET_EXTENDED_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_NIC 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_SOL 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_SECURITY 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_ACCOUNT_STATUS 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_DNS 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_WEB_SERVER_CONFIGURATION 0x0C
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_FIRMWARE_LOG 0x0E
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_FIRMWARE_INFORMATION 0x0F
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_FIRMWARE_UPDATE 0x10
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_POWER_MANAGEMENT 0x11
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_IPV6_SETTING 0xC0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_IPV6_TRAP_SETTING 0xC1
|
||||
|
||||
/* nic selection - 1 byte, 0 = shared, 1 = dedicated
|
||||
*
|
||||
* shared nic selection - 1 byte, 0 = reerved, 1 = nic1, ..., 4 = nic4
|
||||
* - for when nic selection is shared
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SELECTION 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION 0x02
|
||||
|
||||
/* sol idle timeout - 2 bytes, ls byte first, 0h = no timeout, default = 01h
|
||||
*
|
||||
* telnet redirect function selection - 1 byte, 0 = disable, 1 = sol enabled , 2 = smash enabled
|
||||
*
|
||||
* ssh redirect function selection - 1 byte, 0 = disable, 1 = sol enabled , 2 = smash enabled
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SOL_IDLE_TIMEOUT 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION 0x03
|
||||
|
||||
/* service disabled - 1 byte, bitmask
|
||||
* - 0x01 = all service except IPMI are disabled
|
||||
* (takes precedence over other bits)
|
||||
* - 0x02 = KVM/Virtual Storage
|
||||
* - 0x04 = HTTP/HTTPS
|
||||
* - 0x08 = SSH
|
||||
* - 0x10 = SNMP v2c agent
|
||||
* - 0x20 = telnet
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED 0x01
|
||||
|
||||
/* number of user - 1 byte, read only
|
||||
*
|
||||
* number of enabled user - 1 byte, read only
|
||||
*
|
||||
* user name - 1-17 bytes, read only
|
||||
* - Wistron 5441/Xanadu II - reports stored as p-string, does not return p-string
|
||||
* - Wistron 5442/Xanadu III - returns as p-string
|
||||
*
|
||||
* account status - 1 byte
|
||||
* - 0x00 - status unspecified
|
||||
* - 0x01 - enabled via set user password
|
||||
* - 0x02 - disabled via set user password
|
||||
* - 0x03 - user id is lockout
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_USER 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_ENABLED_USER 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_USER_NAME 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS 0x04
|
||||
|
||||
/* DNS DHCP enable - 1 byte, 0 - false, 1 - true
|
||||
* - DNS server IP addresses should be assigned from DHCP server
|
||||
*
|
||||
* DNS Server1 - 4 bytes
|
||||
* - IP address for DNS server 1, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Server2 - 4 bytes
|
||||
* - IP address for DNS server 2, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Register BMC - 0 - false, 1 - true
|
||||
* - Enable registering the BMC host name on the DNS server
|
||||
*
|
||||
* DNS BMC Host Name - 1-64 bytes
|
||||
* - Specifies the DNS BMC host name, read only if DNS Register BMC is TRUE.
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Domain Name DHCP Enable - 1 byte
|
||||
* - DNS domain name should be assigned from DHCP
|
||||
*
|
||||
* DNS Domain Name - 1-256 bytes
|
||||
* - DNS domain name string, read only if DNS Domain Name DHCP Enable is TRUE
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Registration Delay - 1 byte (range 1-255)
|
||||
* - Delay BMC should take after the IPMI process is up and running.
|
||||
- Default 5 seconds.
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DHCP_ENABLE 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER1 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER2 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTER_BMC 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME_DHCP_ENABLE 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTRATION_DELAY 0x08
|
||||
|
||||
/* web server enabled - 1 byte, 0 = false, 1 = true (default)
|
||||
*
|
||||
* max web sessions - 1 byte, read only
|
||||
*
|
||||
* active web sessions - 1 byte, read only
|
||||
*
|
||||
* web server timeout - 4 bytes, in seconds, 0 = disable, range 60-1920, default 300
|
||||
*
|
||||
* http port num - 2 bytes, default 80
|
||||
*
|
||||
* https port num - 2 bytes, default 443
|
||||
*
|
||||
* kvm port num - 2 bytes, default 7578
|
||||
*
|
||||
* telnet port num - 2 bytes, default 23
|
||||
*
|
||||
* ssh port num - 2 bytes, default 22
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_MAX_WEB_SESSIONS 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_ACTIVE_WEB_SESSIONS 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_TIMEOUT 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTP_PORT_NUM 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTPS_PORT_NUM 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_KVM_PORT_NUM 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_TELNET_PORT_NUM 0x08
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_SSH_PORT_NUM 0x09
|
||||
|
||||
/* entity - 1 byte (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* update date / time - 3 bytes, from 0:00 1/1/08, lsbyte first
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_ENTITY 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_FIRMWARE_VERSION 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BRANCH 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BUILD_INFORMATION 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_UPDATE_DATE_TIME 0x05
|
||||
|
||||
/* name - 1-16 bytes (read only)
|
||||
*
|
||||
* description - 1-256 bytes (read only)
|
||||
*
|
||||
* entity - 1 byte (read only)
|
||||
*
|
||||
* product info - 1-64 bytes (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* user default setting - 1 byte (write only)
|
||||
*
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING 0x08
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME_LEN 16
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION_LEN 256
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO_LEN 64
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION_LEN 16
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH_LEN 16
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION_LEN 16
|
||||
|
||||
/* remote update enable - 1 byte, ??
|
||||
*
|
||||
* protocol - 1 byte, bitmask, 7:3 reserved, 2 : http, 1: ftp, 0: tftp (read only)
|
||||
*
|
||||
* uri - 1-256 bytes
|
||||
* note - first char should be a file or unit separator
|
||||
*
|
||||
* connection retry - 1 byte, 0 = no retries
|
||||
*
|
||||
* retry interval - 1 byte, in 5 second increments, defalut 01h
|
||||
*
|
||||
* delay time - 1 byte, in seconds, 0h = immediate, ffh = random between 5 and 10
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_CONNECTION_RETRY 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME 0x06
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL_INCREMENTS 5
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI_LEN 256
|
||||
|
||||
/* power staggery ac recovery - 1 byte, 0x00 = immediate power on
|
||||
* (default), 0x01 = auto, random between min and max below, 0x02 =
|
||||
* user defined, must be between min and max below
|
||||
*
|
||||
* power on delay - 2 bytes
|
||||
*
|
||||
* minimum power on delay - 2 bytes (read only)
|
||||
*
|
||||
* maximum power on delay - 2 bytes
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_ON_DELAY 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MINIMUM_POWER_ON_DELAY 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MAXIMUM_POWER_ON_DELAY 0x05
|
||||
|
||||
/* ipv6 enable - 1 byte, 0 = false, 1 = true
|
||||
*
|
||||
* ipv6 address - 1-40 bytes (read only if autoconfig is true)
|
||||
*
|
||||
* ipv6 gateway ip - 1-40 bytes
|
||||
*
|
||||
* ipv6 prefix length - 1 byte
|
||||
*
|
||||
* ipv6 autoconfig - 1 byte, 0 = false, 1 = true
|
||||
*
|
||||
* ipv6 link local address - 1-40 bytes (read only)
|
||||
*
|
||||
* ipv6 auto dns - 1 byte, 0 = false, 1 = true (can't set to 1 if autoconfig is false)
|
||||
*
|
||||
* ipv6 dns server 1 - 1-40 bytes (can't set if auto dns is true)
|
||||
*
|
||||
* ipv6 dns server 2 - 1-40 bytes (can't set if auto dns is true)
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ADDRESS 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_GATEWAY_IP_ADDRESS 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_PREFIX_LENGTH 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_LINK_LOCAL_ADDRESS 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER1 0x08
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER2 0x09
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ADDRESS_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_GATEWAY_IP_ADDRESS_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_LINK_LOCAL_ADDRESS_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER1_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER2_LEN 40
|
||||
|
||||
/* ipv6 snmp trap destination setting - 3 bytes
|
||||
* byte 1 - destination type
|
||||
* byte 2 - alert ack timeout
|
||||
* byte 3 - retries
|
||||
*
|
||||
* ipv6 snmp trap destination address - 1-40 bytes
|
||||
*
|
||||
* number of ipv6 snmp trap desitnations - 1 byte (read only)
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_ADDRESS 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NUMBER_OF_IPV6_SNMP_TRAP_DESTINATION 0x03
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_ADDRESS_LEN 40
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_READ_ALL_BYTES 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SELECTION */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_NIC_MODE_SHARED 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_NIC_MODE_DEDICATED 0x01
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION */
|
||||
/* 0h - recommended when nic selection is dedicated */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_RESERVED 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_1 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_2 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_3 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_4 0x04
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION_SOL_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION_SMASH_ENABLED 0x02
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION_SOL_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION_SMASH_ENABLED 0x02
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_ENABLE_ALL 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_ALL 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_KVM_VIRTUAL_STORAGE 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_HTTP_HTTPS 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SSH 0x08
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SNMP_V2C_AGENT 0x10
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_TELNET 0x20
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_UNSPECIFIED 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_DISABLED 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_LOCKOUT 0x03
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_DNS_DNS_BMC_HOST_NAME_MAX 64
|
||||
|
||||
/* IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_DNS_DNS_DOMAIN_NAME_MAX 256
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_BMC 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_SYSTEM_BIOS 1
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_PDB 2
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_FCB 3
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING_SET_DEFAULT 0x0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING_RESTORE_DEFAULT 0x1
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_TFTP 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_FTP 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_HTTP 0x04
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_DELAY_TIME_RANDOM 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_IMMEDIATE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_AUTO 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_USER_DEFINED 0x02
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE_FALSE 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE_TRUE 1
|
||||
|
||||
/* w/ #define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG_ENABLE_FALSE 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG_ENABLE_TRUE 1
|
||||
|
||||
/* w/ #define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS_ENABLE_FALSE 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS_ENABLE_TRUE 1
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING_DESTINATION_TYPE_PET IPMI_DESTINATION_TYPE_PET_TRAP_DESTINATION
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING_DESTINATION_TYPE_OEM1 IPMI_DESTINATION_TYPE_OEM1
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING_DESTINATION_TYPE_OEM2 IPMI_DESTINATION_TYPE_OEM2
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_RESET_TO_DEFAULTS */
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_FLAG_RESTORE_PARAMETERS_NOT_INCLUDED_BELOW 0x7
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_FLAG_REMAINING_PARAMETERS_STAY_WHAT_IT_IS 0x0
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_FLAG_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_PEF_BITMASK 0x10
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_SERIAL_CONFIGURATION_BITMASK 0x08
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_SOL_CONFIGURATION_BITMASK 0x04
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_LAN_CONFIGURATION_BITMASK 0x02
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_USER_ACCOUNTS_BITMASK 0x01
|
||||
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_ALL_SC_SETTINGS 0xFF
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_GET_RESTORE_STATUS */
|
||||
#define IPMI_OEM_WISTRON_GET_RESTORE_STATUS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_WISTRON_GET_RESTORE_STATUS_RESTORE_COMPLETE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_SET_CHASSIS_SERVICE_TAG and IPMI_CMD_OEM_WISTRON_GET_CHASSIS_SERVICE_TAG */
|
||||
#define IPMI_OEM_WISTRON_SC_BMC_COMMUNICATION_PROTOCOL_VERSION 0x01
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_IDENTIFICATION_LED_CONTROLLED_BY_SC_BITMASK 0x01
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_IDENTIFICATION_LED_CONTROLLED_BY_SC_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_FAULT_LED_CONTROLLED_BY_SC_BITMASK 0x02
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_FAULT_LED_CONTROLLED_BY_SC_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_LED_OFF 0x00
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_LED_SOLID_ON 0x01
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_LED_BLINK_ON 0x02
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_GET_CHASSIS_POWER_READINGS */
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_TOTAL_POWER_CONSUMPTION_AVAILABLE_BITMASK 0x01
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_TOTAL_POWER_CONSUMPTION_AVAILABLE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_COOLING_POWER_CONSUMPTION_AVAILABLE_BITMASK 0x02
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_COOLING_POWER_CONSUMPTION_AVAILABLE_SHIFT 1
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_SET_PASSWORD_POLICY
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_PASSWORD_POLICY_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_PASSWORD_POLICY_ENABLE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_WRITE_PROPRIETARY_STRING
|
||||
* and IPMI_CMD_OEM_WISTRON_READ_PROPRIETARY_STRING
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_PROPRIETARY_STRING_MAX 80
|
||||
#define IPMI_OEM_WISTRON_PROPRIETARY_STRING_BLOCK 16
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,486 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_DELL_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/************************************************
|
||||
* Generic Event Reading Type Code Offsets *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_ABSENT 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_STANDBY 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_IPMI_FUNCTION_READY 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_FULLY_READY 0x03
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_OFFLINE 0x04
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_FAILED 0x05
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_ACTIVE 0x06
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_BOOTING 0x07
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_WRITE_PROTECTED 0x08
|
||||
|
||||
/* 0x00 through 0x02 unknown */
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_FAILURE_MEMORY_FAILED_TO_TRANSITION_TO_ONLINE 0x03
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_oem_dell_status[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_oem_dell_status_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_oem_dell_failure[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_oem_dell_failure_max_index;
|
||||
|
||||
/************************************************
|
||||
* Sensor Type Code Offsets OEM Specific *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_GOOD 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_OTHER 0x01
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_THERMAL_PROTECTION 0x02
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_COOLING_CAPACITY_CHANGE 0x03
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_POWER_CAPACITY_CHANGE 0x04
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_USER_DEFINED_POWER_CAPACITY 0x05
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_HALTED_SYSTEM_POWER_EXCEEDS_CAPACITY 0x06
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_SYSTEM_POWER_EXCEEDS_CAPACITY 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_GOOD 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_FAILED_TO_PROGRAM_VIRTUAL_MAC_ADDRESS 0x01
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_DEVICE_OPTION_ROM_FAILED_TO_SUPPORT_LINK_TUNING_OR_FLEX_ADDRESS 0x02
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_FAILED_TO_GET_LINK_TUNING_OR_FLEX_ADDRESS_DATA 0x03
|
||||
|
||||
/* 0x01 not yet published/known */
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_NON_FATAL_ERROR_PCIE_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_NON_FATAL_ERROR_QPI_LINK_DEGRADE 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_FATAL_IO_ERROR_SUCCESSFUL 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_FATAL_IO_ERROR_FATAL_IO_ERROR 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_UPGRADE_SUCCESSFUL 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_UPGRADE_FAILED 0x01
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_system_performance_degradation_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_system_performance_degradation_status_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_link_tuning[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_link_tuning_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_non_fatal_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_non_fatal_error_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_fatal_io_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_fatal_io_error_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_upgrade[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_upgrade_max_index;
|
||||
|
||||
/************************************************
|
||||
* Sensor Type Code Offsets OEM Extra *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_DELL_POST_FATAL_ERROR 0x0F
|
||||
|
||||
/* Other Event Macros */
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_INTRUSION_WHILE_SYSTEM_ON 0x01
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_INTRUSION_WHILE_SYSTEM_OFF 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_PSU_COMMUNICATION_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_TEMPERATURE_WARNING 0x02
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_TEMPERATURE_FAULT 0x03
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_UNDER_VOLTAGE_FAULT 0x04
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_VOLTAGE_FAULT 0x05
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_CURRENT_FAULT 0x06
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_FAN_FAULT 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OFFSET_CONFIGURATION_ERROR_WATTS_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_WATTS_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_WATTS_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_SPARE_MODE_BITMASK 0x1
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_RAID_MODE_BITMASK 0x2
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MIRROR_MODE_BITMASK 0x4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_COUNTER_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_COUNTER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MIN 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MAX 0x07
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_VALID(__memory_card) \
|
||||
(((__memory_card + 1) >= (IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MIN + 1) \
|
||||
&& (__memory_card) <= IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MIN 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MAX 0x07
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_VALID(__bank_number) \
|
||||
(((__bank_number + 1) >= (IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MIN + 1) \
|
||||
&& (__bank_number) <= IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MIN 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MAX 0x7F
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_VALID(__bank_number) \
|
||||
(((__bank_number + 1) >= (IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MIN + 1) \
|
||||
&& (__bank_number) <= IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_4_DIMMS_PER_NODE 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_6_DIMMS_PER_NODE 0x09
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_8_DIMMS_PER_NODE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_9_DIMMS_PER_NODE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_12_DIMMS_PER_NODE 0x0C
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_24_DIMMS_PER_NODE 0x0D
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_USE_DATA1_UPPER_NIBBLE 0x0E
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_NO_CARD 0x0F
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA1_OEM_DELL_DIMMS_PER_PACKAGE_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA1_OEM_DELL_DIMMS_PER_PACKAGE_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA1_OEM_DELL_DIMMS_PER_PACKAGE_3 0x00
|
||||
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OEM_DELL_MANAGEMENT_CONTROLLER_FIRMWARE_REVISION 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA3_OEM_DELL_OTHER 0x00
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA3_OEM_DELL_CPU 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_BITMASK 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_SHIFT 6
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_SINGLE_HEIGHT 0
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_DOUBLE_HEIGHT 1
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_DOUBLE_HEIGHT_DOUBLE_WEIGHT 2
|
||||
|
||||
/* device number, function number, bus/slot number apply to multiple
|
||||
* sensor types
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_DEVICE_NUMBER_BITMASK 0xF8
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_DEVICE_NUMBER_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_FUNCTION_NUMBER_BITMASK 0x07
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_FUNCTION_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_FLAG_BITMASK 0x80
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_FLAG_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_BITMASK 0x7F
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_SHIFT 0
|
||||
|
||||
/* option rom macros apply to multiple sensor types */
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_BITMASK 0x80
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_EMBEDDED 0
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SLOT 1
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SLOT_BITMASK 0x7F
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SLOT_SHIFT 0
|
||||
|
||||
/* BIOS Progress and Fatal Error Codes */
|
||||
/*
|
||||
* 00h and FFh are reserved
|
||||
* Progress codes range from 01h to 7Fh
|
||||
* Fatal error codes range from 80h to FEh
|
||||
* Progress codes less than 3Fh are pre-video activity
|
||||
* Progress codes greather than 40h are post-video activity
|
||||
* Fatal error codes less than BFh indicate pre-video failure
|
||||
* Fatal error codes greater than C0h indicate post-video failure.
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_SYSTEM_POWER_ON 0x01
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_CPU_MICROCODE_LOAD 0x02
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_CHIPSET_INITIALIZATION 0x03
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_MEMORY_CONFIGURATION 0x04
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_SHADOW_BIOS 0x05
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_MULTIPROCESSOR_INITIALIZATION 0x06
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_POST_PROCESSING_START 0x07
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_SMM_MODE_INITIALIZATION 0x08
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_PCI_BUS_ENUMERATION_VIDEO_INITIALIZATION 0x09
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_DISPLAY_SIGN_ON 0x40
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_PCI_CONFIGURATION 0x41
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_GIVE_CONTROL_TO_OS 0x7F
|
||||
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_NO_MEMORY_DETECTED 0x80
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_MEMORY_DETECTED_BUT_IS_NOT_CONFIGURABLE 0x81
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_MEMORY_CONFIGURED_BUT_NOT_USABLE 0x82
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SYSTEM_BIOS_SHADOW_FAILURE 0x83
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_CMOS_FAILURE 0x84
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_DMA_CONTROLLER_FAILURE 0x85
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_INTERRUPT_CONTROLLER_FAILURE 0x86
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_TIMER_REFRESH_FAILURE 0x87
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_PROGRAMMABLE_INTERVAL_TIMER_ERROR 0x88
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_PARITY_ERROR 0x89
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SIO_FAILURE 0x8A
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_KEYBOARD_CONTROLLER_FAILURE 0x8B
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SMI_INITIALIZATION_FAILURE 0x8C
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SHUTDOWN_TEST_FAILURE 0xC0
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_POST_MEMORY_TEST_FAILURE 0xC1
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_RAC_CONFIGURATION_FAILURE 0xC2
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_CPU_CONFIGURATION_FAILURE 0xC3
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_INCORRECT_MEMORY_CONFIGURATION 0xC4
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_GENERAL_FAILURE_AFTER_VIDEO 0xFE
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_ID_BITMASK 0x03
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_ID_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_LINK_ID_BITMASK 0x0C
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_LINK_ID_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_AGENT_ID_BITMASK 0x30
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_AGENT_ID_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_LINK_ID_BITMASK 0xC0
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_LINK_ID_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_REPORTING_AGENT_TYPE_BITMASK 0x01
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_REPORTING_AGENT_TYPE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_PARTNER_AGENT_TYPE_BITMASK 0x02
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_PARTNER_AGENT_TYPE_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_ERROR_TYPE_BITMASK 0xFC
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_ERROR_TYPE_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_AGENT_TYPE_CPU 0
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_AGENT_TYPE_IOH 1
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_ERROR_TYPE_LINK_WIDTH_DEGRADED 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_BIOS_TXT_ERROR 0x00
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_PROCESSOR_FIT_TXT_ERROR 0x02
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_BIOS_ACM_TXT_ERROR 0x03
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_SINIT_ACM_TXT_ERROR 0x04
|
||||
/* achu: TT instead of TXT in spec, assume typo */
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_UNRECOGNIZED_TXT_ERROR 0xFF
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_VT_CONFIGURATION_INVALID 0x01
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_TPM_CONFIGURATION_INVALID 0x02
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_FIT_CRTM_ERROR 0x03
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_BIOS_ACM_ERROR 0x04
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_SINIT_ACM_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_TPM_PROVISIONING_ERROR 0x06
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_LEGACY_SHUTDOWN 0x0A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_BAD_ACM_TYPE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_UNSUPPORTED_ACM 0x0C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_AUTHENTICATE_FAIL 0x0D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_BAD_ACM_FORMAT 0x0E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_UNEXPECTED_HITM 0x0F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_ILLEGAL_EVENT 0x10
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_BAD_JOIN_FORMAT 0x11
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_UNRECOVERABLE_MC_ERROR 0x12
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_VMX_ABORT 0x13
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_ACM_CORRUPT 0x14
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_ILLEGAL_VID_RATIO 0x15
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BIOS_ACM_ENTRY_POINT 0x1E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_HEAP_UNINITIALIZED 0x1F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_DPR_UNINITIALIZED 0x20
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_HEAP_ABOVE_TOP_OF_LOWER_MEMORY 0x21
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_PCIEXBAR_SET_TO_INVALID_VALUE 0x22
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_HEAP_IS_ABOVE_4GB 0x23
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_HEAP_IS_NOT_IN_DPR_REGION 0x24
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TXT_DISABLED_BY_MEANS_OF_TXT_POLICY_BIT 0x25
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_EITHER_STARTUP_ACM_WAS_CALLED_FROM_BIOS_OR_CPU_OFFSET_IN_PCIEXBAR_IS_TOO_LARGE 0x26
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_NON_SUPPORTED_DEVICE_ID 0x27
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MEMORY_IS_NOT_LOCKED 0x28
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_SENTER_USED_TO_LAUNCH_AC_MODULE 0x29
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_START_MTRR_CHECK 0x2A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_1_ERROR 0x2B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_2_ERROR 0x2C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_3_ERROR 0x2D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_4_ERROR 0x2E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_5_ERROR 0x2F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_6_ERROR 0x30
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_PCIEXBAR_SET_TO_INVALID_SIZE 0x31
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_EXTEND_ATTEMPT 0x32
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_ACCESS_REGISTER_CONTENTS_INVALID 0x33
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_UNABLE_TO_GET_ACCESS_TO_THE_LOCALITY 0x34
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_OUTPUT_BUFFER_FOR_THE_TPM_RESPONSE_TOO_SHORT 0x35
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_INPUT_PARAMETER_FOR_THE_FUNCTION_INVALID 0x36
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_INVALID_RESPONSE_FOR_THE_TPM 0x37
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TIME_OUT_FOR_TPM_RESPONSE 0x38
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_RETURNED_AN_ERROR 0x39
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_NV_RAM_NOT_LOCKED 0x3A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_IS_DISABLED 0x3B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_IS_DEACTIVATED 0x3C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_NV_INDICES_INCORRECTLY_DEFINED 0x3D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LCP_NO_PO_POLICY_DATA_DEFINED 0x3E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_MLE_MISMATC 0x3F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_PLATFORM_CONFIG_MISMATC 0x40
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_SINIT_REVOKED 0x41
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_NPW_NOT_ALLOWED 0x42
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_PO_POLICY_INTEGRITY_FAILED 0x43
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_PS_POLICY_INTEGRITY_FAILED 0x44
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_INTERRUPT_OCCURED 0x45
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_CPU_NOT_SUPPORTED_BY_THIS_ACM 0x46
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_ONE_OF_THE_FIT_TABLE_CHECKS_FAILED 0x47
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_VERIFY_BIOS_FAILED 0x48
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BIOS_POLICY_FAILURE 0x49
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MEMORY_LOCKED_WHEN_CLEARSECRETS_IS_CALLED 0x4A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BIOS_UNTRUSTED_WHEN_CLEARSECRETS_IS_CALLED 0x4B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MEMORY_LOCKED_WHEN_CLEARSECRETS_IS_CALLED2 0x4C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FIT_POLICY_TPM_OR_TXT_POLICY_DATA_BAD 0x4D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FIT_TABLE_END_NOT_BELOW_4GB 0x4E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_DIDNT_FIND_BIOS_STARTUP_RECORD_THAT_INCLUDES_RESET_VECTOR 0x4F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_DIDNT_FIND_BIOS_STARTUP_RECORD_THAT_INCLUDES_FIT_POINTER 0x50
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FOUND_OVERLAP_BETWEEN_BIOS_STARTUP_REGIONS 0x51
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FOUND_OVERLAP_BETWEEN_A_BIOS_STARTUP_REGION_AND_THE_STARTUP_ACM 0x52
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_SCHECK_CALL 0x53
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_CLEAR_SECRETS_CALL 0x54
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_UNLOCK_CONFIG_CALL 0x55
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_RESET_AUX_CALL 0x56
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_MASK_ERROR_EX_ONLY 0x57
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_MAP_ERROR_EX_ONLY 0x58
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TIMEOUT_WHILE_ACQUIRING_SHARED_RESOURCE_EX_ONLY 0x59
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BAD_RESOURCE_NUMBER_SPECIFIED_WHEN_ACQUIRING_SHARED 0x5A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_CPU_REV_IS_NOT_SUPPORTED_BY_THIS_ACM 0x5B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_SINIT_EXIT_ADDRESS 0x64
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LOCK_CONFIG_CALL_TO_BIOS_ACM_NOT_DONE_BY_ALL_SOCKETS 0x65
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MLE_JOIN_ABOVE_4GB 0x66
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_UNINITIALIZED 0x67
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_UNINITIALIZED 0x68
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_REGION_DEFINED_ABOVE_4GB 0x69
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TXT_MEMORY_REGION_DISABLED 0x6A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_NON_SUPPORTED_DEVICE_ID 0x6B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MEMORY_IS_NOT_LOCKED 0x6C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SENTER_USED_TO_LAUNCH_THE_AC_MODULE 0x6D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_START_MTRR_CHECK 0x6E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_1_ERROR 0x6F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_2_ERROR 0x70
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_3_ERROR 0x71
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_4_ERROR 0x72
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_5_ERROR 0x73
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_6_ERROR 0x74
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_MTRR_MASK_VALUE 0x75
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_MTRR_MAPPING 0x76
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_SIZE_ERROR 0x77
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_BASE_ERROR 0x78
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_SIZE_ERROR 0x79
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_BASE_ERROR 0x7A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_SIZE_ERROR 0x7B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_BAR_OVERLAP 0x7C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_NOT_LOCKED 0x7D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_BAR_SIZE_ERROR 0x7E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_PMR_NOT_PROGRAMMED 0x7F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_LOC_ERROR 0x80
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MCHBAR_LOCATED_ABOVE_4GB 0x81
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_MEMORY_SPACE_LOCATED_ABOVE_4GB 0x82
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_VERSION_ERROR 0x83
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_LOW_ERROR 0x84
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_LOW_BASE_ERROR 0x85
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_LOW_SIZE_ERROR 0x86
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_HIGH_ERROR 0x87
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_OVERLAP 0x88
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_ABOVE_PHYSICAL_MEMORY 0x89
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_SIZE_ERROR 0x8A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_REQ_CAPABILITIES_ERROR 0x8B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_POLICY_NOT_IN_DMA_PROTECTED_REGION 0x8C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RSDP_NOT_FOUND 0x8D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RSDP_CHECKSUM_ERROR 0x8E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RSDT_CHECKSUM_ERROR 0x8F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMAR_NOT_FOUND 0x90
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMAR_CHECKSUM_ERROR 0x91
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DRHD_BAR_NOT_FOUND 0x92
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMAR_LENGTH_ERROR 0x93
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DRHD_DEV_SCOPE_ERROR 0x94
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RMRR_NOT_FOUND 0x95
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_DMAR_OVERLAP 0x96
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MSEG_SIZE_ERROR 0x97
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MSEG_BASE_ERROR 0x98
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MSEG_DIFF_BASE_ERROR 0x99
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_EXTEND_ATTEMPT 0x9A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_ACCESS_REGISTER_CONTENTS_INVALID 0x9B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_UNABLE_TO_GET_ACCESS_TO_THE_LOCALITY 0x9C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OUTPUT_BUFFER_FOR_THE_TPM_RESPONSE_TOO_SHORT 0x9D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INPUT_PARAMETER_FOR_THE_FUNCTION_INVALID 0x9E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_RESPONSE_FOR_THE_TPM 0x9F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TIME_OUT_FOR_TPM_RESPONSE 0xA0
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_RETURNED_AN_ERROR 0xA1
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_NV_RAM_NOT_LOCKED 0xA2
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_IS_DISABLED 0xA3
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_IS_DEACTIVATED 0xA4
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_NV_INDICES_INCORRECTLY_DEFINED 0xA5
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_PCR17_NOT_VALID 0xA6
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_VALUE_IN_PCR17_DOES_NOT_MATCH_EXPECTED_RESULT 0xA7
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_VALUE_IN_PCR18_DOES_NOT_MATCH_EXPECTED_RESULT 0xA8
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_STARTUP_HAS_ALREADY_BEEN_RUN 0xA9
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TOLM_ERROR 0xAA
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_ALIAS_ERROR 0xAB
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TOHM_ERROR 0xAC
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_SAD_RULES_ERROR 0xAD
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TSEG_ERROR 0xAE
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_PCIEX_BAR_ERROR 0xAF
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_MAD_OVERLAP 0xB0
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_UNCORE_IIO_SAD_ERROR 0xB1
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TAD_RULES_ERROR 0xB2
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_SAG_ERROR 0xB3
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_RIR_ERROR 0xB4
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_SMRR_ERROR 0xB5
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_CHANNEL_MAPPER_ERROR 0xB6
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMA_REMAP_ERROR 0xB7
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_ME_VT_POLICY_ERROR 0xB8
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_NO_PO_POLICY_DATA_DEFINE 0xB9
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_MLE_MISMATCH 0xBA
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_PLATFORM_CONFIG_MISMATCH 0xBB
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_SINIT_REVOKED 0xBC
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_NPW_NOT_ALLOWED 0xBD
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_PO_POLICY_INTEGRITY_FAILED 0xBE
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_PS_POLICY_INTEGRITY_FAILED 0xBF
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INTERRUPT_ERROR 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_VTD_TABLE_LARGER_THAN_HEAP_SIZE 0xC1
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_CPU_NOT_SUPPORTED_BY_THIS_ACM 0xC2
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_DELL_SPEC_H */
|
@ -0,0 +1,86 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Fujitsu Siemens Computers
|
||||
* Fujitsu Technology Solutions
|
||||
* iRMC S1 / iRMC S2
|
||||
*/
|
||||
|
||||
/* 0xC0 / IPMI_SENSOR_TYPE_OEM_FUJITSU_I2C_BUS*/
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_i2c_bus[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_i2c_bus_max_index;
|
||||
|
||||
/* 0xDD / IPMI_SENSOR_TYPE_OEM_FUJITSU_SYSTEM_POWER_CONSUMPTION */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_system_power_consumption[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_system_power_consumption_max_index;
|
||||
|
||||
/* 0xDE / IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY_STATUS */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_memory_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_memory_status_max_index;
|
||||
|
||||
/* 0xDF / IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY_CONFIG */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_memory_config[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_memory_config_max_index;
|
||||
|
||||
/* 0xE1 / IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_memory[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_memory_max_index;
|
||||
|
||||
/* 0xE3 / IPMI_SENSOR_TYPE_OEM_FUJITSU_HW_ERROR */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_hw_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_hw_error_max_index;
|
||||
|
||||
/* 0xE4 / IPMI_SENSOR_TYPE_OEM_FUJITSU_SYS_ERROR */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_sys_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_sys_error_max_index;
|
||||
|
||||
/* 0xE6 / IPMI_SENSOR_TYPE_OEM_FUJITSU_FAN_STATUS */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_fan_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_fan_status_max_index;
|
||||
|
||||
/* 0xE8 / IPMI_SENSOR_TYPE_OEM_FUJITSU_PSU_STATUS */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_psu_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_psu_status_max_index;
|
||||
|
||||
/* 0xE9 / IPMI_SENSOR_TYPE_OEM_FUJITSU_PSU_REDUNDANCY */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_psu_redundancy[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_psu_redundancy_max_index;
|
||||
|
||||
/* 0xEC / IPMI_SENSOR_TYPE_OEM_FUJITSU_FLASH */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_flash[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_flash_max_index;
|
||||
|
||||
/* 0xEF / IPMI_SENSOR_TYPE_OEM_FUJITSU_CONFIG_BACKUP */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_config_backup[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_config_backup_max_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_HP_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_HP_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* HP Proliant DL160 G8
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_HP_UID_LIGHT_ON 0x00
|
||||
#define IPMI_OEM_HP_UID_LIGHT_OFF 0x01
|
||||
#define IPMI_OEM_HP_UID_LIGHT_BLINKING 0x02
|
||||
|
||||
#define IPMI_OEM_HP_HEALTH_LED_GREEN 0x00
|
||||
#define IPMI_OEM_HP_HEALTH_LED_AMBER 0x01
|
||||
#define IPMI_OEM_HP_HEALTH_LED_RED 0x02
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_oem_hp_uid_light[];
|
||||
extern unsigned int ipmi_oem_hp_uid_light_max_index;
|
||||
|
||||
extern const char * const ipmi_oem_hp_health_led[];
|
||||
extern unsigned int ipmi_oem_hp_health_led_max_index;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_HP_SPEC_H */
|
@ -0,0 +1,331 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_POLICY_CORRECTION_TIME_EXCEEDED 0x1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POLICY_INTERFACE_CAPABILITY_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POLICY_INTERFACE_CAPABILITY_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_MONITORING_CAPABILITY_BITMASK 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_MONITORING_CAPABILITY_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POWER_LIMITING_CAPABILITY_BITMASK 0x04
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POWER_LIMITING_CAPABILITY_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_NOT_AVAILABLE 0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_AVAILABLE 1
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_THRESHOLD_NUMBER_BITMASK 0x03
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_THRESHOLD_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_THRESHOLD_EXCEEDED 0x0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_POLICY_CORRECTION_TIME_EXCEEDED 0x1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_FIRMWARE_STATUS 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_FIRMWARE_STATUS IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_FIRMWARE_STATUS
|
||||
|
||||
/* Recovery GPIO forced. Recovery Image loaded due to MGPIO pin
|
||||
* asserted. Pin number is configurable in factory presets, Default
|
||||
* recovery pin is MGPIO1. Repair action: Deassert MGPIO1 and reset
|
||||
* the Intel ME
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_RECOVERY_GPIO_FORCED 0x00
|
||||
/* Image execution failed. Recovery Image or backup operational image
|
||||
* loaded because operational image is corrupted. This may be caused
|
||||
* by Flash device corruption or failed upgrade procedure. Repair
|
||||
* action: Either the flash device must be replaced (if error is
|
||||
* persistent) or the upgrade procedure must be started again.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_IMAGE_EXECUTION_FAILED 0x01
|
||||
/* Flash erase error. Error during Flash erasure procedure probably
|
||||
* due to flash part corruption. Repair action: The flash device
|
||||
* must be replaced.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_ERASE_ERROR 0x02
|
||||
/* Flash state information. Repair action: Check extended info byte
|
||||
* in Event Data 3 (byte 7) whether wearout protection is causing this
|
||||
* event. If so, wait until wearout protection expires; otherwise
|
||||
* probably the flash device must be replaced (if error is
|
||||
* persistent).
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_STATE_INFORMATION 0x03
|
||||
/* Internal error. Error during firmware execution - if Event Data 3
|
||||
* (byte 7) contains 0 then FW Watchdog Timeout; otherwise please
|
||||
* contact Intel representative for support. Repair action:
|
||||
* Operational image shall be updated to other version or hardware
|
||||
* board repair is needed (if error is persistent).
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_INTERNAL_ERROR 0x04
|
||||
/* BMC did not respond to cold reset request and Intel ME rebooted
|
||||
* the platform. Repair action: Verify the Intel NM configuration.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_BMC_COLD_RESET_ERROR 0x05
|
||||
/* Direct flash update requested by the BIOS. Intel ME firmware
|
||||
* will switch to recovery mode to perform full update from BIOS.
|
||||
* Repair action: This is transient state. Intel ME firmware should
|
||||
* return to operational mode after successful image update
|
||||
* performed b the BIOS.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_DIRECT_FLASH_UPDATE 0x06
|
||||
/* Manufacturing error. Wrong manufacturing configuration detected
|
||||
* by Intel ME firmware Repair action: The flash device must be
|
||||
* replaced (if error is persistent).
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_MANUFACTURING_ERROR 0x07
|
||||
/* Persistent storage integrity error. Flash file system error
|
||||
* detected. Repair action. If error is persistent, restore
|
||||
* factory presets using "Force ME Recovery" IPMI command or by
|
||||
* doing AC power cycle with Recovery jumper asserted.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_PERSISTENT_STORAGE_INTEGRITY_ERROR 0x08
|
||||
/* Firmware exception. Repair action: Restore factory presets using
|
||||
* "Force ME Recovery" IPMI command or by doing AC power cycle with
|
||||
* Recovery jumper asserted. If this does not clear the issue,
|
||||
* reflash the SPI flash. If the issue persists, provide the
|
||||
* content of Event Data 3 to Intel support team for interpretation.
|
||||
* (Event Data 3 codes are not documented because they only provide
|
||||
* clues that must be interpreted individually.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FIRMWARE_EXCEPTION 0x09
|
||||
/* Flash Wear-Out Protection Warning. Warning threshold for number
|
||||
* of flash operations has been exceeded. Repair action: No immediate
|
||||
* repair action needed. This i sjust a warning event.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_WEAR_OUT_PROTECTION_WARNING 0x0A
|
||||
/* PECI over DMI interface error. This is a notification that PECI
|
||||
* over DMI interface failure was detected and it is not functional
|
||||
* any more. It may indicatethe situation when PECI over DMI was not
|
||||
* configured by BIOS or a defect which may require a CPU Host reset
|
||||
* to recover from.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_PECI_OVER_DMI_INTERFACE_ERROR 0x0D
|
||||
/* MCTP interface error. This is a notification that MCTP interface
|
||||
* failure was detected and it is not functional any more. It may
|
||||
* indicate the situation when MCTP was not configured by BIOS or a
|
||||
* defect which may need a Host reset to recover from. Repair action:
|
||||
* Recovery via CPU Host reset or platform reset.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_MCTP_INTERFACE_ERROR 0x0E
|
||||
/* Auto-configuration finished. Operational image finished power
|
||||
* source auto-configuration. Repair action: Auto-configuration could
|
||||
* be enforced by restore to factory defaults
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_AUTO_CONFIGURATION_FINISHED 0x0F
|
||||
|
||||
/* Legacy macros, changed b/c of new names in Intel NM 2.0 specification */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FORCED_GPIO_RECOVER IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_RECOVERY_GPIO_FORCED
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_IMAGE_EXECUTION_FAILED IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_IMAGE_EXECUTION_FAILED
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_ERASE_ERROR IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_ERASE_ERROR
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_CORRUPTED IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_STATE_INFORMATION
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_INTERNAL_ERROR IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_INTERNAL_ERROR
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_IMAGE_CORRUPTED 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_FLASH_ERASE_LIMIT_REACHED 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_FLASH_WRITE_LIMIT_REACHED 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_WRITING_TO_FLASH_ENABLED 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_FW_WATCHDOG_TIMEOUT 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_LOADER_MANIFEST_VALIDATION_FAILURE 0x1D
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_UNKNOWN_POWER_MANAGEMENT_EVENT 0x37
|
||||
/* Spec says "None graceful", assuming typo */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_NON_GRACEFUL_PMC_RESET_EVENT 0x45
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_FLASH_WEAROUT_PROTECTION 0x8E
|
||||
|
||||
#if 0
|
||||
/* In Intel Node Manager 2.0 spec this was 0x04, but changed in 3.0 spec */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_INTEL_ME_FW_CONFIGURATION_BAD 0x04
|
||||
#endif
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_GENERIC_ERROR 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_OR_MISSING_VSCC_TABLE 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_SENSOR_SCANNING_PERIOD_IN_PIA 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_DEVICE_DEFINITION_IN_PIA 0x03
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_SMART_CLST_CONFIGURATION 0x04
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_INTEL_ME_FW_CONFIGURATION_IS_INCONSISTENT_OR_OUT_OF_RANGE 0x05
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_PERCENTAGE_OF_FLASH_WRITE_OPERATIONS_WHICH_HAVE_BEEN_CONDUCTED 0x0A
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_DRAM_INIT_DONE_EVENT_NOT_RECEIVED 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MCTP_SAD_REGISTER_NOT_CORRECTLY_CONFIGURED_BY_BIOS 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_DMI_TIMEOUT_OF_PECI_REQUEST 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_BITMASK 0x80
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS 0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_BITMASK 0x60
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_PSU 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_ON_BOARD_POWER_SENSOR 0x02
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_BITMASK 0x18
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_PSU 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_ON_BOARD_POWER_SENSOR_PSU_EFFICIENCY 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_NOT_SUPPORTED 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_BITMASK 0x06
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_PSU 0x01
|
||||
/* Not a typo, jumps to 0x03 */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_NOT_SUPPORTED 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_ESTIMATED 0x01
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_BITMASK 0x60
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_BMC_DISCOVERY_FAILURE 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_INSUFFICIENT_FACTORY_CONFIGURATION 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_UNKNOWN_SENSOR_TYPE 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_OTHER_ERROR_ENCOUNTERED 0x03
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_SENSOR_NODE_MANAGER 0x02
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_BITMASK 0xF0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_OUTLET_TEMPERATURE_READING_FAILURE 0x8
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_VOLUMETRIC_AIRFLOW_READING_FAILURE 0x9
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_POLICY_MISCONFIGURATION 0xA
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_POWER_SENSOR_READING_FAILURE 0xB
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_INLET_TEMPERATURE_READING_FAILURE 0xC
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_HOST_COMMUNICATION_ERROR 0xD
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_REAL_TIME_CLOCK_SYNCHRONIZATION_FAILURE 0xE
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_PLATFORM_SHUTDOWN_INITIATED_BY_INTEL_NM_POLICY 0xF
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_THERMAL_SENSOR_ON_DIMM
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_0_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_0_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_1_BITMASK 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_1_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_0_BITMASK 0x04
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_0_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_1_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_1_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_0_BITMASK 0x10
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_0_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_1_BITMASK 0x20
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_1_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_0_BITMASK 0x40
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_0_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_1_BITMASK 0x80
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_1_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_AVAILABLE 0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_NOT_AVAILABLE 1
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_CUPS_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_THRESHOLD_NUMBER_BITMASK 0x03
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_THRESHOLD_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_CUPS_POLICY_EVENT_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_CUPS_POLICY_EVENT_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_CUPS_EVENT_EVENT_THRESHOLD_EXCEEDED 0x0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_STATE
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR_EVENT_DATA2_OFFSET_FROM_SEVERITY_BITMASK 0xF0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR_EVENT_DATA2_OFFSET_FROM_SEVERITY_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR_EVENT_DATA3_EXTERNAL 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,144 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_INVENTEC_SBE_WARNING_THRESHOLD 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_INVENTEC_SBE_CRITICAL_THRESHOLD 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_INVENTEC_OTHER 0xFF
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH0_DIM1 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH0_DIM0 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH1_DIM1 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH1_DIM0 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH2_DIM1 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH2_DIM0 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU1_CH0_DIM0 0x11
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU1_CH1_DIM0 0x12
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU1_CH2_DIM0 0x13
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH0_DIM1 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH0_DIM0 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH1_DIM1 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH1_DIM0 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH2_DIM1 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH2_DIM0 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH0_DIM1 0x11
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH0_DIM0 0x12
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH1_DIM1 0x13
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH1_DIM0 0x14
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH2_DIM1 0x15
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH2_DIM0 0x16
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA3_OEM_INVENTEC_PORT80_CODE_EXTENDED_MEMORY_TEST 0x3A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA3_OEM_INVENTEC_PORT80_CODE_SETUP_MENU 0x87
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA3_OEM_INVENTEC_PORT80_CODE_OPTION_ROM_SCAN 0x78
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_TIMER_COUNT_READ_WRITE_ERROR 0x0000
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_MASTER_PIC_ERROR 0x0001
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_SLAVE_PIC_ERROR 0x0002
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_BATTERY_ERROR 0x0003
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_DIAGNOSTIC_STATUS_ERROR 0x0004
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_CHECKSUM_ERROR 0x0005
|
||||
/* achu: Inventec 5441 lists "Config Error", while Inventec 5442 lists "Configuration Error"
|
||||
* We'll just keep "Config Error"
|
||||
*/
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_CONFIG_ERROR 0x0006
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_KEYBOARD_LOCK_ERROR 0x0008
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_NO_KEYBOARD_ERROR 0x0009
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_KBC_BAT_TEST_ERROR 0x000A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_MEMORY_SIZE_ERROR 0x000B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_RAM_READ_WRITE_TEST_ERROR 0x000C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_FDD_0_ERROR 0x000E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_FLOPPY_CONTROLLER_ERROR 0x0010
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_DATE_TIME_ERROR 0x0012
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_NO_PS2_MOUSE_ERROR 0x0014
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_REFRESH_TIMER_ERROR 0x0040
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DISPLAY_MEMORY_ERROR 0x0041
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_POST_THE_INS_KEY_ERROR 0x0043
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DMAC_PAGE_REGISTER_ERROR 0x0044
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DMAC1_CHANNEL_REGISTER_ERROR 0x0045
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DMAC2_CHANNEL_REGISTER_ERROR 0x0046
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PMM_MEMORY_ALLOCATION_ERROR 0x0047
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PASSWORD_CHECK_ERROR 0x0048
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ADM_MODULE_ERROR 0x004A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_LANGUAGE_MODULE_ERROR 0x004B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_KBC_INTERFACE_ERROR 0x004C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_0_ERROR 0x004D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_1_ERROR 0x004E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_2_ERROR 0x004F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_3_ERROR 0x0050
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_4_ERROR 0x0051
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_5_ERROR 0x0052
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_6_ERROR 0x0053
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_7_ERROR 0x0054
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_0_ERROR 0x0055
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_1_ERROR 0x0056
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_2_ERROR 0x0057
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_3_ERROR 0x0058
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_4_ERROR 0x0059
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_5_ERROR 0x005A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_6_ERROR 0x005B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_7_ERROR 0x005C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATA_SMART_FEATURE_ERROR 0x005D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_NON_CRITICAL_PASSWORD_CHECK_ERROR 0x005E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DUMMY_BIOS_ERROR 0x00FF
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_HC_NOT_FOUND 0x8101
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_DEVICE_INIT_ERROR 0x8102
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_DEVICE_DISABLED 0x8103
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_OHCI_EMUL_NOT_SUPPORTED 0x8104
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_EHCI_64BIT_DATA_STRUCTURE_ERROR 0x8105
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_SMBIOS_NOT_ENOUGH_SPACE_IN_F000 0x8301
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_AP_APPLICATION_PROCESSOR_FAILED_BIST 0x0110
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU1_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0120
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU2_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0121
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU3_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0122
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU4_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0123
|
||||
/* BSP = Baseboard Service Processor */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PROCESSOR_FAILED_BIST_BSP 0x0150
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU1_PROCESSOR_MISSING_MICROCODE 0x0160
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU2_PROCESSOR_MISSING_MICROCODE 0x0161
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU3_PROCESSOR_MISSING_MICROCODE 0x0162
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU4_PROCESSOR_MISSING_MICROCODE 0x0163
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_L2_CACHE_SIZE_MISMATCH 0x0192
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPUID_PROCESSOR_STEPPING_ARE_DIFFERENT 0x0193
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPUID_PROCESSOR_FAMILY_ARE_DIFFERENT 0x0194
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_FRONT_SIDE_BUS_MISMATCH 0x0195
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPUID_PROCESSOR_MODEL_ARE_DIFFERENT 0x0196
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PROCESSOR_SPEEDS_MISMATCHED 0x0197
|
||||
/* QPI Mismatch only for Inventec 5442 */
|
||||
/* QPI = Quickpath Interconnect */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_QPI_MISMATCHED 0x0198
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_UNDEFINED_BIOS_ERROR 0xFFFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_A0 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_A1 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_A2 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_B0 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_B1 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_B2 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_C0 0x07
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_C1 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_C2 0x09
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_D0 0x0A
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_D1 0x0B
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_D2 0x0C
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_E0 0x0D
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_E1 0x0E
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_E2 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_F0 0x10
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_F1 0x11
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_F2 0x12
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_DEVICE_NUMBER_BITMASK 0xF8
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_DEVICE_NUMBER_SHIFT 3
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_FUNCTION_NUMBER_BITMASK 0x07
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_FUNCTION_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI0_ERROR 0
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI1_ERROR 1
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI2_ERROR 2
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI3_ERROR 3
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_MISCELLANEOUS_ERROR 23
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_IOH_CORE_ERROR 24
|
||||
|
||||
#define IPMI_OEM_QUANTA_EVENT_DATA
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************
|
||||
* Supermicro *
|
||||
*******************************************/
|
||||
|
||||
/*
|
||||
* Supermicro X7DBR-3 (X7DBR_3)
|
||||
* Supermicro X7DB8
|
||||
* Supermicro X8DTN
|
||||
* Supermicro X7SBI-LN4 (X7SBI_LN4)
|
||||
* Supermicro X8DTH
|
||||
* Supermicro X8DTG
|
||||
* Supermicro X8DTU
|
||||
* Supermicro X8DT3-LN4F (X8DT3_LN4F)
|
||||
* Supermicro X8DTU-6+ (X8DTU_6PLUS)
|
||||
* Supermicro X8DTL
|
||||
* Supermicro X8DTL-3F (X8DTL_3F)
|
||||
* Supermicro X8SIL-F (X8SIL_F)
|
||||
* Supermicro X9SCL
|
||||
* Supermicro X9SCM
|
||||
* Supermicro X8DTN+-F (X8DTNPLUS_F)
|
||||
* Supermicro X8SIE
|
||||
* Supermicro X9SCA-F-O (X9SCA_F_O)
|
||||
* Supermicro H8DGU-F (H8DGU_F)
|
||||
* Supermicro X9DRi-F (X9DRI_F)
|
||||
* Supermicro X9DRI-LN4F+ (X9DRI_LN4F_PLUS)
|
||||
* Supermicro X9SPU-F-O (X9SPU_F_O)
|
||||
* Supermicro X9SCM-iiF (X9SCM_IIF)
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_LOW 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_MEDIUM 0x01
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_HIGH 0x02
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_OVERHEAT 0x04
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_NOT_INSTALLED 0x07
|
||||
|
||||
/* achu: Different for SEL, I don't know why */
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_SEL_OVERHEAT 0x02
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,188 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_1 0x00
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_2 0x01
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_3 0x02
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_4 0x04
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_THRESHOLD_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_THRESHOLD_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_SBE_WARNING_THRESHOLD 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_SBE_CRITICAL_THRESHOLD 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_UNSPECIFIED 0x0F
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU_DIMM_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU_DIMM_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU1_DIMM_A 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU2_DIMM_B 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU3_DIMM_C 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU4_DIMM_D 0x03
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_1_BITMASK 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_2_BITMASK 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_3_BITMASK 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_4_BITMASK 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_5_BITMASK 0x10
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_6_BITMASK 0x20
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_7_BITMASK 0x40
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_8_BITMASK 0x80
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_DEVICE_NUMBER_BITMASK 0xF8
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_DEVICE_NUMBER_SHIFT 3
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_FUNCTION_NUMBER_BITMASK 0x07
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_FUNCTION_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_OEM_WISTRON_CORE 0x07
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_OEM_WISTRON_NON_FATAL 0x08
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_OEM_WISTRON_FATAL 0x0A
|
||||
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI0_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI1_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI2_ERROR 0x02
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI3_ERROR 0x03
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI0_PROTOCOL_ERROR 0x04
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI1_PROTOCOL_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI2_PROTOCOL_ERROR 0x06
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI3_PROTOCOL_ERROR 0x07
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_MISCELLANEOUS_ERROR 0x23
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_IOH_CORE_ERROR 0x24
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_BITMASK 0x1F
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_PERIODIC_CRC_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_PROTOCOL_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_FLOW_CONTROL_BUFFER_OVERFLOW 0x02
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_RESPONSE_ERROR 0x03
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_PER_PACKET_CRC_ERROR 0x04
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_RETRY_COUNTER_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_MCU_PARITY_ERROR 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_FIRST_FIELD_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_FIRST_FIELD_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_SECOND_FIELD_HIGH_BITS_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_SECOND_FIELD_HIGH_BITS_SHIFT 0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_SECOND_FIELD_HIGH_BITS_LEFT_SHIFT 2
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_SECOND_FIELD_LOW_BITS_BITMASK 0xC0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_SECOND_FIELD_LOW_BITS_SHIFT 6
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_THIRD_FIELD_BITMASK 0x3F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_THIRD_FIELD_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_BITMASK 0x80
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_SHIFT 7
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_PC_COMPATIBLE_BOOT 0x0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_UEFI_BOOT 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_BITMASK 0x7F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_FORCE_PXE_BOOT 0x1
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_NIC_PXE_BOOT 0x2
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_HARD_DISK_BOOT 0x3
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_RAID_HDD_BOOT 0x4
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_USB_STORAGE_BOOT 0x5
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_CD_DVD_ROM_BOOT 0x7
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_ISCSI_BOOT 0x8
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_UEFI_SHELL 0x9
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_EPSA_DIAGNOSTIC_BOOT 0xA
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_LOCAL_CONSOLE_RESOURCE_CONFLICT 0x0010
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_LOCAL_CONSOLE_CONTROLLER_ERROR 0x0011
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_LOCAL_CONSOLE_OUTPUT_ERROR 0x0012
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_IO_CONTROLLER_ERROR 0x0013
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_IO_RESOURCE_CONFLICT 0x0014
|
||||
/* achu: Doc lists "controller error" again, Dell confirms its not a typo. */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_IO_CONTROLLER_ERROR2 0x0015
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_FLOPPY_CONTROLLER_ERROR 0x0016
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_FLOPPY_INPUT_ERROR 0x0017
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_FLOPPY_OUTPUT_ERROR 0x0018
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_USB_READ_ERROR 0x0019
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_USB_WRITE_ERROR 0x001A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_USB_INTERFACE_ERROR 0x001B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MOUSE_INTERFACE_ERROR 0x001C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_NOT_DETECTED 0x001E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_CONTROLLER_ERROR 0x001F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_STUCK_KEY_ERROR 0x0020
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_LOCKED_ERROR 0x0021
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MEMORY_CORRECTABLE_ERROR 0x0023
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MEMORY_UNCORRECTABLE_ERROR 0x0024
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MEMORY_NON_SPECIFIC_ERROR 0x0025
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MP_SERVICE_SELF_TEST_ERROR 0x0026
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_PCI_IO_CONTROLLER_ERROR 0x0027
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_PCI_IO_READ_ERROR 0x0028
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_PCI_IO_WRITE_ERROR 0x0029
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_NOT_DETECTED 0x002A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_CONTROLLER_ERROR 0x002B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_INPUT_ERROR 0x002C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_OUTPUT_ERROR 0x002D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MICROCODE_UPDATE_ERROR 0x002E
|
||||
/* achu: spec says "be updated", I assume English typo */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_NO_MICROCODE_UPDATED 0x002F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_0_DEVICE_NOT_FOUND 0x8012
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_1_DEVICE_NOT_FOUND 0x8013
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_2_DEVICE_NOT_FOUND 0x8014
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_3_DEVICE_NOT_FOUND 0x8015
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_4_DEVICE_NOT_FOUND 0x8016
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_5_DEVICE_NOT_FOUND 0x8017
|
||||
/* achu: spec says "be Configured", I assume English error */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SPARING_MODE_IS_NOT_CONFIGURED 0x8018
|
||||
/* achu: spec says "be Configured", I assume English error */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MIRROR_MODE_IS_NOT_CONFIGURED 0x8019
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SUPERVISER_AND_USER_PASSWORDS_CLEARED 0x8020
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_CMOS_BATTERY_FAULT 0x8021
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_START_RECOVERY 0x1
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_RECOVERY_SUCCESS 0x2
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_LOAD_IMAGE_FAIL 0x3
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_SIGNED_FAIL 0x4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_ME_FAIL 0x1
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_wistron_ioh_core_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_wistron_ioh_core_error_max_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,132 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_DELL_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_ECC_CORRECTABLE_ERRORS 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_ECC_UNCORRECTABLE_ERRORS 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_IO_CHANNEL_CHECK 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_PCI_PARITY_ERROR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_PCI_SYSTEM_ERROR 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_EVENT_LOGGING_FOR_CORRECTABLE_ECC_EVENTS_DISABLED 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_EVENT_LOGGING_DISABLED 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_UNKNOWN_ERROR 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_INTERNAL_ERROR 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_PROTOCOL_ERROR 0x0A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_BUS_PERR 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_BUS_INITIALIZATION_ERROR 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_MACHINE_CHECK_ERROR 0x0D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_SPARE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_MIRROR 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_RAID 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_HOT_ADD 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_HOT_REMOVE 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_HOT_FAILURE 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_REDUNDANCY_REGAINED 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_FATAL_PCI_EXPRESS_ERRORS 0x18
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CHIPSET_ERROR 0x19
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_ERROR_REGISTER_POINTER 0x1A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_CORRECTABLE_ECC_WARNING_OR_CRITICAL_EXCEEDED 0x1B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CRC_MEMORY_ERROR 0x1C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_USB_OVER_CURRENT 0x1D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_POST_FATAL_ERROR 0x1E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_INCOMPATIBLE_BMC_FIRMWARE 0x1F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEM_OVERTEMP 0x20
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEM_FATAL_SB_CRC 0x21
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEM_FATAL_NB_CRC 0x22
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_OS_WATCHDOG_TIMER 0x23
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_LINK_TUNING_ERROR 0x24
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_LT_FLEXADDR 0x25
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_NON_FATAL_PCI_EXPRESS_ERRORS 0x26
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_FATAL_IO_ERROR 0x27
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MSR_INFO_LOG 0x28
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_QPI_LINK_ERROR_SENSOR 0x29
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_TXT_SX_SENTER_COMMAND_ERROR 0x2A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_IDPT_MEMORY_ONLINE_FAILURE 0x2B
|
||||
|
||||
/*
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FB_TEMP 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_1 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_2 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_3 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_4 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_5 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_6 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_1_TEMP 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_2_TEMP 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_3_TEMP 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_4_TEMP 0x0A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_5_TEMP 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_6_TEMP 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_7_TEMP 0x0D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_8_TEMP 0x0E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_9_TEMP 0x0F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_10_TEMP 0x10
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_11_TEMP 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_12_TEMP 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_13_TEMP 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_14_TEMP 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_15_TEMP 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_16_TEMP 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_1_WATT 0x50
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_2_WATT 0x51
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_3_WATT 0x52
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_4_WATT 0x53
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_5_WATT 0x54
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_6_WATT 0x55
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_7_WATT 0x56
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_8_WATT 0x57
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_9_WATT 0x58
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_10_WATT 0x59
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_11_WATT 0x5A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_12_WATT 0x5B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_13_WATT 0x5C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_14_WATT 0x5D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_15_WATT 0x5E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_16_WATT 0x5F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_1_WATT 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_2_WATT 0x61
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_3_WATT 0x62
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_4_WATT 0x63
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_1 0x80
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_2 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_3 0x82
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_4 0x83
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_5 0x84
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_6 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_7 0x86
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_8 0x87
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_DELL_SPEC_H */
|
@ -0,0 +1,61 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_ME_POWER_STATE 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH IPMI_SENSOR_NUMBER_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT
|
||||
|
||||
/* Defined in Spec 2.0, but not in 1.5 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_SENSOR 0x19
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_SENSOR 0x18
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_SENSOR 0x1A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_SENSOR 0x1B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_SMBUS_STATUS 0x6E
|
||||
|
||||
/* Defined in Spec 3.0 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR 0xB2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_SENSOR 0xC1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,304 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_INTEL_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_SENSOR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCIE_FATAL_SENSOR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCIE_CORRECTABLE_SENSOR 0x05
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_CORRECTABLE_SENSOR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_NON_FATAL_SENSOR 0x07
|
||||
/* QPI_FATAL_SENSOR_A and QPI_FATAL_SENSOR_B are identical, they are
|
||||
* logical extensions to provide additional offset values
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_FATAL_SENSOR_A 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_FATAL_SENSOR_B 0x18
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_ERROR 0x06
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_RAS_STATUS_INFORMATION_FOR_MEMORY_MIRRORING_MIRRORING_MODE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_RAS_STATUS_INFORMATION_FOR_MEMORY_MIRRORING_SPARING_MODE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_MIRRORING_RAS_CONFIGURATION_INFORMATION 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_SPARING_RAS_CONFIGURATION_INFORMATION 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_PARITY_ERROR 0x14
|
||||
|
||||
/*
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
/* achu: Few same as above, but to clearly differentiate motherboards, duplicate them */
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PCI_SENSOR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_FATAL_SENSOR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_CORRECTABLE_SENSOR 0x05
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_CORRECTABLE_SENSOR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_NON_FATAL_SENSOR 0x07
|
||||
/* QPI_FATAL_SENSOR_A and QPI_FATAL_SENSOR_B are identical, they are
|
||||
* logical extensions to provide additional offset values
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_FATAL_SENSOR_A 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_FATAL_SENSOR_B 0x18
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_BIOS_POST_ERROR 0x06
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_RAS_STATE_INFORMATION_FOR_MEMORY_MIRRORING_MIRRORING_MODE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_MISMATCH_CONFIGURATION_ERROR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_SMI_LINK_CRC_ERROR_PERSISTENT 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PATROL_SCRUB_ERROR 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_SMI_LINK_CRC_ERROR_UNCORRECTABLE 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_RAS_STATE_INFORMATION_FOR_MEMORY_MIRRORING_SPARING_MODE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_MIRRORING_RAS_CONFIGURATION_INFORMATION 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_SPARING_RAS_CONFIGURATION_INFORMATION 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_BOARD_STATE 0x20
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
/* achu: Few same as above, but to clearly differentiate motherboards, duplicate them */
|
||||
/* achu: note a typo, memory ras configuration status & memory ecc error both 2, not sure why in doc */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MIRRORING_REDUNDANCY_STATE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_RAS_CONFIGURATION_STATUS 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_LEGACY_PCI_ERROR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_PCIE_CORRECTABLE_ERROR 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_BIOS_POST_ERROR 0x06
|
||||
/* not a typo, also 0x06 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_QPI_CORRECTABLE_ERRORS 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_OPI_FATAL_ERROR 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_CHIPSET_PROPRIETARY 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_QPI_LINK_WIDTH_REDUCED 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_ERROR_EXTENSION 0x10
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_SPARING_REDUNDANCY_STATE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_RAS_MODE_SELECT 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_PARITY_ERROR 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR_2 0x14
|
||||
/* not a typo, jumps to 0x17 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_OPI_FATAL_ERROR_2 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_SYSTEM_EVENT 0x83
|
||||
|
||||
/*
|
||||
* Intel Windmill
|
||||
* (Quanta Winterfell)
|
||||
* (Wiwynn Windmill)
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_ME_FW_HEALTH_SENSOR 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_PROC_HOT_EXTENDED_SENSOR 0x3C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_MEM_HOT_EXTENDED_SENSOR 0x3D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_MACHINE_CHECK_ERROR_SENSOR 0x40
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_PCIE_ERROR_SENSOR 0x41
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_POST_ERROR_SENSOR 0x2B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_OTHER_IIO_ERROR_SENSOR 0x43
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_CPU_SEL_STATUS 0x5F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_MEMORY_ECC_ERROR 0x63
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_CHASSIS_POWER_STATUS 0x70
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_LOW 0x28
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_HIGH 0x42
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_MFR_SPECIFIC 0x5E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_INPUT 0x9F
|
||||
|
||||
/* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
*/
|
||||
|
||||
/* BMC owned sensors (GID = 0020h) */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_UNIT_STATUS 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_UNIT_REDUNDANCY 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IPMI_WATCHDOG 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PHYSICAL_SECURITY 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FP_INTERRUPT 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SMI_TIMEOUT 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SYSTEM_EVENT_LOG 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SYSTEM_EVENT 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BUTTON_SENSOR 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BMC_WATCHDOG 0x0A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_VOLTAGE_REGULATOR_WATCHDOG 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_REDUNDANCY 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SSB_THERMAL_TRIP 0x0D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE_PRESENCE 0x0E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SAS_MODULE_PRESENCE 0x0F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BMC_FIRMWARE_HEALTH 0x10
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SYSTEM_AIRFLOW 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FIRMWARE_UPDATE_STATUS 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE2_PRESENCE 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE5 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE6 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE2_TEMPERATURE 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER3_TEMPERATURE 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER4_TEMPERATURE 0x18
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE1 0x20
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FRONT_PANEL_TEMPERATURE 0x21
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SSB_TEMPERATURE 0x22
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE2 0x23
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE3 0x24
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE4 0x25
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE_TEMPERATURE 0x26
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER1_TEMPERATURE 0x27
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_RISER_TEMPERATURE 0x28
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACK_PLANE1_TEMPERATURE 0x29
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACK_PLANE2_TEMPERATURE 0x2A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACK_PLANE3_TEMPERATURE 0x2B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER2_TEMPERATURE 0x2C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SAS_MODULE_TEMPERATURE 0x2D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_EXIT_AIR_TEMPERATURE 0x2E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NETWORK_INTERFACE_CONTROLLER_TEMPERATURE 0x2F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS_MIN 0x30
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS_MAX 0x3F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_PRESENT_SENSORS_MIN 0x40
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_PRESENT_SENSORS_MAX 0x4F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_STATUS 0x50
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_STATUS 0x51
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_AC_POWER_INPUT 0x54
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_AC_POWER_INPUT 0x55
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_12V_PERCENT_OF_MAXIMUM_CURRENT_OUTPUT 0x58
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_12V_PERCENT_OF_MAXIMUM_CURRENT_OUTPUT 0x59
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_TEMPERATURE 0x5C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_TEMPERATURE 0x5D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE15 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE16 0x61
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE17 0x62
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE18 0x63
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE19 0x64
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE20 0x65
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE21 0x66
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE22 0x67
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE23 0x68
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_CONTROLLER1_STATUS 0x69
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_CONTROLLER2_STATUS 0x6A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_CONTROLLER3_STATUS 0x6B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_STATUS 0x70
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_STATUS 0x71
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_STATUS 0x72
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_STATUS 0x73
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_THERMAL_MARGIN 0x74
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_THERMAL_MARGIN 0x75
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_THERMAL_MARGIN 0x76
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_THERMAL_MARGIN 0x77
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_THERMAL_CONTROL_PERCENT 0x78
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_THERMAL_CONTROL_PERCENT 0x79
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_THERMAL_CONTROL_PERCENT 0x7A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_THERMAL_CONTROL_PERCENT 0x7B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR_ERR2_TIMEOUT 0x7C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IERR_RECOVERY_DUMP_INFO 0x7D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTERNAL_ERROR 0x80
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR_POPULATION_FAULT 0x82
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_DTS_THERMAL_MARGIN 0x83
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_DTS_THERMAL_MARGIN 0x84
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_DTS_THERMAL_MARGIN 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_DTS_THERMAL_MARGIN 0x86
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_AUTO_CONFIG_STATUS 0x87
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_VRD_OVER_TEMPERATURE 0x90
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_FAN_TACHOMETER1 0xA0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_FAN_TACHOMETER2 0xA1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS1 0xA2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS2 0xA3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_FAN_TACHOMETER1 0xA4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_FAN_TACHOMETER2 0xA5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS3 0xA6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS4 0xA7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_AUTO_SHUTDOWN_SENSOR 0xB8
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS2_MIN 0xBA
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS2_MAX 0xBF
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_THERMAL_TRIP 0xC0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_THERMAL_TRIP 0xC1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_THERMAL_TRIP 0xC2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_THERMAL_TRIP 0xC3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN1 0xC4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN2 0xC5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN3 0xC6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN4 0xC7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN1 0xC8
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN2 0xC9
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN3 0xCA
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN4 0xCB
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN5 0xCC
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN6 0xCD
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN7 0xCE
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN8 0xCF
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_12V 0xD0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_VOLTAGE_FAULT 0xD1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE7 0xD5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE8 0xD6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_CMOS_BATTERY 0xDE
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACKPLANE4_TEMPERATURE 0xE0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_REAR_HARD_DISK_DRIVE0_STATUS 0xE2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_REAR_HARD_DISK_DRIVE1_STATUS 0xE3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE0_STATUS 0xF0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE1_STATUS 0xF1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE2_STATUS 0xF2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE3_STATUS 0xF3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE4_STATUS 0xF4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE5_STATUS 0xF5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE6_STATUS 0xF6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE7_STATUS 0xF7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE8_STATUS 0xF8
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE9_STATUS 0xF9
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE10_STATUS 0xFA
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE11_STATUS 0xFB
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE12_STATUS 0xFC
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE13_STATUS 0xFD
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE14_STATUS 0xFE
|
||||
|
||||
/* BIOS POST owned sensors (GID = 0001h) */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_MEMORY_RAS_CONFIGURATION_STATUS 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_POST_ERROR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_INTEL_QUICK_PATH_INTERFACE_LINK_WIDTH_REDUCED 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_MEMORY_RAS_MODE_SELECT 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_SYSTEM_EVENT 0x83
|
||||
|
||||
/* BIOS SMI Handler owned sensors (GID = 0033h) */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_MIRRORING_REDUNDANCY_STATE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_LEGACY_PCI_ERROR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_PCI_EXPRESS_FATAL_ERROR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_PCI_EXPRESS_CORRECTABLE_ERROR 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_INTEL_QUICK_PATH_INTERFACE_CORRECTABLE_ERROR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_INTEL_QUICK_PATH_INTERFACE_FATAL_ERROR 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_SPARING_REDUNDANCY_STATE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_MEMORY_PARITY_ERROR 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_PCI_EXPRESS_FATAL_ERROR2 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_BIOS_RECOVERY 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_INTEL_QUICKPATH_INTERFACE_FATAL_ERROR2 0x17
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_POST_START 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_POST_OK 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_POST_ERROR_CODE 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_PORT80_CODE_EVENT 0x55
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_MEMORY 0x60
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_MEMORY 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_PCI_SENSORID 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_QPI_SENSORID 0x82
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_INT_SENSORID 0x83
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_SOFTWARE_NMI 0xA5
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_PROCESSOR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_MEMORY 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_QPI_SENSOR_ID 0x71
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_INT_SENSOR_ID 0x72
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_PCI_SENSOR_ID 0x73
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_SB_SENSOR_ID 0x77
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_POST_START 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_POST_END 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_POST_ERROR 0x86
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_BIOS_RECOVERY_FAIL 0x89
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_ME_FAIL 0x8A
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_WISTRON_SPEC_H */
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user