add freeipmi source
This commit is contained in:
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef IPMI_CMD_OEM_DELL_SPEC_H
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#define IPMI_CMD_OEM_DELL_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Dell Poweredge R610
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* Dell Poweredge R710
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* Dell Poweredge R720
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*/
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/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
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#define IPMI_CMD_OEM_DELL_RESERVED_EXTENDED_CONFIGURATION 0x01
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#define IPMI_CMD_OEM_DELL_GET_EXTENDED_CONFIGURATION 0x02
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#define IPMI_CMD_OEM_DELL_SET_EXTENDED_CONFIGURATION 0x03
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/* IPMI_NET_FN_OEM_DELL_GENERIC_RQ / IPMI_NET_FN_OEM_DELL_GENERIC_RS */
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#define IPMI_CMD_OEM_DELL_RESET_TO_DEFAULTS 0x21
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#define IPMI_CMD_OEM_DELL_SET_NIC_SELECTION 0x24
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#define IPMI_CMD_OEM_DELL_GET_NIC_SELECTION 0x25
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#define IPMI_CMD_OEM_DELL_QUERY_CHASSIS_IDENTIFY_STATUS 0x32
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#define IPMI_CMD_OEM_DELL_GET_CPLD_VERSION 0x33
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#define IPMI_CMD_OEM_DELL_GET_POWER_CONSUMPTION_DATA 0x9C
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#define IPMI_CMD_OEM_DELL_RESET_POWER_CONSUMPTION_DATA 0x9D
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#define IPMI_CMD_OEM_DELL_POWER_SUPPLY_INFO 0xB0
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#define IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL 0xB1
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#define IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE 0xB2
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#define IPMI_CMD_OEM_DELL_POWER_CONSUMPTION 0xB3
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#define IPMI_CMD_OEM_DELL_FRONT_PANEL_INFO 0xB5
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/* renamed "front panel info" in 12g */
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#define IPMI_CMD_OEM_DELL_LCD_INFO IPMI_CMD_OEM_DELL_FRONT_PANEL_INFO
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/* achu: this one is taken from code, is correct name? */
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#define IPMI_CMD_OEM_DELL_POWER_CAPACITY_STATUS 0xBA
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#define IPMI_CMD_OEM_DELL_GET_POWER_HEAD_ROOM 0xBB
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#define IPMI_CMD_OEM_DELL_ROLLBACK_FIRMWARE_VERSION 0xBE
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#define IPMI_CMD_OEM_DELL_GET_IDRAC_FIRMWARE_VERSION_NUMBER 0xBF
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#define IPMI_CMD_OEM_DELL_GET_ACTIVE_LOM_STATUS 0xC1
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#define IPMI_CMD_OEM_DELL_IDRAC_VIRTUAL_MAC 0xC9
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/*
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* Dell Poweredge R720
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*/
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#define IPMI_CMD_OEM_DELL_GET_BLADE_SLOT_ID 0x18
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#define IPMI_CMD_OEM_DELL_SET_NIC_SELECTION_FAILOVER 0x28
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#define IPMI_CMD_OEM_DELL_GET_NIC_SELECTION_FAILOVER 0x29
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#define IPMI_CMD_OEM_DELL_FRESH_AIR 0x35
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#define IPMI_CMD_OEM_DELL_GET_LAST_POST_CODE 0x99
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#define IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL2 0xCC
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#define IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE2 0xCD
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/*
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* Dell Poweredge C410x
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*/
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/* IPMI_NET_FN_OEM_DELL_GENERIC_RQ / IPMI_NET_FN_OEM_DELL_GENERIC_RS */
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#define IPMI_CMD_OEM_DELL_SLOT_POWER_CONTROL 0xF0
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/* IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RQ / IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RS */
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#define IPMI_CMD_OEM_DELL_PORT_MAP 0xC8
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CMD_OEM_DELL_SPEC_H */
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@ -0,0 +1,50 @@
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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||||
*
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* This program is free software: you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
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||||
*
|
||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef IPMI_CMD_OEM_FUJITSU_SPEC_H
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#define IPMI_CMD_OEM_FUJITSU_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Fujitsu iRMC S1 / iRMC S2
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*
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* http://manuals.ts.fujitsu.com/file/4390/irmc_s2-en.pdf
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*/
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/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
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#define IPMI_CMD_OEM_FUJITSU_POWER 0x01
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#define IPMI_CMD_OEM_FUJITSU_COMMUNICATION 0x02
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#define IPMI_CMD_OEM_FUJITSU_FAN_TEST 0x10
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#define IPMI_CMD_OEM_FUJITSU_BIOS 0xF1
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#define IPMI_CMD_OEM_FUJITSU_SYSTEM 0xF5
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/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
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#define IPMI_CMD_OEM_FUJITSU_SET_FIRMWARE_SELECTOR 0x04
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#define IPMI_CMD_OEM_FUJITSU_GET_FIRMWARE_SELECTOR 0x05
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/* IPMI_NET_FN_OEM_FUJITSU_GENERIC_RQ / IPMI_NET_FN_OEM_FUJITSU_GENERIC_RS */
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#define IPMI_CMD_OEM_FUJITSU_GET_REMOTE_STORAGE_CONNECTION_OR_STATUS 0x19
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#define IPMI_CMD_OEM_FUJITSU_SET_VIDEO_DISPLAY_ON_OFF 0x1A
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CMD_OEM_FUJITSU_SPEC_H */
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@ -0,0 +1,37 @@
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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||||
*
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||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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||||
*
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*/
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#ifndef IPMI_CMD_OEM_IBM_SPEC_H
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#define IPMI_CMD_OEM_IBM_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* IBM x3455/x3755
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*/
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/* IPMI_NET_FN_OEM_IBM_LED_RQ / IPMI_NET_FN_OEM_IBM_LED_RS */
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/* achu: not official names, named based on use context */
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#define IPMI_CMD_OEM_IBM_GET_LED 0xC0
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CMD_OEM_IBM_SPEC_H */
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@ -0,0 +1,68 @@
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/*
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* Copyright (C) 2003-2015 FreeIPMI Core Team
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||||
*
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||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef IPMI_CMD_OEM_INTEL_NODE_MANAGER_SPEC_H
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Intel Node Manager
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*
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* For Intel Chips, not just Intel Motherboards. Confirmed for:
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*
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* Intel S5500WB/Penguin Computing Relion 700
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* Intel S2600JF/Appro 512X
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* Intel S2600KP
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* Intel S2600WT2
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* Intel S2600WTT
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* Inventec 5441/Dell Xanadu II
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* Inventec 5442/Dell Xanadu III
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* Quanta S99Q/Dell FS12-TY
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* Quanta QSSC-S4R/Appro GB812X-CN
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*/
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/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_ENABLE_DISABLE_NODE_MANAGER_POLICY_CONTROL 0xC0
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY 0xC1
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY 0xC2
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS 0xC3
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS 0xC4
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/* legacy names */
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_THRESHOLDS IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_ALERT_THRESHOLDS IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS 0xC5
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_POLICY_SUSPEND_PERIODS 0xC6
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_RESET_NODE_MANAGER_STATISTICS 0xC7
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_STATISTICS 0xC8
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_CAPABILITIES 0xC9
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_VERSION 0xCA
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POWER_DRAW_RANGE 0xCB
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_TURBO_SYNCHRONIZATION_RATIO 0xCC
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_TURBO_SYNCHRONIZATION_RATIO 0xCD
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_DESTINATION 0xCE
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_NODE_MANAGER_ALERT_DESTINATION 0xCF
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#define IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_LIMITING_POLICY_ID 0xF2
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CMD_OEM_INTEL_NODE_MANAGER_SPEC_H */
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@ -0,0 +1,53 @@
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/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
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|
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#ifndef IPMI_CMD_OEM_INTEL_SPEC_H
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#define IPMI_CMD_OEM_INTEL_SPEC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Intel S5500WB/Penguin Computing Relion 700
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* Intel S2600JF/Appro 512X
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*/
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/* IPMI_NET_FN_OEM_INTEL_GENERIC_RQ / IPMI_NET_FN_OEM_INTEL_GENERIC_RS */
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#define IPMI_CMD_OEM_INTEL_RESTORE_CONFIGURATION 0x02
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#define IPMI_CMD_OEM_INTEL_SET_FAULT_INDICATION 0x57
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/* IPMI_NET_FN_OEM_INTEL_CONFIG_RQ / IPMI_NET_FN_OEM_INTEL_CONFIG_RS */
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#define IPMI_CMD_OEM_INTEL_SET_SMTP_CONFIGURATION 0x37
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#define IPMI_CMD_OEM_INTEL_GET_SMTP_CONFIGURATION 0x38
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/*
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* Intel S2600JF/Appro 512X
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*/
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/* IPMI_NET_FN_OEM_INTEL_GENERIC_RQ / IPMI_NET_FN_OEM_INTEL_GENERIC_RS */
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#define IPMI_CMD_OEM_INTEL_SET_POWER_RESTORE_DELAY 0x54
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#define IPMI_CMD_OEM_INTEL_GET_POWER_RESTORE_DELAY 0x55
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#define IPMI_CMD_OEM_INTEL_GET_BMC_SERVICE_STATUS 0xB2
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#define IPMI_CMD_OEM_INTEL_CONTROL_BMC_SERVICES 0xB1
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#ifdef __cplusplus
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}
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#endif
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#endif /* IPMI_CMD_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,77 @@
|
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/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_CMD_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_INVENTEC_UPDATE_FIRMARE 0x01
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_UPDATE_STATUS 0x02
|
||||
#define IPMI_CMD_OEM_INVENTEC_COPY_IMAGE_DATA 0x03
|
||||
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_DEDICATED_MAC_ADDRESS 0x21
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_SHARED_MAC_ADDRESS 0x23
|
||||
|
||||
/* IPMI_NET_FN_OEM_INVENTEC_GENERIC_RQ / IPMI_NET_FN_OEM_INVENTEC_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_INVENTEC_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_EXTENDED_CONFIGURATION 0x03
|
||||
#define IPMI_CMD_OEM_INVENTEC_RESTORE_TO_DEFAULTS 0x04
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_RESTORE_STATUS 0x05
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_SYSTEM_GUID 0xB3
|
||||
|
||||
/* IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RQ / IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RS */
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_WEB_PORT_NUM 0x02
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_WEB_PORT_NUM 0x03
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_BOARD_ID 0x10
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_BOARD_ID 0x11
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_ASSET_TAG 0x12
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_LAN_SOURCE 0x13
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_LAN_SOURCE 0x14
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_FCB_FW_VERSION 0x15
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FCB_FW_VERSION 0x16
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_FAN_CONTROL 0x61
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FAN_CONTROL 0x62
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_FSC_TABLE 0x63
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FSC_TABLE 0x64
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FCB_SKU_INFO 0x6A
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_FCB_POWER_THROTTLING_STATUS 0x6B
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_GET_PIC_MODEL 0x70
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_SET_FLASH_PIN 0x71
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_GET_FLASH_PIN 0x72
|
||||
#define IPMI_CMD_OEM_INVENTEC_OEM_NEW_MASTER_WRITE_READ 0x73
|
||||
#define IPMI_CMD_OEM_INVENTEC_SET_POWER_THROTTLING_BEHAVIOR 0xB1
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_POWER_THROTTLING_BEHAVIOR 0xB2
|
||||
#define IPMI_CMD_OEM_INVENTEC_GET_PSU_MISMATCH_AND_TYPE 0xB3
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_CMD_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_QUANTA_UPDATE_FIRMARE 0x01
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_UPDATE_STATUS 0x02
|
||||
#define IPMI_CMD_OEM_QUANTA_COPY_IMAGE_DATA 0x03
|
||||
#define IPMI_CMD_OEM_QUANTA_USB_FIRMWARE_UPDATE 0x04
|
||||
|
||||
/* IPMI_NET_FN_OEM_QUANTA_GENERIC_RQ / IPMI_NET_FN_OEM_QUANTA_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_QUANTA_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_QUANTA_SET_EXTENDED_CONFIGURATION 0x03
|
||||
#define IPMI_CMD_OEM_QUANTA_RESET_TO_DEFAULTS 0x04
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_RESTORE_STATUS 0x05
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_SENSOR_TEMPERATURE_READING 0x10
|
||||
#define IPMI_CMD_OEM_QUANTA_GET_PROCESSOR_INFORMATION 0x18
|
||||
#define IPMI_CMD_OEM_QUANTA_SET_POWER_ON_BY_WAKE_ON_LAN_EVENT 0x1B
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
#define IPMI_CMD_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Sun 4140
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_OEM_GROUP_RQ / IPMI_NET_FN_OEM_GROUP_RS */
|
||||
#define IPMI_CMD_OEM_SUN_GET_LED 0x21
|
||||
#define IPMI_CMD_OEM_SUN_SET_LED 0x22
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_SUN_MICROSYSTEMS_SPEC_H */
|
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro H8QME
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_EXTRA_FIRMWARE_INFO 0x20
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_RESET_INTRUSION 0x03
|
||||
|
||||
/*
|
||||
* Supermicro X8DTG
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_CMD_OEM_SUPERMICRO_GENERIC_EXTENSION 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_CMD_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_CMD_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* IPMI_NET_FN_FIRMWARE_RQ / IPMI_NET_FN_FIRMWARE_RS */
|
||||
#define IPMI_CMD_OEM_WISTRON_UPDATE_FIRMARE 0x01
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_UPDATE_STATUS 0x02
|
||||
#define IPMI_CMD_OEM_WISTRON_COPY_IMAGE_DATA 0x03
|
||||
#define IPMI_CMD_OEM_WISTRON_USB_FIRMWARE_UPDATE 0x04
|
||||
#define IPMI_CMD_OEM_WISTRON_WRITE_PROPRIETARY_STRING 0x0B
|
||||
#define IPMI_CMD_OEM_WISTRON_READ_PROPRIETARY_STRING 0x0C
|
||||
#define IPMI_CMD_OEM_WISTRON_CLEAR_PROPRIETARY_STRING 0x0D
|
||||
|
||||
/* IPMI_NET_FN_OEM_WISTRON_GENERIC_RQ / IPMI_NET_FN_OEM_WISTRON_GENERIC_RS */
|
||||
#define IPMI_CMD_OEM_WISTRON_RESERVED_EXTENDED_CONFIGURATION 0x01
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_EXTENDED_CONFIGURATION 0x02
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_EXTENDED_CONFIGURATION 0x03
|
||||
#define IPMI_CMD_OEM_WISTRON_RESET_TO_DEFAULTS 0x04
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_RESTORE_STATUS 0x05
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_CONFIGURATION 0x11
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_CONFIGURATION 0x12
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_NAME 0x13
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_NAME 0x14
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_SENSOR_INFO 0x15
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_SENSOR_INFO 0x16
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_ENCLOSURE_POWER_CAPPING 0x17
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_ENCLOSURE_POWER_CAPPING 0x18
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_FAN_SPEED_CONTROL 0x19
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_FAN_SPEED_CONTROL 0x1A
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_LED_STATUS 0x1B
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_LED_STATUS 0x1C
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_HDD_INFO 0x1D
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_PSU_INFO 0x1E
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_PSU_INFO 0x1F
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_SERVICE_TAG 0x20
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_SERVICE_TAG 0x25
|
||||
#define IPMI_CMD_OEM_WISTRON_SYNCHRONIZE CHASSIS_SERVICE_TAG 0x26
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_PSU_CONFIGURATION 0x27
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_PSU_CONFIGURATION 0x28
|
||||
#define IPMI_CMD_OEM_WISTRON_SYNCHRONIZE_CHASSIS_ENCLOSURE_POWER 0x29
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_THERMAL_THROTTLING 0x2A
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_THERMAL_THROTTLING 0x2B
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_BMC_SC_BMC_PROTOCOL_VERSION 0x2C
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_SC_SC_BMC_PROTOCOL_VERSION 0x2D
|
||||
#define IPMI_CMD_OEM_WISTRON_GET_CHASSIS_POWER_READINGS 0x2E
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_CHASSIS_POWER_READINGS 0x2F
|
||||
#define IPMI_CMD_OEM_WISTRON_SET_PASSWORD_POLICY 0x51
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_CMD_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_DELL_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_DELL_GET_EXTENDED_CONFIGURATION
|
||||
* IPMI_CMD_OEM_DELL_SET_EXTENDED_CONFIGURATION
|
||||
* IPMI_CMD_OEM_DELL_SET_NIC_SELECTION_FAILOVER
|
||||
* IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL2
|
||||
* IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE2
|
||||
* IPMI_CMD_SET_SYSTEM_INFO_PARAMETERS
|
||||
* IPMI_CMD_GET_SYSTEM_INFO_PARAMETERS
|
||||
*/
|
||||
#define IPMI_COMP_CODE_OEM_DELL_NOT_LICENSED 0x6F
|
||||
#define IPMI_COMP_CODE_OEM_DELL_NOT_LICENSED_STR \
|
||||
"Not licensed"
|
||||
|
||||
/* w/ IPMI_CMD_OEM_DELL_POWER_MONITORING_OVER_A_SPECIFIED_AVERAGING_INTERVAL2
|
||||
* IPMI_CMD_OEM_DELL_POWER_MONITORING_AVERAGING_INTERVAL_RANGE2
|
||||
*/
|
||||
#define IPMI_COMP_CODE_OEM_DELL_SUBSYSTEM_LEVEL_POWER_IS_NOT_SUPPORTED 0x81
|
||||
#define IPMI_COMP_CODE_OEM_DELL_SUBSYSTEM_LEVEL_POWER_IS_NOT_SUPPORTED_STR \
|
||||
"subsystem-level power is not supported"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_DELL_SPEC_H */
|
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu RX100 S5
|
||||
*
|
||||
* http://manuals.ts.fujitsu.com/file/4390/irmc_s2-en.pdf
|
||||
*/
|
||||
/* IPMI_CMD_OEM_FUJITSU_BIOS - w/ GET_CPU_INFO Command Specifier */
|
||||
#define IPMI_COMP_CODE_OEM_FUJITSU_BIOS_UNPOPULATED_CPU_SOCKET 0x01
|
||||
#define IPMI_COMP_CODE_OEM_FUJITSU_BIOS_UNPOPULATED_CPU_SOCKET_STR \
|
||||
"Unpopulated CPU Socket"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,205 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_ENABLE_DISABLE_NODE_MANAGER_POLICY_CONTROL */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_RESET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_STATISTICS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_POLICY_ID 0x80
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_POLICY_ID_STR \
|
||||
"Invalid Policy Id"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_ENABLE_DISABLE_NODE_MANAGER_POLICY_CONTROL */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
/* IPMI_CMD_OEM_INTEL_RESET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_CAPABILITIES */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POWER_DRAW_RANGE */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_DOMAIN_ID 0x81
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_DOMAIN_ID_STR \
|
||||
"Invalid Domain Id"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_TRIGGER_TYPE 0x82
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_TRIGGER_TYPE_STR \
|
||||
"unknown or unsupported Policy Trigger Type"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_CONFIGURATION_ACTION 0x83
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_OR_UNSUPPORTED_POLICY_CONFIGURATION_ACTION_STR \
|
||||
"unknown or unsupported Policy Configuration Action"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POWER_LIMIT_OUT_OF_RANGE 0x84
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POWER_LIMIT_OUT_OF_RANGE_STR \
|
||||
"Power Limit out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CORRECTION_TIME_OUT_OF_RANGE 0x85
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CORRECTION_TIME_OUT_OF_RANGE_STR \
|
||||
"Correction Time out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POLICY_TRIGGER_VALUE_OUT_OF_RANGE 0x86
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_POLICY_TRIGGER_VALUE_OUT_OF_RANGE_STR \
|
||||
"Policy Trigger value out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_STATISTICS_REPORTING_PERIOD_OUT_OF_RANGE 0x89
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_STATISTICS_REPORTING_PERIOD_OUT_OF_RANGE_STR \
|
||||
"Statistics Reporting Period out of range"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_VALUE_OF_AGGRESSIVE_CPU_POWER_CORRECTION_FIELD 0x8B
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_VALUE_OF_AGGRESSIVE_CPU_POWER_CORRECTION_FIELD_STR \
|
||||
"Invalid value of Aggressive CPU Power Correction field"
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Policy could not be updated since PolicyId already exists and is enabled"
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_ILLEGAL 0xD6
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_ILLEGAL_STR \
|
||||
"Command disabled/unavailable due to lack of RTC synchronization"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS */
|
||||
/* No longer in 3.0 */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_LIMIT_IN_ONE_OF_THRESHOLDS_IS_INVALID 0x84
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_LIMIT_IN_ONE_OF_THRESHOLDS_IS_INVALID_STR \
|
||||
"Limit in one of thresholds is invalid"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID 0x87
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID_STR \
|
||||
"Number of thresholds is too large or power limits are invalid"
|
||||
|
||||
/* legacy name */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_THRESHOLDS IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_THRESHOLDS_STR IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NUMBER_OF_THRESHOLDS_IS_TOO_LARGE_OR_POWER_LIMITS_ARE_INVALID_STR
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Alert thresholds can not be changed for enabled policy, disable it first"
|
||||
|
||||
/* legacy name */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED_STR IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_ALERT_THRESHOLDS_REQUEST_PARAMETER_NOT_SUPPORTED_STR
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_ONE_OF_PERIODS_IN_THE_TABLE_IS_INCONSISTENT 0x85
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_ONE_OF_PERIODS_IN_THE_TABLE_IS_INCONSISTENT_STR \
|
||||
"One of the periods in the table is inconsistent. Start time is greater than or " \
|
||||
"equal to stop time or stop time sets time beyond 1 day"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_SUSPEND_PERIODS 0x87
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_NUMBER_OF_POLICY_SUSPEND_PERIODS_STR \
|
||||
"Invalid Number of policy suspend periods"
|
||||
|
||||
/* Standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_NOT_SUPPORTED 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SET_NODE_MANAGER_POLICY_SUSPEND_PERIODS_REQUEST_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"Suspend periods can not be changed for enabled policy, disable it first"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_RESET_NODE_MANAGER_STATISTICS */
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_STATISTICS */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_MODE 0x88
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INVALID_MODE_STR \
|
||||
"Invalid Mode"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_GET_NODE_MANAGER_CAPABILITIES */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TRIGGER_TYPE 0x82
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TRIGGER_TYPE_STR \
|
||||
"unknown Policy Trigger Type"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TYPE 0x83
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_UNKNOWN_POLICY_TYPE_STR \
|
||||
"unknown Policy Type"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_LIMITING_POLICY_ID */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NO_POLICY_IS_CURRENTLY_LIMITING 0xA1
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_NO_POLICY_IS_CURRENTLY_LIMITING_STR \
|
||||
"No policy is currently limiting for the specified DomainID"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_NODE_MANAGER_SET_TURBO_SYNCHRONIZATION_RATIO */
|
||||
/* IPMI_CMD_OEM_INTEL_NODE_MANAGER_GET_TURBO_SYNChRONIZATION_RATIO */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_WRONG_CPU_SOCKET_NUMBER 0xA1
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_WRONG_CPU_SOCKET_NUMBER_STR \
|
||||
"Wrong CPU socket number"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_COMMAND_RESPONSE_TIMEOUT 0xA2
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_COMMAND_RESPONSE_TIMEOUT_STR \
|
||||
"Command response timeout"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_READ_FSC_IN_THE_RESPONSE 0xA4
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_READ_FSC_IN_THE_RESPONSE_STR \
|
||||
"Bad read FSC in the response"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_WRITE_FCS_FIELD_IN_THE_RESPONSE 0xA5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_BAD_WRITE_FCS_FIELD_IN_THE_RESPONSE_STR \
|
||||
"Bad write FCS field in the response"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CPU_NOT_PRESENT 0xAC
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_CPU_NOT_PRESENT_STR \
|
||||
"CPU not present"
|
||||
|
||||
/* standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_PLATFORM_NOT_IN_S0_S1_STATE 0xD5
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_PLATFORM_NOT_IN_S0_S1_STATE_STR \
|
||||
"Platform not in the S0/S1 state "
|
||||
|
||||
/* standard error with special meaning */
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INCORRECT_ACTIVE_CORES_CONFIGURATION 0xC9
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_INCORRECT_ACTIVE_CORES_CONFIGURATION_STR \
|
||||
"Incorrect active cores configuration. Number of active cores exceeding number of cores on CPU"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_INTEL_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_SET_SMTP_CONFIGURATION */
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_WRITE_READ_ONLY_PARAMETER 0x82
|
||||
#define IPMI_COMP_CODE_SET_SMTP_CONFIGURATION_WRITE_READ_ONLY_PARAMETER_STR \
|
||||
"attempt to write read-only parameter"
|
||||
|
||||
/* IPMI_CMD_OEM_INTEL_GET_SMTP_CONFIGURATION */
|
||||
|
||||
/* achu: document from Intel also sites a "write read-only parameter"
|
||||
* error code, but I assume that is a cut and paste typo. Shouldn't
|
||||
* be possible for the "get" command
|
||||
*/
|
||||
|
||||
#define IPMI_COMP_CODE_GET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED 0x80
|
||||
#define IPMI_COMP_CODE_GET_SMTP_CONFIGURATION_PARAMETER_NOT_SUPPORTED_STR \
|
||||
"parameter not supported."
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_COMP_CODE_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* IPMI_CMD_OEM_WISTRON_GET_CHASSIS_LED_STATUS */
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER 0x80
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER_STR \
|
||||
"Not yet received any information from Satellite Controller"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS 0x81
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_GET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS_STR \
|
||||
"Satellite Controller Not Reporting for more than 10 consecutive seconds, but SC was alive before"
|
||||
|
||||
/* IPMI_CMD_OEM_WISTRON_SET_CHASSIS_LED_STATUS */
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER 0x80
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_NOT_YET_RECEIVED_ANY_INFORMATION_FROM_SATELLITE_CONTROLLER_STR \
|
||||
"Not yet received any information from Satellite Controller"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS 0x81
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_NOT_REPORTING_FOR_MORE_THAN_10_CONSECUTIVE_SECONDS_STR \
|
||||
"Satellite Controller Not Reporting for more than 10 consecutive seconds, but SC was alive before"
|
||||
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_DOES_NOT_SUPPORT_CHASSIS_LED_REQUESTED 0x82
|
||||
#define IPMI_COMP_CODE_OEM_WISTON_SET_CHASSIS_LED_STATUS_SATELLITE_CONTROLLER_DOES_NOT_SUPPORT_CHASSIS_LED_REQUESTED_STR \
|
||||
"Satellite Controller does not support one or many chassis LED requested"
|
||||
|
||||
/* IPMI_CMD_OEM_WISTRON_GET_CHASSIS_POWER_READINGS */
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_BMC_HAS_NOT_YET_RECEIVED_ANY_COMMANDS_FROM_SC 0x81
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_BMC_HAS_NOT_YET_RECEIVED_ANY_COMMANDS_FROM_SC_STR \
|
||||
"BMC has not yet received any commands from SC"
|
||||
|
||||
/* achu: spec says "timeout" I'm going to say "timedout" */
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_SC_HAS_TIMEDOUT 0x82
|
||||
#define IPMI_COMP_CODE_OEM_WISTRON_GET_CHASSIS_POWER_READINGS_SC_HAS_TIMEDOUT_STR \
|
||||
"BMC has received Set Chassis Power Readings/Set Sensor Info from SC, but SC has timedout and is considered offline now."
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_COMP_CODE_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
|
||||
/* achu: the strings are all over the place, "status" is the best name
|
||||
* I can think of
|
||||
*/
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS 0x70
|
||||
|
||||
/* achu: names taken from code, are correct names? */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_OEM_DIAGNOSTIC_EVENT_DATA 0x7E
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_FAILURE 0x8A
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_DELL_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_HP_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_HP_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* HP Proliant DL160 G8
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_HP_UID_LIGHT 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_HP_HEALTH_LED 0x71
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_HP_SPEC_H */
|
@ -0,0 +1,56 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT 0x75
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_THERMAL_SENSOR_ON_DIMM 0x76
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_CUPS_EVENT 0x72
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,103 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_PCIE_FATAL_SENSOR 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_PCIE_CORRECTABLE_SENSOR 0x71
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QPI_CORRECTABLE_SENSOR 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QPI_NON_FATAL_SENSOR 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QPI_FATAL_SENSOR 0x74
|
||||
|
||||
/*
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
/* achu: Similar to above, but some events changed and some new ones,
|
||||
* so new macros to differentiate
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_FATAL_SENSOR 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_CORRECTABLE_SENSOR 0x71
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_QPI_CORRECTABLE_SENSOR 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_QPI_NON_FATAL_SENSOR 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_QPI_FATAL_SENSOR 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_CORRECTABLE_ERROR 0x76
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_QUANTA_QSSC_S4R_UNCORRECTABLE_ERROR 0x77
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
/* achu: some are similar to above, but different names, new events,
|
||||
* new numbers, so making new macros to differentiate */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_CORRECTABLE_ERROR 0x71
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_QPI_CORRECTABLE_ERRORS 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_OPI_FATAL_ERROR 0x73
|
||||
/* continuation for IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_OPI_FATAL_ERROR for more offsets */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_OPI_FATAL_ERROR_2 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_CHIPSET_PROPRIETARY 0x75
|
||||
/* continuation for IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR for more offsets */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR_2 0x76
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_QPI_LINK_WIDTH_REDUCED 0x77
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_S2600JF_MEMORY_ERROR_EXTENSION 0x7F
|
||||
|
||||
/*
|
||||
* Intel Windmill
|
||||
* (Quanta Winterfell)
|
||||
* (Wiwynn Windmill)
|
||||
*/
|
||||
/* achu: Like Intel Node Manager, but no Intel Node Manager on these nodes, so cut & paste to differentiate */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_WINDMILL_ME_FW_HEALTH_SENSOR 0x75
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_WINDMILL_OTHER_IIO_ERROR_SENSOR 0x70
|
||||
|
||||
/*
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
*/
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_CORRECTABLE_ERROR 0x72
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_FATAL_ERROR 0x73
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_FATAL_ERROR_2 0x74
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_QPI_LINK_WIDTH_REDUCED 0x77
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_PCI_EXPRESS_FATAL_ERRORS 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_PCI_EXPRESS_FATAL_ERRORS_2 0x76
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_PCI_EXPRESS_CORRECTABLE_ERRORS 0x71
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_FIRMWARE_UPDATE_STATUS_SENSOR 0x70
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_BIOS_RECOVERY_START 0x70
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_BIOS_RECOVERY_FINISH 0xF0
|
||||
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_E52600V3_IERR_RECOVERY_DUMP_INFO 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_BIOS 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro X7DBR-3 (X7DBR_3)
|
||||
* Supermicro X7DB8
|
||||
* Supermicro X8DTN
|
||||
* Supermicro X7SBI-LN4 (X7SBI_LN4)
|
||||
* Supermicro X8DTH
|
||||
* Supermicro X8DTG
|
||||
* Supermicro X8DTU
|
||||
* Supermicro X8DT3-LN4F (X8DT3_LN4F)
|
||||
* Supermicro X8DTU-6+ (X8DTU_6PLUS)
|
||||
* Supermicro X8DTL
|
||||
* Supermicro X8DTL-3F (X8DTL_3F)
|
||||
* Supermicro X8SIL-F (X8SIL_F)
|
||||
* Supermicro X9SCL
|
||||
* Supermicro X9SCM
|
||||
* Supermicro X8DTN+-F (X8DTNPLUS_F)
|
||||
* Supermicro X8SIE
|
||||
* Supermicro X9SCA-F-O (X9SCA_F_O)
|
||||
* Supermicro H8DGU-F (H8DGU_F)
|
||||
* Supermicro X9DRi-F (X9DRI_F)
|
||||
* Supermicro X9DRI-LN4F+ (X9DRI_LN4F_PLUS)
|
||||
* Supermicro X9SPU-F-O (X9SPU_F_O)
|
||||
* Supermicro X9SCM-iiF (X9SCM_IIF)
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_GENERIC 0x70
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_EVENT_READING_TYPE_CODE_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY 192
|
||||
|
||||
/* w/ IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY_NO_RETRIES 0x00
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_INVENTEC_DHCP_RETRY_INDEFINITE_RETRY 0xFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_LAN_CONFIGURATION_PARAMETERS_INVENTEC_SPEC_H */
|
@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETERS_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY 192
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL 193
|
||||
|
||||
/* w/ IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY_NO_RETRIES 0x00
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_DHCP_RETRY_INDEFINITE_RETRY 0xFF
|
||||
|
||||
/* w/ IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL */
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_BITMASK 0x80
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_SHIFT 7
|
||||
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_LINK_DOWN_RESILIENCE_ENABLED 1
|
||||
#define IPMI_LAN_CONFIGURATION_PARAMETER_OEM_WISTRON_LINK_STATUS_CHANGE_CONTROL_DHCP_RE_DISCOVERY_ENABLED 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_LAN_CONFIGURATION_PARAMETERS_WISTRON_SPEC_H */
|
@ -0,0 +1,47 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_DELL_SPEC_H
|
||||
#define IPMI_NETFN_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_RS 0x31
|
||||
|
||||
/*
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RQ 0x34
|
||||
#define IPMI_NET_FN_OEM_DELL_GENERIC_PORT_MAP_RS 0x35
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_DELL_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_NETFN_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu RX100 S5
|
||||
*/
|
||||
#define IPMI_NET_FN_OEM_FUJITSU_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_FUJITSU_GENERIC_RS 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_IBM_SPEC_H
|
||||
#define IPMI_NETFN_OEM_IBM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IBM x3455/x3755
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_IBM_LED_RQ 0x3A
|
||||
#define IPMI_NET_FN_OEM_IBM_LED_RS 0x3B
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_IBM_SPEC_H */
|
@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_INTEL_SPEC_H
|
||||
#define IPMI_NETFN_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_INTEL_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_INTEL_GENERIC_RS 0x31
|
||||
|
||||
#define IPMI_NET_FN_OEM_INTEL_CONFIG_RQ 0x32
|
||||
#define IPMI_NET_FN_OEM_INTEL_CONFIG_RS 0x33
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_NETFN_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_GENERIC_RS 0x31
|
||||
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RQ 0x34
|
||||
#define IPMI_NET_FN_OEM_INVENTEC_SPECIFIC_RS 0x35
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_NETFN_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_QUANTA_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_QUANTA_GENERIC_RS 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_NETFN_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro H8QME
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_GENERIC_RS 0x31
|
||||
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_PEPPERCON_RQ 0x3C
|
||||
#define IPMI_NET_FN_OEM_SUPERMICRO_PEPPERCON_RS 0x3D
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_NETFN_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_NETFN_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_NET_FN_OEM_WISTRON_GENERIC_RQ 0x30
|
||||
#define IPMI_NET_FN_OEM_WISTRON_GENERIC_RS 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_NETFN_OEM_WISTRON_SPEC_H */
|
1312
source/freeipmi/usr/include/freeipmi/spec/oem/ipmi-oem-dell-spec.h
Normal file
1312
source/freeipmi/usr/include/freeipmi/spec/oem/ipmi-oem-dell-spec.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,244 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu iRMC S1 / iRMC S2
|
||||
*
|
||||
* All of the below are from
|
||||
*
|
||||
* http://manuals.ts.fujitsu.com/file/4390/irmc_s2-en.pdf
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_POWER */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_ON_SOURCE 0x15
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_OFF_SOURCE 0x16
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_POWER_OFF_INHIBIT 0x1C
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_OFF_INHIBIT 0x1D
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_NEXT_POWER_ON_TIME 0x20
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_COMMUNICATION */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SYSTEM_OS_SHUTDOWN_REQUEST 0x05
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SYSTEM_OS_SHUTDOWN_REQUEST_AND_RESET 0x06
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_AGENT_CONNECT_STATUS 0x08
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SHUTDOWN_REQUEST_CANCELLED 0x09
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_FAN_TEST */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_WRITE_TO_SYSTEM_DISPLAY 0x02
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_BIOS */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_BIOS_POST_STATE 0x09
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_CPU_INFO 0x15
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_SYSTEM */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SYSTEM_STATUS 0x10
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_EEPROM_VERSION_INFO 0x12
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SEL_ENTRY_LONG_TEXT 0x43
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SEL_ENTRY_TEXT 0x45
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_IDENTIFY_LED 0xB0
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_IDENTIFY_LED 0xB1
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_ERROR_LED 0xB3
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_RESET_NONVOLATILE_CFG_VARIABLES_TO_DEFAULT 0xDF
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_RESET_CONFIGSPACE_VARIABLES_TO_DEFAULT 0xE0
|
||||
|
||||
/* w/ IPMI_CMD_OEM_FUJITSU_GET_REMOTE_STORAGE_CONNECTION_OR_STATUS */
|
||||
/* achu: making up names, not listed in documents */
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_REMOTE_STORAGE_CONNECTED 0x01
|
||||
#define IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_REMOTE_STORAGE_STATUS 0x02
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_ON_SOURCE */
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_SOFTWARE_OR_COMMAND 0x00
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_POWER_SWITCH 0x01
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_AUTOMATIC_RESTART_AFTER_POWER_FAILURE 0x02
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_CLOCK_OR_TIMER 0x03
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_AUTOMATIC_RESTART_AFTER_FAN_FAILURE_SHUTDOWN 0x04
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_AUTOMATIC_RESTART_AFTER_CRITICAL_TEMPERATURE_SHUTDOWN 0x05
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_AFTER_WATCHDOG_TIMEOUT 0x08
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REMOTE_ON 0x09
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_AFTER_A_CPU_ERROR 0x0C
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_BY_HARDWARE_RESET 0x15
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_AFTER_WARM_START 0x16
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_POWERED_ON_BY_A_PCI_BUS_POWER_MANAGEMENT_EVENT 0x1A
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_POWERED_ON_BY_REMOTE_CONTROL_VIA_REMOTE_MANAGER 0x1D
|
||||
#define IPMI_OEM_FUJITSU_POWER_ON_SOURCE_REBOOT_RESET_BY_REMOTE_CONTROL_VIA_REMOTE_MANAGER 0x1E
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_POWER_OFF_SOURCE */
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_SOFTWARE 0x00
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_POWER_SWITCH 0x01
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_AC_POWER_FAIL 0x02
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_CLOCK_OR_TIMER 0x03
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_FAN_FAILURE 0x04
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_CRITICAL_TEMPERATURE 0x05
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_FINAL_POWER_OFF_AFTER_REPEATED_WATCHDOG_TIMEOUTS 0x08
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_FINAL_POWER_OFF_AFTER_REPEATED_CPU_ERRORS 0x0C
|
||||
#define IPMI_OEM_FUJITSU_POWER_OFF_SOURCE_POWERED_OFF_BY_REMOTE_CONTROL_VIA_REMOTE_MANAGER 0x1D
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SYSTEM_STATUS */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SYSTEM_POWER_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SYSTEM_POWER_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SEL_ENTRIES_AVAILABLE_BITMASK 0x10
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SEL_ENTRIES_AVAILABLE_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_WATCHDOG_ACTIVE_BITMASK 0x04
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_WATCHDOG_ACTIVE_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_AGENT_CONNECTED_BITMASK 0x02
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_AGENT_CONNECTED_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_POST_STATE_BITMASK 0x01
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_POST_STATE_SHIFT 0
|
||||
|
||||
/* rename from "localize" */
|
||||
/* Bit 7 */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_LOCAL_LED_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_LOCAL_LED_SHIFT 7
|
||||
/* Bit 6..4 currently undefined */
|
||||
|
||||
/* Bit 3..2 */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_CSS_LED_BITMASK 0x0C
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_CSS_LED_SHIFT 2
|
||||
|
||||
/* Bit 1..0 */
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_GLOBAL_ERROR_LED_BITMASK 0x03
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_SIGNALING_GLOBAL_ERROR_LED_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_NEW_SEL_ENTRY_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_NEW_SEL_ENTRY_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_SEL_CLEARED_BITMASK 0x40
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SEL_MODIFIED_SEL_CLEARED_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SDR_MODIFIED_BITMASK 0x20
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_SDR_MODIFIED_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NONVOLATILE_IPMI_VARIABLE_MODIFIED_BITMASK 0x10
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NONVOLATILE_IPMI_VARIABLE_MODIFIED_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_CONFIGSPACE_MODIFIED_BITMASK 0x08
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_CONFIGSPACE_MODIFIED_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NEW_OUTPUT_ON_LOCALVIEW_DISPLAY_BITMASK 0x01
|
||||
#define IPMI_OEM_FUJITSU_SYSTEM_STATUS_NOTIFICATIONS_NEW_OUTPUT_ON_LOCALVIEW_DISPLAY_SHIFT 0
|
||||
|
||||
/* achu: not defined in Fujitsu docs. "off" is confirmed to be
|
||||
* correct, but "on" and "blink" are being gussed based on ordering of
|
||||
* error leds in LED sections.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_CSS_LED_OFF 0x0
|
||||
#define IPMI_OEM_FUJITSU_CSS_LED_ON 0x1
|
||||
#define IPMI_OEM_FUJITSU_CSS_LED_BLINK 0x2
|
||||
|
||||
/* achu: not defined in Fujitsu docs. "off" is confirmed to be
|
||||
* correct, but "on" and "blink" are being gussed based on ordering of
|
||||
* error leds in LED sections.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_GLOBAL_ERROR_LED_OFF 0x0
|
||||
#define IPMI_OEM_FUJITSU_GLOBAL_ERROR_LED_ON 0x1
|
||||
#define IPMI_OEM_FUJITSU_GLOBAL_ERROR_LED_BLINK 0x2
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_EEPROM_VERSION_INFO */
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_NUMBER_MIN 0
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_NUMBER_MAX 1
|
||||
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_CHECKSUM_OK 0x01
|
||||
#define IPMI_OEM_FUJITSU_EEPROM_CHECKSUM_ERROR 0x00
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_SEL_ENTRY_LONG_TEXT */
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S1_MAX_READ_LENGTH 32
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S2_MAX_READ_LENGTH 100
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S1_MAX_DATA_LENGTH 80
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_IRMC_S2_MAX_DATA_LENGTH 100
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_MAX_READ_LENGTH 100
|
||||
#define IPMI_OEM_FUJITSU_SEL_ENTRY_LONG_TEXT_MAX_DATA_LENGTH 100
|
||||
|
||||
/*
|
||||
* CSS (Customer Self Service)
|
||||
*
|
||||
* If the component is marked as CSS, the customer can replace it by
|
||||
* himself without a service technican (e.g. Memory DIMM etc.) CSS is
|
||||
* combined with the severity information.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_CSS_BITMASK 0x80
|
||||
#define IPMI_OEM_FUJITSU_CSS_SHIFT 7
|
||||
|
||||
/*
|
||||
* Severity of a decoded event. All events should have an assigned severity.
|
||||
*/
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_BITMASK 0x70
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_FUJITSU_CSS_COMPONENT 1
|
||||
#define IPMI_OEM_FUJITSU_NO_CSS_COMPONENT 0
|
||||
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_INFORMATIONAL 0
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_MINOR 1
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_MAJOR 2
|
||||
#define IPMI_OEM_FUJITSU_SEVERITY_CRITICAL 3
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_SET_IDENTIFY_LED / IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_IDENTIFY_LED */
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_ON 0x1
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_OFF 0x0
|
||||
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_BITMASK 0x01
|
||||
#define IPMI_OEM_FUJITSU_IDENTIFY_LED_SHIFT 0
|
||||
|
||||
/* IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_GET_ERROR_LED */
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_OFF_GEL_OFF 0
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_OFF_GEL_ON 1
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_OFF_GEL_BLINK 2
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_ON_GEL_OFF 3
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_ON_GEL_ON 4
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_ON_GEL_BLINK 5
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_BLINK_GEL_OFF 6
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_BLINK_GEL_ON 7
|
||||
#define IPMI_OEM_FUJITSU_ERROR_LED_CSS_BLINK_GEL_BLINK 8
|
||||
|
||||
/* w/ IPMI_OEM_FUJITSU_COMMAND_SPECIFIER_REMOTE_STORAGE_STATUS */
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_CONNECTION_MIN 0
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_CONNECTION_MAX 1
|
||||
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_CONNECTED 0x01
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_NOT_CONNECTED 0x00
|
||||
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_INVALID_UNKNOWN 0x00
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_IDLE 0x01
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTION_ATTEMPT_PENDING 0x02
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTED 0x03
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTION_ATTEMPTS_RETRIES_EXHAUSTED_FAILED 0x04
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_CONNECTION_LOST 0x05
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_STATUS_DISCONNECT_PENDING 0x06
|
||||
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_INVALID_UNKNOWN 0x00
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_STORAGE_SERVER_IPMI 0x01
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_APPLET 0x02
|
||||
#define IPMI_OEM_FUJITSU_REMOTE_STORAGE_TYPE_NONE_NOT_CONNECTED 0x03
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,132 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_IBM_SPEC_H
|
||||
#define IPMI_OEM_IBM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IBM x3455/x3755
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_IBM_GET_LED */
|
||||
|
||||
#define IPMI_OEM_IBM_LED_STATE_INACTIVE 0x0
|
||||
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_LED 0x1
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_SENSOR 0x2
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_USER 0x3
|
||||
#define IPMI_OEM_IBM_LED_ACTIVE_BY_BIOS_OR_ADMINISTRATOR 0x4
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3455_LOCATION 0x1
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU 0x0010
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU1 0x0030
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU2 0x0031
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU3 0x0032
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU4 0x0033
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU1_BOARD 0x00B8
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU2_BOARD 0x00B9
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU3_BOARD 0x00BA
|
||||
#define IPMI_OEM_IBM_LED_X3755_CPU4_BOARD 0x00BB
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_1 0x0060
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_2 0x0061
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_3 0x0062
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_4 0x0063
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_5 0x0064
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_6 0x0065
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_7 0x0066
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_8 0x0067
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_9 0x0068
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_10 0x0069
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_11 0x006A
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_12 0x006B
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_13 0x006C
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_14 0x006D
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_15 0x006E
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_16 0x006F
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_17 0x00C0
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_18 0x00C1
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_19 0x00C2
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_20 0x00C3
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_21 0x00C4
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_22 0x00C5
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_23 0x00C6
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_24 0x00C7
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_25 0x00C8
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_26 0x00C9
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_27 0x00CA
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_28 0x00CB
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_29 0x00CC
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_30 0x00CD
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_31 0x00CE
|
||||
#define IPMI_OEM_IBM_LED_X3755_DIMM_32 0x00CF
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN 0x0014
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_1 0x0050
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_2 0x0051
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_3 0x0052
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_4 0x0053
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_5 0x0054
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_6 0x0055
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_7 0x0056
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAN_8 0x0057
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI 0x0020
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_1 0x0070
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_2 0x0071
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_3 0x0072
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_4 0x0073
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_5 0x0074
|
||||
#define IPMI_OEM_IBM_LED_X3755_PCI_6 0x0075
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_SERVERAID_8K_BATT 0x00D0
|
||||
#define IPMI_OEM_IBM_LED_X3755_SERVERAID_8K_ERR 0x00D1
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_ALERT 0x00D9
|
||||
#define IPMI_OEM_IBM_LED_X3755_BK_BLUE 0x00D8
|
||||
#define IPMI_OEM_IBM_LED_X3755_BOARD 0x000E
|
||||
#define IPMI_OEM_IBM_LED_X3755_CNFG 0x0006
|
||||
#define IPMI_OEM_IBM_LED_X3755_DASD 0x0013
|
||||
#define IPMI_OEM_IBM_LED_X3755_FAULT 0x0000
|
||||
#define IPMI_OEM_IBM_LED_X3755_HTX 0x00B0
|
||||
#define IPMI_OEM_IBM_LED_X3755_INFO 0x0003
|
||||
#define IPMI_OEM_IBM_LED_X3755_LOCATION 0x0001
|
||||
#define IPMI_OEM_IBM_LED_X3755_MEM 0x0015
|
||||
#define IPMI_OEM_IBM_LED_X3755_NMI 0x0019
|
||||
#define IPMI_OEM_IBM_LED_X3755_OVERSPEC 0x001B
|
||||
#define IPMI_OEM_IBM_LED_X3755_RAID 0x000F
|
||||
#define IPMI_OEM_IBM_LED_X3755_SEER 0x000B
|
||||
#define IPMI_OEM_IBM_LED_X3755_SP 0x001E
|
||||
#define IPMI_OEM_IBM_LED_X3755_TEMP 0x001C
|
||||
#define IPMI_OEM_IBM_LED_X3755_VRM 0x0011
|
||||
|
||||
#define IPMI_OEM_IBM_LED_X3755_UNKNOWN1 0x0040
|
||||
#define IPMI_OEM_IBM_LED_X3755_UNKNOWN2 0x0041
|
||||
#define IPMI_OEM_IBM_LED_X3755_UNKNOWN3 0x0047
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_IBM_SPEC_H */
|
@ -0,0 +1,112 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_INTEL_SPEC_H
|
||||
#define IPMI_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_RESTORE_CONFIGURATION */
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_OPERATION_INITIATE_RESTORE 0xAA
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_OPERATION_GET_RESTORE_STATUS 0x00
|
||||
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_RESTORE_PROGRESS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_INTEL_RESTORE_CONFIGURATION_RESTORE_PROGRESS_RESTORE_COMPLETED 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_SET_SMTP_CONFIGURATION / IPMI_CMD_OEM_INTEL_GET_SMTP_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_ENABLE_SMTP 0x00
|
||||
/* MS byte first */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_SERVER_ADDRESS 0x01
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_USER_NAME 0x02
|
||||
/* write only */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_USER_PASSWORD 0x03
|
||||
/* read only */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_NUMBER_OF_DESTINATIONS 0x04
|
||||
/* max 2 blocks - doc says 64 bytes, but 2 blocks appears to be correct */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_EMAIL_ADDRESS 0x05
|
||||
/* max 2 blocks */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SUBJECT 0x06
|
||||
/* max 4 blocks */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_MESSAGE_CONTENT 0x07
|
||||
/* max 4 blocks according to doc, but according to firmware max 1 block when you write */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SENDER_EMAIL_ADDRESS 0x08
|
||||
/* max 2 blocks */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_HOST_NAME 0x09
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_STRING_BLOCK_LENGTH 16
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_USER_NAME_MAX_BLOCKS 1
|
||||
/* XXX: document says max 20 bytes, but fails on second block, so we use 1 block */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_USER_PASSWORD_MAX_BLOCKS 1
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_EMAIL_ADDRESS_MAX_BLOCKS 2
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SUBJECT_MAX_BLOCKS 2
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_MESSAGE_CONTENT_MAX_BLOCKS 4
|
||||
/* XXX: document indicates 2 blocks, but firmware has errors on > 1 block, so we use 1 block */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SENDER_EMAIL_ADDRESS_MAX_BLOCKS 1
|
||||
/* XXX: document indicates 2 blocks, but firmware has errors on > 1 block, so we use 1 block */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_HOST_NAME_MAX_BLOCKS 1
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_STRING_LENGTH_MAX (4*IPMI_OEM_INTEL_SMTP_STRING_BLOCK_LENGTH)
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_USER_PASSWORD_LENGTH_MAX 20
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_VALID(__value) \
|
||||
(((__value + 1) >= (IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_ENABLE_SMTP + 1) \
|
||||
&& (__value) <= IPMI_OEM_INTEL_SMTP_CONFIGURATION_PARAMETER_SMTP_HOST_NAME) ? 1 : 0)
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_NO_SET_SELECTOR 0x0
|
||||
#define IPMI_OEM_INTEL_SMTP_CONFIGURATION_NO_BLOCK_SELECTOR 0x0
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_ENABLE_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_SMTP_ENABLE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_SMTP_ENABLE 0x1
|
||||
#define IPMI_OEM_INTEL_SMTP_DISABLE 0x0
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_SET_POWER_RESTORE_DELAY / IPMI_CMD_OEM_INTEL_GET_POWER_RESTORE_DELAY */
|
||||
#define IPMI_OEM_INTEL_POWER_RESTORE_DELAY_MSB_MASK 0x07
|
||||
#define IPMI_OEM_INTEL_POWER_RESTORE_DELAY_LSB_MASK 0xFF
|
||||
|
||||
#define IPMI_OEM_INTEL_POWER_RESTORE_DELAY_MAX 0x07FF
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INTEL_GET_BMC_SERVICE_STATUS / IPMI_CMD_OEM_INTEL_CONTROL_BMC_SERVICES */
|
||||
|
||||
#define IPMI_OEM_INTEL_DISABLE_SERVICES 0x00
|
||||
#define IPMI_OEM_INTEL_ENABLE_SERVICES 0x01
|
||||
|
||||
#define IPMI_OEM_INTEL_STANDARD_SERVICES_SSH 0x80
|
||||
#define IPMI_OEM_INTEL_STANDARD_SERVICES_HTTP 0x20
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,332 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
/* achu: all named from doc except 'lan' configuration id, which I assumed names */
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_GET_EXTENDED_CONFIGURATION / IPMI_OEM_INVENTEC_SET_EXTENDED_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_NIC 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_SOL 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_SECURITY 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_ACCOUNT_STATUS 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_DNS 0x06
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_WEB_SERVER_CONFIGURATION 0x0C
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_FIRMWARE_LOG 0x0E
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_FIRMWARE_INFORMATION 0x0F
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_FIRMWARE_UPDATE 0x10
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIGURATION_ID_POWER_MANAGEMENT 0x11
|
||||
|
||||
/* nic status - 1 byte, 0 = shared, 1 = dedicated
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_NIC_MODE 0x01
|
||||
|
||||
/* sol idle timeout - 2 bytes, ls byte first, 0h = no timeout, default = 01h
|
||||
*
|
||||
* telnet/ssh redirect enable - 1 byte, 0 = disable, 1 = enabled
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SOL_SOL_IDLE_TIMEOUT 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_SSH_REDIRECT_ENABLE 0x02
|
||||
|
||||
/* service disabled - 1 byte, bitmask
|
||||
* - 0x01 = all service except IPMI are disabled
|
||||
* (takes precedence over other bits)
|
||||
* - 0x02 = KVM/Virtual Storage
|
||||
* - 0x04 = HTTP/HTTPS
|
||||
* - 0x08 = SSH/Telnet
|
||||
*
|
||||
* max authentication failures - 1 byte, 0 = disable
|
||||
*
|
||||
* lockout window - 2 bytes, in seconds, 0 = disable, default = 180
|
||||
*
|
||||
* lockout time - 2 bytes, in seconds, 0 = disable, default = 3600
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_MAX_AUTHENTICATION_FAILURES 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_LOCKOUT_WINDOW 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_LOCKOUT_TIME 0x04
|
||||
|
||||
/* number of user - 1 byte, read only
|
||||
*
|
||||
* number of enabled user - 1 byte, read only
|
||||
*
|
||||
* user name - 1-17 bytes, read only
|
||||
* - Inventec 5441/Xanadu II - reports stored as p-string, does not return p-string
|
||||
* - Inventec 5442/Xanadu III - returns as p-string
|
||||
*
|
||||
* account status - 1 byte
|
||||
* - 0x00 - status unspecified
|
||||
* - 0x01 - enabled via set user password
|
||||
* - 0x02 - disabled via set user password
|
||||
* - 0x03 - user id is lockout
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_USER 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_ENABLED_USER 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_USER_NAME 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS 0x04
|
||||
|
||||
/* DNS DHCP enable - 1 byte, 0 - false, 1 - true
|
||||
* - DNS server IP addresses should be assigned from DHCP server
|
||||
*
|
||||
* DNS Server1 - 4 bytes
|
||||
* - IP address for DNS server 1, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Server2 - 4 bytes
|
||||
* - IP address for DNS server 2, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Register BMC - 0 - false, 1 - true
|
||||
* - Enable registering the BMC host name on the DNS server
|
||||
*
|
||||
* DNS BMC Host Name - 1-64 bytes
|
||||
* - Specifies the DNS BMC host name, read only if DNS Register BMC is TRUE.
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Domain Name DHCP Enable - 1 byte
|
||||
* - DNS domain name should be assigned from DHCP
|
||||
*
|
||||
* DNS Domain Name - 1-256 bytes
|
||||
* - DNS domain name string, read only if DNS Domain Name DHCP Enable is TRUE
|
||||
* - Stored as P-string
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DHCP_ENABLE 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER1 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER2 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTER_BMC 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME_DHCP_ENABLE 0x06
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME 0x07
|
||||
|
||||
/* web server enabled - 1 byte, 0 = false, 1 = true (default)
|
||||
*
|
||||
* max web sessions - 1 byte, read only
|
||||
*
|
||||
* active web sessions - 1 byte, read only
|
||||
*
|
||||
* web server timeout - 4 bytes, in seconds, 0 = disable, range 60-1920, default 300
|
||||
*
|
||||
* http port num - 2 bytes, default 80
|
||||
*
|
||||
* https port num - 2 bytes, default 443
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_ENABLED 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_MAX_WEB_SESSIONS 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_ACTIVE_WEB_SESSIONS 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_TIMEOUT 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTP_PORT_NUM 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTPS_PORT_NUM 0x06
|
||||
|
||||
/* entity - 1 byte (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* update date / time - 3 bytes, from 0:00 1/1/08, lsbyte first
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_ENTITY 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_FIRMWARE_VERSION 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BRANCH 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BUILD_INFORMATION 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_UPDATE_DATE_TIME 0x05
|
||||
|
||||
/* name - 1-16 bytes (read only)
|
||||
*
|
||||
* description - 1-256 bytes (read only)
|
||||
*
|
||||
* entity - 1 byte (read only)
|
||||
*
|
||||
* product info - 1-64 bytes (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH 0x06
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION 0x07
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME_LEN 16
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION_LEN 256
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO_LEN 64
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION_LEN 16
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH_LEN 16
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION_LEN 16
|
||||
|
||||
/* remote update enable - 1 byte, ??
|
||||
*
|
||||
* protocol - 1 byte, bitmask, 7:3 reserved, 2 : http, 1: ftp, 0: tftp (read only)
|
||||
*
|
||||
* uri - 1-256 bytes
|
||||
* note - first char should be a file or unit separator
|
||||
*
|
||||
* connection retry - 1 byte, 0 = no retries
|
||||
*
|
||||
* retry interval - 1 byte, in 5 second increments
|
||||
*
|
||||
* delay time - 1 byte, in seconds, 0h = immediate, ffh = random between 5 and 10
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_CONNECTION_RETRY 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL 0x05
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME 0x06
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL_INCREMENTS 5
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI_LEN 256
|
||||
|
||||
/* power management enable - 1 byte, bit 7: 0 = disable, 1 = enable, reset reserved
|
||||
*
|
||||
* power staggery ac recovery - 1 byte, 0x00 = immediate power on
|
||||
* (default), 0x01 = auto, random between min and max below, 0x02 =
|
||||
* user defined, must be between min and max below
|
||||
*
|
||||
* power on delay - 2 bytes
|
||||
*
|
||||
* minimum power on delay - 2 bytes (read only)
|
||||
*
|
||||
* maximum power on delay - 2 bytes
|
||||
*/
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_ON_DELAY 0x03
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MINIMUM_POWER_ON_DELAY 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MAXIMUM_POWER_ON_DELAY 0x05
|
||||
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_READ_ALL_BYTES 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_NIC_MODE */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_NIC_MODE_SHARED 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_NIC_MODE_DEDICATED 0x01
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_ENABLE_ALL 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_ALL 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_KVM_VIRTUAL_STORAGE 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_HTTP_HTTPS 0x04
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SSH_TELNET 0x08
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_UNSPECIFIED 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_ENABLED 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_DISABLED 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_ACCOUNT_STATUS_LOCKOUT 0x03
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_DNS_DNS_BMC_HOST_NAME_MAX 64
|
||||
|
||||
/* IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_DNS_DNS_DOMAIN_NAME_MAX 256
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_BMC 0
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_SYSTEM_BIOS 1
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_PDB 2
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_FCB 3
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_TFTP 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_FTP 0x02
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_HTTP 0x04
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_FIRMWARE_UPDATE_DELAY_TIME_RANDOM 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE */
|
||||
/* DPNM = Dynamic Power Node Management */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_BITMASK 0x80
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_SHIFT 7
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_ENABLE 1
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_DISABLE 0
|
||||
|
||||
/* w/ IPMI_OEM_INVENTEC_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY */
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_IMMEDIATE 0x00
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_AUTO 0x01
|
||||
#define IPMI_OEM_INVENTEC_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_USER_DEFINED 0x02
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_UPDATE_FIRMARE */
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_INTERFACE_SYSTEM_INTERFACE 0x00
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_INTERFACE_NETWORKING 0x01
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_INTERFACE_USB 0x02
|
||||
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_BITMASK 0x80
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_FORCE_UPDATE 1
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_UPDATE_TYPE_NORMAL_UPDATE 0
|
||||
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_OEM_DELL_CONFIG_PRESERVE 0x00
|
||||
#define IPMI_OEM_INVENTEC_UPDATE_FIRMWARE_OEM_DELL_CONFIG_NOPRESERVE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_GET_UPDATE_STATUS */
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_TRANSMITTING_IMAGE 0x00
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_VALIDATING_IMAGE 0x01
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_PROGRAMMING 0x02
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_READY_TO_ACCEPT_IMAGE 0x03
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_GENERAL_ERROR 0x80
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_CANNOT_ESTABLISH_CONNECTION 0x81
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_PATH_NOT_FOUND 0x82
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_TRANSMISSION_ABORT 0x83
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_CHECKSUM_ERROR 0x84
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_INCORRECT_PLATFORM 0x85
|
||||
#define IPMI_OEM_INVENTEC_GET_UPDATE_STATUS_COMPLETED 0xFF
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_RESTORE_TO_DEFAULTS */
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_RESTORE_FLAG_RESTORE_PARAMETERS_NOT_INCLUDED_BELOW 0x7
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_RESTORE_FLAG_REMAINING_PARAMETERS_STAY_WHAT_IT_IS 0x0
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_RESTORE_FLAG_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_PEF_BITMASK 0x10
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_SERIAL_CONFIGURATION_BITMASK 0x08
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_SOL_CONFIGURATION_BITMASK 0x04
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_LAN_CONFIGURATION_BITMASK 0x02
|
||||
#define IPMI_OEM_INVENTEC_RESTORE_TO_DEFAULTS_USER_ACCOUNTS_BITMASK 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_GET_RESTORE_STATUS */
|
||||
#define IPMI_OEM_INVENTEC_GET_RESTORE_STATUS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_INVENTEC_GET_RESTORE_STATUS_RESTORE_COMPLETE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_INVENTEC_SET_ASSET_TAG */
|
||||
#define IPMI_OEM_INVENTEC_ASSET_TAG_MAX 10
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,331 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
|
||||
/* achu: all named from doc except 'lan' configuration id, which I assumed names */
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_GET_EXTENDED_CONFIGURATION / IPMI_OEM_QUANTA_SET_EXTENDED_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_NIC 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_SOL 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_SECURITY 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_ACCOUNT_STATUS 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_DNS 0x06
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_WEB_SERVER_CONFIGURATION 0x0C
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_FIRMWARE_LOG 0x0E
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_FIRMWARE_INFORMATION 0x0F
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_FIRMWARE_UPDATE 0x10
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIGURATION_ID_POWER_MANAGEMENT 0x11
|
||||
|
||||
/* nic status - 1 byte, 0 = shared, 1 = dedicated
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_NIC_MODE 0x01
|
||||
|
||||
/* sol idle timeout - 2 bytes, ls byte first, 0h = no timeout, default = 01h
|
||||
*
|
||||
* telnet/ssh redirect enable - 1 byte, 0 = disable, 1 = enabled
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SOL_SOL_IDLE_TIMEOUT 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_SSH_REDIRECT_ENABLE 0x02
|
||||
|
||||
/* service disabled - 1 byte, bitmask
|
||||
* - 0x01 = all service except IPMI are disabled
|
||||
* (takes precedence over other bits)
|
||||
* - 0x02 = KVM/Virtual Storage
|
||||
* - 0x04 = HTTP/HTTPS
|
||||
* - 0x08 = SSH/Telnet
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED 0x01
|
||||
|
||||
/* number of user - 1 byte, read only
|
||||
*
|
||||
* number of enabled user - 1 byte, read only
|
||||
*
|
||||
* user name - 1-17 bytes, read only
|
||||
* - Quanta 5441/Xanadu II - reports stored as p-string, does not return p-string
|
||||
* - Quanta 5442/Xanadu III - returns as p-string
|
||||
*
|
||||
* account status - 1 byte
|
||||
* - 0x00 - status unspecified
|
||||
* - 0x01 - enabled via set user password
|
||||
* - 0x02 - disabled via set user password
|
||||
* - 0x03 - user id is lockout
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_USER 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_ENABLED_USER 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_USER_NAME 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS 0x04
|
||||
|
||||
/* DNS DHCP enable - 1 byte, 0 - false, 1 - true
|
||||
* - DNS server IP addresses should be assigned from DHCP server
|
||||
*
|
||||
* DNS Server1 - 4 bytes
|
||||
* - IP address for DNS server 1, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Server2 - 4 bytes
|
||||
* - IP address for DNS server 2, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Register BMC - 0 - false, 1 - true
|
||||
* - Enable registering the BMC host name on the DNS server
|
||||
*
|
||||
* DNS BMC Host Name - 1-64 bytes
|
||||
* - Specifies the DNS BMC host name, read only if DNS Register BMC is TRUE.
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Domain Name DHCP Enable - 1 byte
|
||||
* - DNS domain name should be assigned from DHCP
|
||||
*
|
||||
* DNS Domain Name - 1-256 bytes
|
||||
* - DNS domain name string, read only if DNS Domain Name DHCP Enable is TRUE
|
||||
* - Stored as P-string
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DHCP_ENABLE 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER1 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER2 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTER_BMC 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME_DHCP_ENABLE 0x06
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME 0x07
|
||||
|
||||
/* web server enabled - 1 byte, 0 = false, 1 = true (default)
|
||||
*
|
||||
* max web sessions - 1 byte, read only
|
||||
*
|
||||
* active web sessions - 1 byte, read only
|
||||
*
|
||||
* web server timeout - 4 bytes, in seconds, 0 = disable, range 60-1920, default 300
|
||||
*
|
||||
* http port num - 2 bytes, default 80
|
||||
*
|
||||
* https port num - 2 bytes, default 443
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_ENABLED 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_MAX_WEB_SESSIONS 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_ACTIVE_WEB_SESSIONS 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_TIMEOUT 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTP_PORT_NUM 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTPS_PORT_NUM 0x06
|
||||
|
||||
/* entity - 1 byte (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* update date / time - 3 bytes, from 0:00 1/1/08, lsbyte first
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_ENTITY 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_FIRMWARE_VERSION 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BRANCH 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BUILD_INFORMATION 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_UPDATE_DATE_TIME 0x05
|
||||
|
||||
/* name - 1-16 bytes (read only)
|
||||
*
|
||||
* description - 1-256 bytes (read only)
|
||||
*
|
||||
* entity - 1 byte (read only)
|
||||
*
|
||||
* product info - 1-64 bytes (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH 0x06
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION 0x07
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME_LEN 16
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION_LEN 256
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO_LEN 64
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION_LEN 16
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH_LEN 16
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION_LEN 16
|
||||
|
||||
/* remote update enable - 1 byte, ??
|
||||
*
|
||||
* protocol - 1 byte, bitmask, 7:3 reserved, 2 : http, 1: ftp, 0: tftp (read only)
|
||||
*
|
||||
* uri - 1-256 bytes
|
||||
* note - first char should be a file or unit separator
|
||||
*
|
||||
* connection retry - 1 byte, 0 = no retries
|
||||
*
|
||||
* retry interval - 1 byte, in 5 second increments
|
||||
*
|
||||
* delay time - 1 byte, in seconds, 0h = immediate, ffh = random between 5 and 10
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_CONNECTION_RETRY 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL 0x05
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME 0x06
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL_INCREMENTS 5
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI_LEN 256
|
||||
|
||||
/* power management enable - 1 byte, bit 7: 0 = disable, 1 = enable, reset reserved
|
||||
*
|
||||
* power staggery ac recovery - 1 byte, 0x00 = immediate power on
|
||||
* (default), 0x01 = auto, random between min and max below, 0x02 =
|
||||
* user defined, must be between min and max below
|
||||
*
|
||||
* power on delay - 2 bytes
|
||||
*
|
||||
* minimum power on delay - 2 bytes (read only)
|
||||
*
|
||||
* maximum power on delay - 2 bytes
|
||||
*/
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_ON_DELAY 0x03
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MINIMUM_POWER_ON_DELAY 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MAXIMUM_POWER_ON_DELAY 0x05
|
||||
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_READ_ALL_BYTES 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_NIC_MODE */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_NIC_MODE_SHARED 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_NIC_MODE_DEDICATED 0x01
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_ENABLE_ALL 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_ALL 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_KVM_VIRTUAL_STORAGE 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_HTTP_HTTPS 0x04
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SSH_TELNET 0x08
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_UNSPECIFIED 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_ENABLED 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_DISABLED 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_ACCOUNT_STATUS_LOCKOUT 0x03
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_DNS_DNS_BMC_HOST_NAME_MAX 64
|
||||
|
||||
/* IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_DNS_DNS_DOMAIN_NAME_MAX 256
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_BMC 0
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_SYSTEM_BIOS 1
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_PDB 2
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_FCB 3
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_TFTP 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_FTP 0x02
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_HTTP 0x04
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_FIRMWARE_UPDATE_DELAY_TIME_RANDOM 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_MANAGEMENT_ENABLE */
|
||||
/* DPNM = Dynamic Power Node Management */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_BITMASK 0x80
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_SHIFT 7
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_ENABLE 1
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_MANAGEMENT_ENABLE_DPNM_DISABLE 0
|
||||
|
||||
/* w/ IPMI_OEM_QUANTA_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY */
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_IMMEDIATE 0x00
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_AUTO 0x01
|
||||
#define IPMI_OEM_QUANTA_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_USER_DEFINED 0x02
|
||||
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_RESET_TO_DEFAULTS */
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_RESTORE_FLAG_RESTORE_PARAMETERS_NOT_INCLUDED_BELOW 0x7
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_RESTORE_FLAG_REMAINING_PARAMETERS_STAY_WHAT_IT_IS 0x0
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_RESTORE_FLAG_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_PEF_BITMASK 0x10
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_SERIAL_CONFIGURATION_BITMASK 0x08
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_SOL_CONFIGURATION_BITMASK 0x04
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_LAN_CONFIGURATION_BITMASK 0x02
|
||||
#define IPMI_OEM_QUANTA_RESET_TO_DEFAULTS_USER_ACCOUNTS_BITMASK 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_GET_RESTORE_STATUS */
|
||||
#define IPMI_OEM_QUANTA_GET_RESTORE_STATUS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_QUANTA_GET_RESTORE_STATUS_RESTORE_COMPLETE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_QUANTA_GET_PROCESSOR_INFORMATION */
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_CELERON 0x00
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_PENTIUM_3 0x01
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_PENTIUM_4 0x02
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_XEON 0x03
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_PRESTONIA 0x04
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_NOCONA 0x05
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_OPTERON 0x06
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_DEMPSEY 0x07
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_CLOVERTOWN 0x08
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_TIGERTON 0x09
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_DUNNINGTON 0x0A
|
||||
/* achu: listed as "Hapertown" in spec, assuming typo */
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_HARPERTOWN 0x0B
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_WOLFDALE_DP 0x0C
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_NEHALEM_EP 0x0D
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_WESTMERE_EP 0x0E
|
||||
/* 0x0F-0xFE - Reserved */
|
||||
#define IPMI_OEM_QUANTA_PROCESSOR_TYPE_NO_CPU_PRESENT 0xFF
|
||||
|
||||
/*******************************************
|
||||
* Sun Microsystems *
|
||||
*******************************************/
|
||||
|
||||
/*
|
||||
* Sun 4140
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_SUN_GET_LED / IPMI_CMD_OEM_SUN_SET_LED */
|
||||
#define IPMI_OEM_SUN_LED_MODE_OFF 0
|
||||
#define IPMI_OEM_SUN_LED_MODE_ON 1
|
||||
#define IPMI_OEM_SUN_LED_MODE_STANDBY 2
|
||||
#define IPMI_OEM_SUN_LED_MODE_SLOW 3
|
||||
#define IPMI_OEM_SUN_LED_MODE_FAST 4
|
||||
|
||||
#define IPMI_OEM_SUN_LED_FORCE_GO_THRU_CONTROLLER 0
|
||||
#define IPMI_OEM_SUN_LED_FORCE_DIRECTLY_ACCESS_DEVICE 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
#define IPMI_OEM_SUN_MICROSYSTEMS_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Sun 4140
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_SUN_GET_LED / IPMI_CMD_OEM_SUN_SET_LED */
|
||||
#define IPMI_OEM_SUN_LED_MODE_OFF 0
|
||||
#define IPMI_OEM_SUN_LED_MODE_ON 1
|
||||
#define IPMI_OEM_SUN_LED_MODE_STANDBY 2
|
||||
#define IPMI_OEM_SUN_LED_MODE_SLOW 3
|
||||
#define IPMI_OEM_SUN_LED_MODE_FAST 4
|
||||
|
||||
#define IPMI_OEM_SUN_LED_FORCE_GO_THRU_CONTROLLER 0
|
||||
#define IPMI_OEM_SUN_LED_FORCE_DIRECTLY_ACCESS_DEVICE 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_SUN_MICROSYSTEMS_SPEC_H */
|
@ -0,0 +1,77 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro X8DTG
|
||||
*/
|
||||
|
||||
/* w/ IPMI_CMD_OEM_SUPERMICRO_GENERIC_EXTENSION */
|
||||
#define IPMI_OEM_SUPERMICRO_SUB_COMMAND_BMC_SERVICES 0xF0
|
||||
|
||||
/* w/ IPMI_OEM_SUPERMICRO_SUB_COMMAND_BMC_SERVICES */
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_ACTION_DISABLE 0x00
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_ACTION_ENABLE 0x01
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_ACTION_STATUS 0x02
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_STATUS_DISABLED 0x00
|
||||
#define IPMI_OEM_SUPERMICRO_BMC_SERVICES_STATUS_ENABLED 0x01
|
||||
|
||||
/*
|
||||
* Supermicro X8DTU, X8STi, X9DRW
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_CHANNEL 0x07
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_PS1 0x70
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_PS2 0x72
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_PS3 0x74
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_MAGIC 0x0C
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_GOOD 0x01
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS_BAD 0x00
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_CHANNEL 0x07
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_PS1 0x78
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_PS2 0x7A
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_PS3 0x7C
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_MAGIC 0x78
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_GOOD 0x01
|
||||
#define IPMI_OEM_SUPERMICRO_GET_PMBUS_POWER_SUPPLY_STATUS_BAD 0x00
|
||||
|
||||
/*
|
||||
* Supermicro X10DRU-i+
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_CHANNEL 0x07
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_PS1 0xB0
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_PS2 0xB2
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_MAGIC 0x79
|
||||
/* achu: Both of these mean good ... yeah, makes no sense :P */
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_GOOD1 0x00
|
||||
#define IPMI_OEM_SUPERMICRO_GET_POWER_SUPPLY_STATUS2_GOOD2 0x02
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,437 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* achu: all named from doc except 'lan' configuration id, which I assumed names */
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_GET_EXTENDED_CONFIGURATION / IPMI_OEM_WISTRON_SET_EXTENDED_CONFIGURATION */
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_NIC 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_SOL 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_SECURITY 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_ACCOUNT_STATUS 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_DNS 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_WEB_SERVER_CONFIGURATION 0x0C
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_FIRMWARE_LOG 0x0E
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_FIRMWARE_INFORMATION 0x0F
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_FIRMWARE_UPDATE 0x10
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_POWER_MANAGEMENT 0x11
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_IPV6_SETTING 0xC0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIGURATION_ID_IPV6_TRAP_SETTING 0xC1
|
||||
|
||||
/* nic selection - 1 byte, 0 = shared, 1 = dedicated
|
||||
*
|
||||
* shared nic selection - 1 byte, 0 = reerved, 1 = nic1, ..., 4 = nic4
|
||||
* - for when nic selection is shared
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SELECTION 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION 0x02
|
||||
|
||||
/* sol idle timeout - 2 bytes, ls byte first, 0h = no timeout, default = 01h
|
||||
*
|
||||
* telnet redirect function selection - 1 byte, 0 = disable, 1 = sol enabled , 2 = smash enabled
|
||||
*
|
||||
* ssh redirect function selection - 1 byte, 0 = disable, 1 = sol enabled , 2 = smash enabled
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SOL_IDLE_TIMEOUT 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION 0x03
|
||||
|
||||
/* service disabled - 1 byte, bitmask
|
||||
* - 0x01 = all service except IPMI are disabled
|
||||
* (takes precedence over other bits)
|
||||
* - 0x02 = KVM/Virtual Storage
|
||||
* - 0x04 = HTTP/HTTPS
|
||||
* - 0x08 = SSH
|
||||
* - 0x10 = SNMP v2c agent
|
||||
* - 0x20 = telnet
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED 0x01
|
||||
|
||||
/* number of user - 1 byte, read only
|
||||
*
|
||||
* number of enabled user - 1 byte, read only
|
||||
*
|
||||
* user name - 1-17 bytes, read only
|
||||
* - Wistron 5441/Xanadu II - reports stored as p-string, does not return p-string
|
||||
* - Wistron 5442/Xanadu III - returns as p-string
|
||||
*
|
||||
* account status - 1 byte
|
||||
* - 0x00 - status unspecified
|
||||
* - 0x01 - enabled via set user password
|
||||
* - 0x02 - disabled via set user password
|
||||
* - 0x03 - user id is lockout
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_USER 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_NUMBER_OF_ENABLED_USER 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_USER_NAME 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS 0x04
|
||||
|
||||
/* DNS DHCP enable - 1 byte, 0 - false, 1 - true
|
||||
* - DNS server IP addresses should be assigned from DHCP server
|
||||
*
|
||||
* DNS Server1 - 4 bytes
|
||||
* - IP address for DNS server 1, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Server2 - 4 bytes
|
||||
* - IP address for DNS server 2, read only if DNS DHCP Enable and DHCP are enabled
|
||||
*
|
||||
* DNS Register BMC - 0 - false, 1 - true
|
||||
* - Enable registering the BMC host name on the DNS server
|
||||
*
|
||||
* DNS BMC Host Name - 1-64 bytes
|
||||
* - Specifies the DNS BMC host name, read only if DNS Register BMC is TRUE.
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Domain Name DHCP Enable - 1 byte
|
||||
* - DNS domain name should be assigned from DHCP
|
||||
*
|
||||
* DNS Domain Name - 1-256 bytes
|
||||
* - DNS domain name string, read only if DNS Domain Name DHCP Enable is TRUE
|
||||
* - Stored as P-string
|
||||
*
|
||||
* DNS Registration Delay - 1 byte (range 1-255)
|
||||
* - Delay BMC should take after the IPMI process is up and running.
|
||||
- Default 5 seconds.
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DHCP_ENABLE 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER1 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_SERVER2 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTER_BMC 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME_DHCP_ENABLE 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_REGISTRATION_DELAY 0x08
|
||||
|
||||
/* web server enabled - 1 byte, 0 = false, 1 = true (default)
|
||||
*
|
||||
* max web sessions - 1 byte, read only
|
||||
*
|
||||
* active web sessions - 1 byte, read only
|
||||
*
|
||||
* web server timeout - 4 bytes, in seconds, 0 = disable, range 60-1920, default 300
|
||||
*
|
||||
* http port num - 2 bytes, default 80
|
||||
*
|
||||
* https port num - 2 bytes, default 443
|
||||
*
|
||||
* kvm port num - 2 bytes, default 7578
|
||||
*
|
||||
* telnet port num - 2 bytes, default 23
|
||||
*
|
||||
* ssh port num - 2 bytes, default 22
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_MAX_WEB_SESSIONS 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_ACTIVE_WEB_SESSIONS 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_WEB_SERVER_TIMEOUT 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTP_PORT_NUM 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_HTTPS_PORT_NUM 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_KVM_PORT_NUM 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_TELNET_PORT_NUM 0x08
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_WEB_SERVER_CONFIGURATION_SSH_PORT_NUM 0x09
|
||||
|
||||
/* entity - 1 byte (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* update date / time - 3 bytes, from 0:00 1/1/08, lsbyte first
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_ENTITY 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_FIRMWARE_VERSION 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BRANCH 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_BUILD_INFORMATION 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_LOG_UPDATE_DATE_TIME 0x05
|
||||
|
||||
/* name - 1-16 bytes (read only)
|
||||
*
|
||||
* description - 1-256 bytes (read only)
|
||||
*
|
||||
* entity - 1 byte (read only)
|
||||
*
|
||||
* product info - 1-64 bytes (read only)
|
||||
*
|
||||
* firmware version - 1-16 bytes (read only)
|
||||
*
|
||||
* branch - 1-16 bytes (read only)
|
||||
*
|
||||
* build information - 1-16 bytes (read only)
|
||||
*
|
||||
* user default setting - 1 byte (write only)
|
||||
*
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING 0x08
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_NAME_LEN 16
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_DESCRIPTION_LEN 256
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_PRODUCT_INFO_LEN 64
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_FIRMWARE_VERSION_LEN 16
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BRANCH_LEN 16
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_BUILD_INFORMATION_LEN 16
|
||||
|
||||
/* remote update enable - 1 byte, ??
|
||||
*
|
||||
* protocol - 1 byte, bitmask, 7:3 reserved, 2 : http, 1: ftp, 0: tftp (read only)
|
||||
*
|
||||
* uri - 1-256 bytes
|
||||
* note - first char should be a file or unit separator
|
||||
*
|
||||
* connection retry - 1 byte, 0 = no retries
|
||||
*
|
||||
* retry interval - 1 byte, in 5 second increments, defalut 01h
|
||||
*
|
||||
* delay time - 1 byte, in seconds, 0h = immediate, ffh = random between 5 and 10
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_CONNECTION_RETRY 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME 0x06
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_RETRY_INTERVAL_INCREMENTS 5
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_URI_LEN 256
|
||||
|
||||
/* power staggery ac recovery - 1 byte, 0x00 = immediate power on
|
||||
* (default), 0x01 = auto, random between min and max below, 0x02 =
|
||||
* user defined, must be between min and max below
|
||||
*
|
||||
* power on delay - 2 bytes
|
||||
*
|
||||
* minimum power on delay - 2 bytes (read only)
|
||||
*
|
||||
* maximum power on delay - 2 bytes
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_ON_DELAY 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MINIMUM_POWER_ON_DELAY 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_MAXIMUM_POWER_ON_DELAY 0x05
|
||||
|
||||
/* ipv6 enable - 1 byte, 0 = false, 1 = true
|
||||
*
|
||||
* ipv6 address - 1-40 bytes (read only if autoconfig is true)
|
||||
*
|
||||
* ipv6 gateway ip - 1-40 bytes
|
||||
*
|
||||
* ipv6 prefix length - 1 byte
|
||||
*
|
||||
* ipv6 autoconfig - 1 byte, 0 = false, 1 = true
|
||||
*
|
||||
* ipv6 link local address - 1-40 bytes (read only)
|
||||
*
|
||||
* ipv6 auto dns - 1 byte, 0 = false, 1 = true (can't set to 1 if autoconfig is false)
|
||||
*
|
||||
* ipv6 dns server 1 - 1-40 bytes (can't set if auto dns is true)
|
||||
*
|
||||
* ipv6 dns server 2 - 1-40 bytes (can't set if auto dns is true)
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ADDRESS 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_GATEWAY_IP_ADDRESS 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_PREFIX_LENGTH 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG 0x05
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_LINK_LOCAL_ADDRESS 0x06
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS 0x07
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER1 0x08
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER2 0x09
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ADDRESS_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_GATEWAY_IP_ADDRESS_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_LINK_LOCAL_ADDRESS_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER1_LEN 40
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_DNS_SERVER2_LEN 40
|
||||
|
||||
/* ipv6 snmp trap destination setting - 3 bytes
|
||||
* byte 1 - destination type
|
||||
* byte 2 - alert ack timeout
|
||||
* byte 3 - retries
|
||||
*
|
||||
* ipv6 snmp trap destination address - 1-40 bytes
|
||||
*
|
||||
* number of ipv6 snmp trap desitnations - 1 byte (read only)
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_ADDRESS 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NUMBER_OF_IPV6_SNMP_TRAP_DESTINATION 0x03
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_ADDRESS_LEN 40
|
||||
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_READ_ALL_BYTES 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SELECTION */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_NIC_MODE_SHARED 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_NIC_MODE_DEDICATED 0x01
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION */
|
||||
/* 0h - recommended when nic selection is dedicated */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_RESERVED 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_1 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_2 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_3 0x03
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_NIC_SHARED_NIC_SELECTION_NIC_4 0x04
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION_SOL_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_TELNET_REDIRECT_FUNCTION_SELECTION_SMASH_ENABLED 0x02
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION_SOL_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SOL_SSH_REDIRECT_FUNCTION_SELECTION_SMASH_ENABLED 0x02
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_SECURITY_SERVICE_DISABLED */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_ENABLE_ALL 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_ALL 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_KVM_VIRTUAL_STORAGE 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_HTTP_HTTPS 0x04
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SSH 0x08
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_SNMP_V2C_AGENT 0x10
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_SECURITY_SERVICES_DISABLED_BITMASK_TELNET 0x20
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_ACCOUNT_STATUS_ACCOUNT_STATUS */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_UNSPECIFIED 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_ENABLED 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_DISABLED 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_ACCOUNT_STATUS_LOCKOUT 0x03
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_BMC_HOST_NAME */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_DNS_DNS_BMC_HOST_NAME_MAX 64
|
||||
|
||||
/* IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_DNS_DNS_DOMAIN_NAME */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_DNS_DNS_DOMAIN_NAME_MAX 256
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_ENTITY */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_BMC 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_SYSTEM_BIOS 1
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_PDB 2
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_INFORMATION_ENTITY_FCB 3
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING_SET_DEFAULT 0x0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_INFORMATION_USER_DEFAULT_SETTING_RESTORE_DEFAULT 0x1
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_REMOTE_UPDATE_ENABLE 0x01
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_PROTOCOL */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_TFTP 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_FTP 0x02
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_PROTOCOL_BITMASK_HTTP 0x04
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_FIRMWARE_UPDATE_DELAY_TIME */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_FIRMWARE_UPDATE_DELAY_TIME_RANDOM 0xFF
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_POWER_MANAGEMENT_POWER_STAGGERING_AC_RECOVERY */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_IMMEDIATE 0x00
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_AUTO 0x01
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_CONFIG_POWER_STAGGERING_AC_RECOVERY_USER_DEFINED 0x02
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE_FALSE 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_ENABLE_TRUE 1
|
||||
|
||||
/* w/ #define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG_ENABLE_FALSE 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTOCONFIG_ENABLE_TRUE 1
|
||||
|
||||
/* w/ #define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS_ENABLE_FALSE 0
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SETTING_IPV6_AUTO_DNS_ENABLE_TRUE 1
|
||||
|
||||
/* w/ IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING */
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING_DESTINATION_TYPE_PET IPMI_DESTINATION_TYPE_PET_TRAP_DESTINATION
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING_DESTINATION_TYPE_OEM1 IPMI_DESTINATION_TYPE_OEM1
|
||||
#define IPMI_OEM_WISTRON_EXTENDED_ATTRIBUTE_ID_IPV6_SNMP_TRAP_DESTINATION_SETTING_DESTINATION_TYPE_OEM2 IPMI_DESTINATION_TYPE_OEM2
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_RESET_TO_DEFAULTS */
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_FLAG_RESTORE_PARAMETERS_NOT_INCLUDED_BELOW 0x7
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_FLAG_REMAINING_PARAMETERS_STAY_WHAT_IT_IS 0x0
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_FLAG_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_PEF_BITMASK 0x10
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_SERIAL_CONFIGURATION_BITMASK 0x08
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_SOL_CONFIGURATION_BITMASK 0x04
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_LAN_CONFIGURATION_BITMASK 0x02
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_USER_ACCOUNTS_BITMASK 0x01
|
||||
|
||||
#define IPMI_OEM_WISTRON_RESET_TO_DEFAULTS_RESTORE_ALL_SC_SETTINGS 0xFF
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_GET_RESTORE_STATUS */
|
||||
#define IPMI_OEM_WISTRON_GET_RESTORE_STATUS_RESTORE_IN_PROGRESS 0x00
|
||||
#define IPMI_OEM_WISTRON_GET_RESTORE_STATUS_RESTORE_COMPLETE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_SET_CHASSIS_SERVICE_TAG and IPMI_CMD_OEM_WISTRON_GET_CHASSIS_SERVICE_TAG */
|
||||
#define IPMI_OEM_WISTRON_SC_BMC_COMMUNICATION_PROTOCOL_VERSION 0x01
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_IDENTIFICATION_LED_CONTROLLED_BY_SC_BITMASK 0x01
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_IDENTIFICATION_LED_CONTROLLED_BY_SC_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_FAULT_LED_CONTROLLED_BY_SC_BITMASK 0x02
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_FAULT_LED_CONTROLLED_BY_SC_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_LED_OFF 0x00
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_LED_SOLID_ON 0x01
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_LED_BLINK_ON 0x02
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_GET_CHASSIS_POWER_READINGS */
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_TOTAL_POWER_CONSUMPTION_AVAILABLE_BITMASK 0x01
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_TOTAL_POWER_CONSUMPTION_AVAILABLE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_COOLING_POWER_CONSUMPTION_AVAILABLE_BITMASK 0x02
|
||||
#define IPMI_OEM_WISTRON_CHASSIS_COOLING_POWER_CONSUMPTION_AVAILABLE_SHIFT 1
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_SET_PASSWORD_POLICY
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_PASSWORD_POLICY_DISABLE 0x00
|
||||
#define IPMI_OEM_WISTRON_PASSWORD_POLICY_ENABLE 0x01
|
||||
|
||||
/* w/ IPMI_CMD_OEM_WISTRON_WRITE_PROPRIETARY_STRING
|
||||
* and IPMI_CMD_OEM_WISTRON_READ_PROPRIETARY_STRING
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_PROPRIETARY_STRING_MAX 80
|
||||
#define IPMI_OEM_WISTRON_PROPRIETARY_STRING_BLOCK 16
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,486 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_DELL_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/************************************************
|
||||
* Generic Event Reading Type Code Offsets *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_ABSENT 0x00
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_STANDBY 0x01
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_IPMI_FUNCTION_READY 0x02
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_FULLY_READY 0x03
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_OFFLINE 0x04
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_FAILED 0x05
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_ACTIVE 0x06
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_BOOTING 0x07
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_STATUS_WRITE_PROTECTED 0x08
|
||||
|
||||
/* 0x00 through 0x02 unknown */
|
||||
#define IPMI_GENERIC_EVENT_READING_TYPE_CODE_OEM_DELL_FAILURE_MEMORY_FAILED_TO_TRANSITION_TO_ONLINE 0x03
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_oem_dell_status[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_oem_dell_status_max_index;
|
||||
|
||||
extern const char * const ipmi_generic_event_reading_type_code_oem_dell_failure[];
|
||||
extern unsigned int ipmi_generic_event_reading_type_code_oem_dell_failure_max_index;
|
||||
|
||||
/************************************************
|
||||
* Sensor Type Code Offsets OEM Specific *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_GOOD 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_OTHER 0x01
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_THERMAL_PROTECTION 0x02
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_COOLING_CAPACITY_CHANGE 0x03
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_POWER_CAPACITY_CHANGE 0x04
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_USER_DEFINED_POWER_CAPACITY 0x05
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_HALTED_SYSTEM_POWER_EXCEEDS_CAPACITY 0x06
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS_DEGRADED_SYSTEM_POWER_EXCEEDS_CAPACITY 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_GOOD 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_FAILED_TO_PROGRAM_VIRTUAL_MAC_ADDRESS 0x01
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_DEVICE_OPTION_ROM_FAILED_TO_SUPPORT_LINK_TUNING_OR_FLEX_ADDRESS 0x02
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_FAILED_TO_GET_LINK_TUNING_OR_FLEX_ADDRESS_DATA 0x03
|
||||
|
||||
/* 0x01 not yet published/known */
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_NON_FATAL_ERROR_PCIE_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_NON_FATAL_ERROR_QPI_LINK_DEGRADE 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_FATAL_IO_ERROR_SUCCESSFUL 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_FATAL_IO_ERROR_FATAL_IO_ERROR 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_UPGRADE_SUCCESSFUL 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_UPGRADE_FAILED 0x01
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_system_performance_degradation_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_system_performance_degradation_status_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_link_tuning[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_link_tuning_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_non_fatal_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_non_fatal_error_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_fatal_io_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_fatal_io_error_max_index;
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_dell_upgrade[];
|
||||
extern unsigned int ipmi_sensor_type_oem_dell_upgrade_max_index;
|
||||
|
||||
/************************************************
|
||||
* Sensor Type Code Offsets OEM Extra *
|
||||
************************************************/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_DELL_POST_FATAL_ERROR 0x0F
|
||||
|
||||
/* Other Event Macros */
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_INTRUSION_WHILE_SYSTEM_ON 0x01
|
||||
#define IPMI_SENSOR_TYPE_PHYSICAL_SECURITY_INTRUSION_WHILE_SYSTEM_OFF 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_PSU_COMMUNICATION_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_TEMPERATURE_WARNING 0x02
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_TEMPERATURE_FAULT 0x03
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_UNDER_VOLTAGE_FAULT 0x04
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_VOLTAGE_FAULT 0x05
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OVER_CURRENT_FAULT 0x06
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_FAN_FAULT 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA2_OEM_DELL_OFFSET_CONFIGURATION_ERROR_WATTS_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_ERROR_TYPE_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_WATTS_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_POWER_SUPPLY_EVENT_DATA3_OEM_DELL_OFFSET_CONFIGURATION_ERROR_WATTS_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_SPARE_MODE_BITMASK 0x1
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_RAID_MODE_BITMASK 0x2
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MIRROR_MODE_BITMASK 0x4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_COUNTER_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_COUNTER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MIN 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MAX 0x07
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_VALID(__memory_card) \
|
||||
(((__memory_card + 1) >= (IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MIN + 1) \
|
||||
&& (__memory_card) <= IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_MEMORY_CARD_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MIN 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MAX 0x07
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_VALID(__bank_number) \
|
||||
(((__bank_number + 1) >= (IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MIN + 1) \
|
||||
&& (__bank_number) <= IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_BANK_NUMBER_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MIN 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MAX 0x7F
|
||||
|
||||
/* To avoid gcc warnings, add +1 in comparison */
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_VALID(__bank_number) \
|
||||
(((__bank_number + 1) >= (IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MIN + 1) \
|
||||
&& (__bank_number) <= IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_DIMM_NUMBER_MAX) ? 1 : 0)
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_4_DIMMS_PER_NODE 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_6_DIMMS_PER_NODE 0x09
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_8_DIMMS_PER_NODE 0x0A
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_9_DIMMS_PER_NODE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_12_DIMMS_PER_NODE 0x0C
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_24_DIMMS_PER_NODE 0x0D
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_USE_DATA1_UPPER_NIBBLE 0x0E
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_DELL_NO_CARD 0x0F
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA1_OEM_DELL_DIMMS_PER_PACKAGE_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA1_OEM_DELL_DIMMS_PER_PACKAGE_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA1_OEM_DELL_DIMMS_PER_PACKAGE_3 0x00
|
||||
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA2_OEM_DELL_MANAGEMENT_CONTROLLER_FIRMWARE_REVISION 0x02
|
||||
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA3_OEM_DELL_OTHER 0x00
|
||||
#define IPMI_SENSOR_TYPE_VERSION_CHANGE_EVENT_DATA3_OEM_DELL_CPU 0x01
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_BITMASK 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_SHIFT 6
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_SINGLE_HEIGHT 0
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_DOUBLE_HEIGHT 1
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING_EVENT_DATA2_BLADE_FORMAT_DOUBLE_HEIGHT_DOUBLE_WEIGHT 2
|
||||
|
||||
/* device number, function number, bus/slot number apply to multiple
|
||||
* sensor types
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_DEVICE_NUMBER_BITMASK 0xF8
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_DEVICE_NUMBER_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_FUNCTION_NUMBER_BITMASK 0x07
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_FUNCTION_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_FLAG_BITMASK 0x80
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_FLAG_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_BITMASK 0x7F
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_BUS_SLOT_SHIFT 0
|
||||
|
||||
/* option rom macros apply to multiple sensor types */
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_BITMASK 0x80
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_EMBEDDED 0
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SLOT 1
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SLOT_BITMASK 0x7F
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_OPTION_ROM_SLOT_SHIFT 0
|
||||
|
||||
/* BIOS Progress and Fatal Error Codes */
|
||||
/*
|
||||
* 00h and FFh are reserved
|
||||
* Progress codes range from 01h to 7Fh
|
||||
* Fatal error codes range from 80h to FEh
|
||||
* Progress codes less than 3Fh are pre-video activity
|
||||
* Progress codes greather than 40h are post-video activity
|
||||
* Fatal error codes less than BFh indicate pre-video failure
|
||||
* Fatal error codes greater than C0h indicate post-video failure.
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_SYSTEM_POWER_ON 0x01
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_CPU_MICROCODE_LOAD 0x02
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_CHIPSET_INITIALIZATION 0x03
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_MEMORY_CONFIGURATION 0x04
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_SHADOW_BIOS 0x05
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_MULTIPROCESSOR_INITIALIZATION 0x06
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_POST_PROCESSING_START 0x07
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_SMM_MODE_INITIALIZATION 0x08
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_PCI_BUS_ENUMERATION_VIDEO_INITIALIZATION 0x09
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_DISPLAY_SIGN_ON 0x40
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_PCI_CONFIGURATION 0x41
|
||||
#define IPMI_OEM_DELL_BIOS_PROGRESS_CODE_GIVE_CONTROL_TO_OS 0x7F
|
||||
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_NO_MEMORY_DETECTED 0x80
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_MEMORY_DETECTED_BUT_IS_NOT_CONFIGURABLE 0x81
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_MEMORY_CONFIGURED_BUT_NOT_USABLE 0x82
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SYSTEM_BIOS_SHADOW_FAILURE 0x83
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_CMOS_FAILURE 0x84
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_DMA_CONTROLLER_FAILURE 0x85
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_INTERRUPT_CONTROLLER_FAILURE 0x86
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_TIMER_REFRESH_FAILURE 0x87
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_PROGRAMMABLE_INTERVAL_TIMER_ERROR 0x88
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_PARITY_ERROR 0x89
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SIO_FAILURE 0x8A
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_KEYBOARD_CONTROLLER_FAILURE 0x8B
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SMI_INITIALIZATION_FAILURE 0x8C
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_SHUTDOWN_TEST_FAILURE 0xC0
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_POST_MEMORY_TEST_FAILURE 0xC1
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_RAC_CONFIGURATION_FAILURE 0xC2
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_CPU_CONFIGURATION_FAILURE 0xC3
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_INCORRECT_MEMORY_CONFIGURATION 0xC4
|
||||
#define IPMI_OEM_DELL_BIOS_FATAL_ERROR_CODE_GENERAL_FAILURE_AFTER_VIDEO 0xFE
|
||||
|
||||
/*
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_ID_BITMASK 0x03
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_ID_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_LINK_ID_BITMASK 0x0C
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_REPORTING_AGENT_LINK_ID_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_AGENT_ID_BITMASK 0x30
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_AGENT_ID_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_LINK_ID_BITMASK 0xC0
|
||||
#define IPMI_OEM_DELL_EVENT_DATA2_QPI_LINK_ERROR_PARTNER_LINK_ID_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_REPORTING_AGENT_TYPE_BITMASK 0x01
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_REPORTING_AGENT_TYPE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_PARTNER_AGENT_TYPE_BITMASK 0x02
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_PARTNER_AGENT_TYPE_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_ERROR_TYPE_BITMASK 0xFC
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_ERROR_TYPE_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_AGENT_TYPE_CPU 0
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_AGENT_TYPE_IOH 1
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_QPI_LINK_ERROR_ERROR_TYPE_LINK_WIDTH_DEGRADED 0
|
||||
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_BIOS_TXT_ERROR 0x00
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_PROCESSOR_FIT_TXT_ERROR 0x02
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_BIOS_ACM_TXT_ERROR 0x03
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_SINIT_ACM_TXT_ERROR 0x04
|
||||
/* achu: TT instead of TXT in spec, assume typo */
|
||||
#define IPMI_OEM_DELL_EVENT_DATA3_TXT_ERROR_TYPE_UNRECOGNIZED_TXT_ERROR 0xFF
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_VT_CONFIGURATION_INVALID 0x01
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_TPM_CONFIGURATION_INVALID 0x02
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_FIT_CRTM_ERROR 0x03
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_BIOS_ACM_ERROR 0x04
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_SINIT_ACM_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ERROR_STATUS_TPM_PROVISIONING_ERROR 0x06
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_LEGACY_SHUTDOWN 0x0A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_BAD_ACM_TYPE 0x0B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_UNSUPPORTED_ACM 0x0C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_AUTHENTICATE_FAIL 0x0D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_BAD_ACM_FORMAT 0x0E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_UNEXPECTED_HITM 0x0F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_ILLEGAL_EVENT 0x10
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_BAD_JOIN_FORMAT 0x11
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_UNRECOVERABLE_MC_ERROR 0x12
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_VMX_ABORT 0x13
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_ACM_CORRUPT 0x14
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_PROCESSOR_ERROR_STATUS_ILLEGAL_VID_RATIO 0x15
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BIOS_ACM_ENTRY_POINT 0x1E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_HEAP_UNINITIALIZED 0x1F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_DPR_UNINITIALIZED 0x20
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_HEAP_ABOVE_TOP_OF_LOWER_MEMORY 0x21
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_PCIEXBAR_SET_TO_INVALID_VALUE 0x22
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_HEAP_IS_ABOVE_4GB 0x23
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_HEAP_IS_NOT_IN_DPR_REGION 0x24
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TXT_DISABLED_BY_MEANS_OF_TXT_POLICY_BIT 0x25
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_EITHER_STARTUP_ACM_WAS_CALLED_FROM_BIOS_OR_CPU_OFFSET_IN_PCIEXBAR_IS_TOO_LARGE 0x26
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_NON_SUPPORTED_DEVICE_ID 0x27
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MEMORY_IS_NOT_LOCKED 0x28
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_SENTER_USED_TO_LAUNCH_AC_MODULE 0x29
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_START_MTRR_CHECK 0x2A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_1_ERROR 0x2B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_2_ERROR 0x2C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_3_ERROR 0x2D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_4_ERROR 0x2E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_5_ERROR 0x2F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_RULE_6_ERROR 0x30
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_PCIEXBAR_SET_TO_INVALID_SIZE 0x31
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_EXTEND_ATTEMPT 0x32
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_ACCESS_REGISTER_CONTENTS_INVALID 0x33
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_UNABLE_TO_GET_ACCESS_TO_THE_LOCALITY 0x34
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_OUTPUT_BUFFER_FOR_THE_TPM_RESPONSE_TOO_SHORT 0x35
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_INPUT_PARAMETER_FOR_THE_FUNCTION_INVALID 0x36
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_INVALID_RESPONSE_FOR_THE_TPM 0x37
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TIME_OUT_FOR_TPM_RESPONSE 0x38
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_RETURNED_AN_ERROR 0x39
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_NV_RAM_NOT_LOCKED 0x3A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_IS_DISABLED 0x3B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_IS_DEACTIVATED 0x3C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TPM_NV_INDICES_INCORRECTLY_DEFINED 0x3D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LCP_NO_PO_POLICY_DATA_DEFINED 0x3E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_MLE_MISMATC 0x3F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_PLATFORM_CONFIG_MISMATC 0x40
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_SINIT_REVOKED 0x41
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_NPW_NOT_ALLOWED 0x42
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_PO_POLICY_INTEGRITY_FAILED 0x43
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LPC_PS_POLICY_INTEGRITY_FAILED 0x44
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_INTERRUPT_OCCURED 0x45
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_CPU_NOT_SUPPORTED_BY_THIS_ACM 0x46
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_ONE_OF_THE_FIT_TABLE_CHECKS_FAILED 0x47
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_VERIFY_BIOS_FAILED 0x48
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BIOS_POLICY_FAILURE 0x49
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MEMORY_LOCKED_WHEN_CLEARSECRETS_IS_CALLED 0x4A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BIOS_UNTRUSTED_WHEN_CLEARSECRETS_IS_CALLED 0x4B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MEMORY_LOCKED_WHEN_CLEARSECRETS_IS_CALLED2 0x4C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FIT_POLICY_TPM_OR_TXT_POLICY_DATA_BAD 0x4D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FIT_TABLE_END_NOT_BELOW_4GB 0x4E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_DIDNT_FIND_BIOS_STARTUP_RECORD_THAT_INCLUDES_RESET_VECTOR 0x4F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_DIDNT_FIND_BIOS_STARTUP_RECORD_THAT_INCLUDES_FIT_POINTER 0x50
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FOUND_OVERLAP_BETWEEN_BIOS_STARTUP_REGIONS 0x51
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_FOUND_OVERLAP_BETWEEN_A_BIOS_STARTUP_REGION_AND_THE_STARTUP_ACM 0x52
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_SCHECK_CALL 0x53
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_CLEAR_SECRETS_CALL 0x54
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_UNLOCK_CONFIG_CALL 0x55
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_LT_SPAD_ERROR_CONDITION_FOUND_IN_RESET_AUX_CALL 0x56
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_MASK_ERROR_EX_ONLY 0x57
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_MTRR_MAP_ERROR_EX_ONLY 0x58
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_TIMEOUT_WHILE_ACQUIRING_SHARED_RESOURCE_EX_ONLY 0x59
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_BAD_RESOURCE_NUMBER_SPECIFIED_WHEN_ACQUIRING_SHARED 0x5A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_BIOS_ACM_ERROR_STATUS_CPU_REV_IS_NOT_SUPPORTED_BY_THIS_ACM 0x5B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_SINIT_EXIT_ADDRESS 0x64
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LOCK_CONFIG_CALL_TO_BIOS_ACM_NOT_DONE_BY_ALL_SOCKETS 0x65
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MLE_JOIN_ABOVE_4GB 0x66
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_UNINITIALIZED 0x67
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_UNINITIALIZED 0x68
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_REGION_DEFINED_ABOVE_4GB 0x69
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TXT_MEMORY_REGION_DISABLED 0x6A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_NON_SUPPORTED_DEVICE_ID 0x6B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MEMORY_IS_NOT_LOCKED 0x6C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SENTER_USED_TO_LAUNCH_THE_AC_MODULE 0x6D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_START_MTRR_CHECK 0x6E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_1_ERROR 0x6F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_2_ERROR 0x70
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_3_ERROR 0x71
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_4_ERROR 0x72
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_5_ERROR 0x73
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MTRR_RULE_6_ERROR 0x74
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_MTRR_MASK_VALUE 0x75
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_MTRR_MAPPING 0x76
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_SIZE_ERROR 0x77
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_BASE_ERROR 0x78
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_HEAP_SIZE_ERROR 0x79
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_BASE_ERROR 0x7A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_SIZE_ERROR 0x7B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_BAR_OVERLAP 0x7C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_NOT_LOCKED 0x7D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_BAR_SIZE_ERROR 0x7E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_PMR_NOT_PROGRAMMED 0x7F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_LOC_ERROR 0x80
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MCHBAR_LOCATED_ABOVE_4GB 0x81
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SINIT_MEMORY_SPACE_LOCATED_ABOVE_4GB 0x82
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_VERSION_ERROR 0x83
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_LOW_ERROR 0x84
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_LOW_BASE_ERROR 0x85
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_LOW_SIZE_ERROR 0x86
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_HIGH_ERROR 0x87
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_PMR_OVERLAP 0x88
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_ABOVE_PHYSICAL_MEMORY 0x89
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_SIZE_ERROR 0x8A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OS_DATA_REQ_CAPABILITIES_ERROR 0x8B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_POLICY_NOT_IN_DMA_PROTECTED_REGION 0x8C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RSDP_NOT_FOUND 0x8D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RSDP_CHECKSUM_ERROR 0x8E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RSDT_CHECKSUM_ERROR 0x8F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMAR_NOT_FOUND 0x90
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMAR_CHECKSUM_ERROR 0x91
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DRHD_BAR_NOT_FOUND 0x92
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMAR_LENGTH_ERROR 0x93
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DRHD_DEV_SCOPE_ERROR 0x94
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_RMRR_NOT_FOUND 0x95
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DPR_DMAR_OVERLAP 0x96
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MSEG_SIZE_ERROR 0x97
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MSEG_BASE_ERROR 0x98
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_MSEG_DIFF_BASE_ERROR 0x99
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_EXTEND_ATTEMPT 0x9A
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_ACCESS_REGISTER_CONTENTS_INVALID 0x9B
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_UNABLE_TO_GET_ACCESS_TO_THE_LOCALITY 0x9C
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_OUTPUT_BUFFER_FOR_THE_TPM_RESPONSE_TOO_SHORT 0x9D
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INPUT_PARAMETER_FOR_THE_FUNCTION_INVALID 0x9E
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INVALID_RESPONSE_FOR_THE_TPM 0x9F
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TIME_OUT_FOR_TPM_RESPONSE 0xA0
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_RETURNED_AN_ERROR 0xA1
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_NV_RAM_NOT_LOCKED 0xA2
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_IS_DISABLED 0xA3
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_IS_DEACTIVATED 0xA4
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_NV_INDICES_INCORRECTLY_DEFINED 0xA5
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_PCR17_NOT_VALID 0xA6
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_VALUE_IN_PCR17_DOES_NOT_MATCH_EXPECTED_RESULT 0xA7
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_VALUE_IN_PCR18_DOES_NOT_MATCH_EXPECTED_RESULT 0xA8
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_TPM_STARTUP_HAS_ALREADY_BEEN_RUN 0xA9
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TOLM_ERROR 0xAA
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_ALIAS_ERROR 0xAB
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TOHM_ERROR 0xAC
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_SAD_RULES_ERROR 0xAD
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TSEG_ERROR 0xAE
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_PCIEX_BAR_ERROR 0xAF
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_MAD_OVERLAP 0xB0
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_UNCORE_IIO_SAD_ERROR 0xB1
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_TAD_RULES_ERROR 0xB2
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_SAG_ERROR 0xB3
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_RIR_ERROR 0xB4
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_SMRR_ERROR 0xB5
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_SCHECK_CHANNEL_MAPPER_ERROR 0xB6
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_DMA_REMAP_ERROR 0xB7
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_ME_VT_POLICY_ERROR 0xB8
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_NO_PO_POLICY_DATA_DEFINE 0xB9
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_MLE_MISMATCH 0xBA
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_PLATFORM_CONFIG_MISMATCH 0xBB
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_SINIT_REVOKED 0xBC
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_NPW_NOT_ALLOWED 0xBD
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_PO_POLICY_INTEGRITY_FAILED 0xBE
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_LCP_PS_POLICY_INTEGRITY_FAILED 0xBF
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_INTERRUPT_ERROR 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_VTD_TABLE_LARGER_THAN_HEAP_SIZE 0xC1
|
||||
#define IPMI_SENSOR_TYPE_OS_CRITICAL_STOP_OEM_DELL_TXT_ERROR_CODE_SINIT_ACM_ERROR_STATUS_CPU_NOT_SUPPORTED_BY_THIS_ACM 0xC2
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_DELL_SPEC_H */
|
@ -0,0 +1,86 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Fujitsu Siemens Computers
|
||||
* Fujitsu Technology Solutions
|
||||
* iRMC S1 / iRMC S2
|
||||
*/
|
||||
|
||||
/* 0xC0 / IPMI_SENSOR_TYPE_OEM_FUJITSU_I2C_BUS*/
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_i2c_bus[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_i2c_bus_max_index;
|
||||
|
||||
/* 0xDD / IPMI_SENSOR_TYPE_OEM_FUJITSU_SYSTEM_POWER_CONSUMPTION */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_system_power_consumption[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_system_power_consumption_max_index;
|
||||
|
||||
/* 0xDE / IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY_STATUS */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_memory_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_memory_status_max_index;
|
||||
|
||||
/* 0xDF / IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY_CONFIG */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_memory_config[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_memory_config_max_index;
|
||||
|
||||
/* 0xE1 / IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_memory[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_memory_max_index;
|
||||
|
||||
/* 0xE3 / IPMI_SENSOR_TYPE_OEM_FUJITSU_HW_ERROR */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_hw_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_hw_error_max_index;
|
||||
|
||||
/* 0xE4 / IPMI_SENSOR_TYPE_OEM_FUJITSU_SYS_ERROR */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_sys_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_sys_error_max_index;
|
||||
|
||||
/* 0xE6 / IPMI_SENSOR_TYPE_OEM_FUJITSU_FAN_STATUS */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_fan_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_fan_status_max_index;
|
||||
|
||||
/* 0xE8 / IPMI_SENSOR_TYPE_OEM_FUJITSU_PSU_STATUS */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_psu_status[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_psu_status_max_index;
|
||||
|
||||
/* 0xE9 / IPMI_SENSOR_TYPE_OEM_FUJITSU_PSU_REDUNDANCY */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_psu_redundancy[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_psu_redundancy_max_index;
|
||||
|
||||
/* 0xEC / IPMI_SENSOR_TYPE_OEM_FUJITSU_FLASH */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_flash[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_flash_max_index;
|
||||
|
||||
/* 0xEF / IPMI_SENSOR_TYPE_OEM_FUJITSU_CONFIG_BACKUP */
|
||||
extern const char * const ipmi_sensor_type_oem_fujitsu_config_backup[];
|
||||
extern unsigned int ipmi_sensor_type_oem_fujitsu_config_backup_max_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_HP_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_HP_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* HP Proliant DL160 G8
|
||||
*/
|
||||
|
||||
#define IPMI_OEM_HP_UID_LIGHT_ON 0x00
|
||||
#define IPMI_OEM_HP_UID_LIGHT_OFF 0x01
|
||||
#define IPMI_OEM_HP_UID_LIGHT_BLINKING 0x02
|
||||
|
||||
#define IPMI_OEM_HP_HEALTH_LED_GREEN 0x00
|
||||
#define IPMI_OEM_HP_HEALTH_LED_AMBER 0x01
|
||||
#define IPMI_OEM_HP_HEALTH_LED_RED 0x02
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_oem_hp_uid_light[];
|
||||
extern unsigned int ipmi_oem_hp_uid_light_max_index;
|
||||
|
||||
extern const char * const ipmi_oem_hp_health_led[];
|
||||
extern unsigned int ipmi_oem_hp_health_led_max_index;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_HP_SPEC_H */
|
@ -0,0 +1,331 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_POLICY_CORRECTION_TIME_EXCEEDED 0x1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POLICY_INTERFACE_CAPABILITY_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POLICY_INTERFACE_CAPABILITY_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_MONITORING_CAPABILITY_BITMASK 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_MONITORING_CAPABILITY_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POWER_LIMITING_CAPABILITY_BITMASK 0x04
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_EVENT_DATA1_POWER_LIMITING_CAPABILITY_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_NOT_AVAILABLE 0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_CHANGE_EVENT_AVAILABLE 1
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_THRESHOLD_NUMBER_BITMASK 0x03
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_THRESHOLD_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_THRESHOLD_EXCEEDED 0x0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA1_NODE_MANAGER_POLICY_EVENT_POLICY_CORRECTION_TIME_EXCEEDED 0x1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_FIRMWARE_STATUS 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_FIRMWARE_STATUS IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_FIRMWARE_STATUS
|
||||
|
||||
/* Recovery GPIO forced. Recovery Image loaded due to MGPIO pin
|
||||
* asserted. Pin number is configurable in factory presets, Default
|
||||
* recovery pin is MGPIO1. Repair action: Deassert MGPIO1 and reset
|
||||
* the Intel ME
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_RECOVERY_GPIO_FORCED 0x00
|
||||
/* Image execution failed. Recovery Image or backup operational image
|
||||
* loaded because operational image is corrupted. This may be caused
|
||||
* by Flash device corruption or failed upgrade procedure. Repair
|
||||
* action: Either the flash device must be replaced (if error is
|
||||
* persistent) or the upgrade procedure must be started again.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_IMAGE_EXECUTION_FAILED 0x01
|
||||
/* Flash erase error. Error during Flash erasure procedure probably
|
||||
* due to flash part corruption. Repair action: The flash device
|
||||
* must be replaced.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_ERASE_ERROR 0x02
|
||||
/* Flash state information. Repair action: Check extended info byte
|
||||
* in Event Data 3 (byte 7) whether wearout protection is causing this
|
||||
* event. If so, wait until wearout protection expires; otherwise
|
||||
* probably the flash device must be replaced (if error is
|
||||
* persistent).
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_STATE_INFORMATION 0x03
|
||||
/* Internal error. Error during firmware execution - if Event Data 3
|
||||
* (byte 7) contains 0 then FW Watchdog Timeout; otherwise please
|
||||
* contact Intel representative for support. Repair action:
|
||||
* Operational image shall be updated to other version or hardware
|
||||
* board repair is needed (if error is persistent).
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_INTERNAL_ERROR 0x04
|
||||
/* BMC did not respond to cold reset request and Intel ME rebooted
|
||||
* the platform. Repair action: Verify the Intel NM configuration.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_BMC_COLD_RESET_ERROR 0x05
|
||||
/* Direct flash update requested by the BIOS. Intel ME firmware
|
||||
* will switch to recovery mode to perform full update from BIOS.
|
||||
* Repair action: This is transient state. Intel ME firmware should
|
||||
* return to operational mode after successful image update
|
||||
* performed b the BIOS.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_DIRECT_FLASH_UPDATE 0x06
|
||||
/* Manufacturing error. Wrong manufacturing configuration detected
|
||||
* by Intel ME firmware Repair action: The flash device must be
|
||||
* replaced (if error is persistent).
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_MANUFACTURING_ERROR 0x07
|
||||
/* Persistent storage integrity error. Flash file system error
|
||||
* detected. Repair action. If error is persistent, restore
|
||||
* factory presets using "Force ME Recovery" IPMI command or by
|
||||
* doing AC power cycle with Recovery jumper asserted.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_PERSISTENT_STORAGE_INTEGRITY_ERROR 0x08
|
||||
/* Firmware exception. Repair action: Restore factory presets using
|
||||
* "Force ME Recovery" IPMI command or by doing AC power cycle with
|
||||
* Recovery jumper asserted. If this does not clear the issue,
|
||||
* reflash the SPI flash. If the issue persists, provide the
|
||||
* content of Event Data 3 to Intel support team for interpretation.
|
||||
* (Event Data 3 codes are not documented because they only provide
|
||||
* clues that must be interpreted individually.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FIRMWARE_EXCEPTION 0x09
|
||||
/* Flash Wear-Out Protection Warning. Warning threshold for number
|
||||
* of flash operations has been exceeded. Repair action: No immediate
|
||||
* repair action needed. This i sjust a warning event.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_WEAR_OUT_PROTECTION_WARNING 0x0A
|
||||
/* PECI over DMI interface error. This is a notification that PECI
|
||||
* over DMI interface failure was detected and it is not functional
|
||||
* any more. It may indicatethe situation when PECI over DMI was not
|
||||
* configured by BIOS or a defect which may require a CPU Host reset
|
||||
* to recover from.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_PECI_OVER_DMI_INTERFACE_ERROR 0x0D
|
||||
/* MCTP interface error. This is a notification that MCTP interface
|
||||
* failure was detected and it is not functional any more. It may
|
||||
* indicate the situation when MCTP was not configured by BIOS or a
|
||||
* defect which may need a Host reset to recover from. Repair action:
|
||||
* Recovery via CPU Host reset or platform reset.
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_MCTP_INTERFACE_ERROR 0x0E
|
||||
/* Auto-configuration finished. Operational image finished power
|
||||
* source auto-configuration. Repair action: Auto-configuration could
|
||||
* be enforced by restore to factory defaults
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_AUTO_CONFIGURATION_FINISHED 0x0F
|
||||
|
||||
/* Legacy macros, changed b/c of new names in Intel NM 2.0 specification */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FORCED_GPIO_RECOVER IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_RECOVERY_GPIO_FORCED
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_IMAGE_EXECUTION_FAILED IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_IMAGE_EXECUTION_FAILED
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_ERASE_ERROR IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_ERASE_ERROR
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_CORRUPTED IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_FLASH_STATE_INFORMATION
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_INTERNAL_ERROR IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA2_INTERNAL_ERROR
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_IMAGE_CORRUPTED 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_FLASH_ERASE_LIMIT_REACHED 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_FLASH_WRITE_LIMIT_REACHED 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_FLASH_STATE_INFORMATION_WRITING_TO_FLASH_ENABLED 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_FW_WATCHDOG_TIMEOUT 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_LOADER_MANIFEST_VALIDATION_FAILURE 0x1D
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_UNKNOWN_POWER_MANAGEMENT_EVENT 0x37
|
||||
/* Spec says "None graceful", assuming typo */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_NON_GRACEFUL_PMC_RESET_EVENT 0x45
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_INTERNAL_ERROR_FLASH_WEAROUT_PROTECTION 0x8E
|
||||
|
||||
#if 0
|
||||
/* In Intel Node Manager 2.0 spec this was 0x04, but changed in 3.0 spec */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_INTEL_ME_FW_CONFIGURATION_BAD 0x04
|
||||
#endif
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_GENERIC_ERROR 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_OR_MISSING_VSCC_TABLE 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_SENSOR_SCANNING_PERIOD_IN_PIA 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_DEVICE_DEFINITION_IN_PIA 0x03
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_WRONG_SMART_CLST_CONFIGURATION 0x04
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_INTEL_ME_FW_CONFIGURATION_IS_INCONSISTENT_OR_OUT_OF_RANGE 0x05
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MANUFACTURING_ERROR_PERCENTAGE_OF_FLASH_WRITE_OPERATIONS_WHICH_HAVE_BEEN_CONDUCTED 0x0A
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_DRAM_INIT_DONE_EVENT_NOT_RECEIVED 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_MCTP_SAD_REGISTER_NOT_CORRECTLY_CONFIGURED_BY_BIOS 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_DMI_TIMEOUT_OF_PECI_REQUEST 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_BITMASK 0x80
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS 0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_BITMASK 0x60
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_PSU 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_DC_POWER_SOURCE_ON_BOARD_POWER_SENSOR 0x02
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_BITMASK 0x18
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_PSU 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_ON_BOARD_POWER_SENSOR_PSU_EFFICIENCY 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_CHASSIS_POWER_INPUT_SOURCE_NOT_SUPPORTED 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_BITMASK 0x06
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_PSU 0x01
|
||||
/* Not a typo, jumps to 0x03 */
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_PSU_EFFICIENCY_SOURCE_NOT_SUPPORTED 0x03
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_BMC 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_SUCCESS_UNMANAGED_POWER_SOURCE_ESTIMATED 0x01
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_BITMASK 0x60
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_BMC_DISCOVERY_FAILURE 0x00
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_INSUFFICIENT_FACTORY_CONFIGURATION 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_UNKNOWN_SENSOR_TYPE 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_INTEL_ME_FIRMWARE_HEALTH_EVENT_EVENT_DATA3_AUTO_CONFIGURATION_FINISHED_RESULT_FAILURE_FAILURE_OTHER_ERROR_ENCOUNTERED 0x03
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_SENSOR_NODE_MANAGER 0x02
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_BITMASK 0xF0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_OUTLET_TEMPERATURE_READING_FAILURE 0x8
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_VOLUMETRIC_AIRFLOW_READING_FAILURE 0x9
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_POLICY_MISCONFIGURATION 0xA
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_POWER_SENSOR_READING_FAILURE 0xB
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_INLET_TEMPERATURE_READING_FAILURE 0xC
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_HOST_COMMUNICATION_ERROR 0xD
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_REAL_TIME_CLOCK_SYNCHRONIZATION_FAILURE 0xE
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_EVENT_DATA2_ERROR_TYPE_PLATFORM_SHUTDOWN_INITIATED_BY_INTEL_NM_POLICY 0xF
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_THERMAL_SENSOR_ON_DIMM
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_0_BITMASK 0x01
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_0_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_1_BITMASK 0x02
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_0_MEMORY_CONTROLLER_1_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_0_BITMASK 0x04
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_0_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_1_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_1_MEMORY_CONTROLLER_1_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_0_BITMASK 0x10
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_0_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_1_BITMASK 0x20
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_2_MEMORY_CONTROLLER_1_SHIFT 5
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_0_BITMASK 0x40
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_0_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_1_BITMASK 0x80
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_CPU_3_MEMORY_CONTROLLER_1_SHIFT 7
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_AVAILABLE 0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_NOT_AVAILABLE 1
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_OEM_INTEL_NODE_MANAGER_CUPS_EVENT
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_THRESHOLD_NUMBER_BITMASK 0x03
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_THRESHOLD_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_CUPS_POLICY_EVENT_BITMASK 0x08
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_CUPS_POLICY_EVENT_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA1_CUPS_EVENT_EVENT_THRESHOLD_EXCEEDED 0x0
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA2_DOMAIN_ID_BITMASK 0x0F
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_EVENT_DATA2_DOMAIN_ID_SHIFT 0
|
||||
|
||||
/* Event Reading Type Code = IPMI_EVENT_READING_TYPE_CODE_STATE
|
||||
* Sensor Type = IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER
|
||||
*/
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR_EVENT_DATA2_OFFSET_FROM_SEVERITY_BITMASK 0xF0
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR_EVENT_DATA2_OFFSET_FROM_SEVERITY_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR_EVENT_DATA3_EXTERNAL 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,144 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_INVENTEC_SBE_WARNING_THRESHOLD 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_INVENTEC_SBE_CRITICAL_THRESHOLD 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_INVENTEC_OTHER 0xFF
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH0_DIM1 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH0_DIM0 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH1_DIM1 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH1_DIM0 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH2_DIM1 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU0_CH2_DIM0 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU1_CH0_DIM0 0x11
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU1_CH1_DIM0 0x12
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5441_DIMM_CPU1_CH2_DIM0 0x13
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH0_DIM1 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH0_DIM0 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH1_DIM1 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH1_DIM0 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH2_DIM1 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU0_CH2_DIM0 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH0_DIM1 0x11
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH0_DIM0 0x12
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH1_DIM1 0x13
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH1_DIM0 0x14
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH2_DIM1 0x15
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_INVENTEC_5442_DIMM_CPU1_CH2_DIM0 0x16
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA3_OEM_INVENTEC_PORT80_CODE_EXTENDED_MEMORY_TEST 0x3A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA3_OEM_INVENTEC_PORT80_CODE_SETUP_MENU 0x87
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_EVENT_DATA3_OEM_INVENTEC_PORT80_CODE_OPTION_ROM_SCAN 0x78
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_TIMER_COUNT_READ_WRITE_ERROR 0x0000
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_MASTER_PIC_ERROR 0x0001
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_SLAVE_PIC_ERROR 0x0002
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_BATTERY_ERROR 0x0003
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_DIAGNOSTIC_STATUS_ERROR 0x0004
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_CHECKSUM_ERROR 0x0005
|
||||
/* achu: Inventec 5441 lists "Config Error", while Inventec 5442 lists "Configuration Error"
|
||||
* We'll just keep "Config Error"
|
||||
*/
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_CONFIG_ERROR 0x0006
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_KEYBOARD_LOCK_ERROR 0x0008
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_NO_KEYBOARD_ERROR 0x0009
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_KBC_BAT_TEST_ERROR 0x000A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_MEMORY_SIZE_ERROR 0x000B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_RAM_READ_WRITE_TEST_ERROR 0x000C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_FDD_0_ERROR 0x000E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_FLOPPY_CONTROLLER_ERROR 0x0010
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CMOS_DATE_TIME_ERROR 0x0012
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_NO_PS2_MOUSE_ERROR 0x0014
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_REFRESH_TIMER_ERROR 0x0040
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DISPLAY_MEMORY_ERROR 0x0041
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_POST_THE_INS_KEY_ERROR 0x0043
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DMAC_PAGE_REGISTER_ERROR 0x0044
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DMAC1_CHANNEL_REGISTER_ERROR 0x0045
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DMAC2_CHANNEL_REGISTER_ERROR 0x0046
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PMM_MEMORY_ALLOCATION_ERROR 0x0047
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PASSWORD_CHECK_ERROR 0x0048
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ADM_MODULE_ERROR 0x004A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_LANGUAGE_MODULE_ERROR 0x004B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_KBC_INTERFACE_ERROR 0x004C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_0_ERROR 0x004D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_1_ERROR 0x004E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_2_ERROR 0x004F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_3_ERROR 0x0050
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_4_ERROR 0x0051
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_5_ERROR 0x0052
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_6_ERROR 0x0053
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_HDD_7_ERROR 0x0054
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_0_ERROR 0x0055
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_1_ERROR 0x0056
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_2_ERROR 0x0057
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_3_ERROR 0x0058
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_4_ERROR 0x0059
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_5_ERROR 0x005A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_6_ERROR 0x005B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATAPI_7_ERROR 0x005C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_ATA_SMART_FEATURE_ERROR 0x005D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_NON_CRITICAL_PASSWORD_CHECK_ERROR 0x005E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_DUMMY_BIOS_ERROR 0x00FF
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_HC_NOT_FOUND 0x8101
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_DEVICE_INIT_ERROR 0x8102
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_DEVICE_DISABLED 0x8103
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_OHCI_EMUL_NOT_SUPPORTED 0x8104
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_USB_EHCI_64BIT_DATA_STRUCTURE_ERROR 0x8105
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_SMBIOS_NOT_ENOUGH_SPACE_IN_F000 0x8301
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_AP_APPLICATION_PROCESSOR_FAILED_BIST 0x0110
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU1_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0120
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU2_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0121
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU3_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0122
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU4_THERMAL_FAILURE_DUE_TO_PROCHOT 0x0123
|
||||
/* BSP = Baseboard Service Processor */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PROCESSOR_FAILED_BIST_BSP 0x0150
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU1_PROCESSOR_MISSING_MICROCODE 0x0160
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU2_PROCESSOR_MISSING_MICROCODE 0x0161
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU3_PROCESSOR_MISSING_MICROCODE 0x0162
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPU4_PROCESSOR_MISSING_MICROCODE 0x0163
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_L2_CACHE_SIZE_MISMATCH 0x0192
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPUID_PROCESSOR_STEPPING_ARE_DIFFERENT 0x0193
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPUID_PROCESSOR_FAMILY_ARE_DIFFERENT 0x0194
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_FRONT_SIDE_BUS_MISMATCH 0x0195
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_CPUID_PROCESSOR_MODEL_ARE_DIFFERENT 0x0196
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_PROCESSOR_SPEEDS_MISMATCHED 0x0197
|
||||
/* QPI Mismatch only for Inventec 5442 */
|
||||
/* QPI = Quickpath Interconnect */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_QPI_MISMATCHED 0x0198
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_INVENTEC_POST_ERROR_CODE_UNDEFINED_BIOS_ERROR 0xFFFF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_A0 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_A1 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_A2 0x03
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_B0 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_B1 0x05
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_B2 0x06
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_C0 0x07
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_C1 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_C2 0x09
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_D0 0x0A
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_D1 0x0B
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_D2 0x0C
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_E0 0x0D
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_E1 0x0E
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_E2 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_F0 0x10
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_F1 0x11
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_QUANTA_S99Q_DIMM_F2 0x12
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_DEVICE_NUMBER_BITMASK 0xF8
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_DEVICE_NUMBER_SHIFT 3
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_FUNCTION_NUMBER_BITMASK 0x07
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA2_FUNCTION_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI0_ERROR 0
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI1_ERROR 1
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI2_ERROR 2
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_QPI3_ERROR 3
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_MISCELLANEOUS_ERROR 23
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_QUANTA_EVENT_DATA3_IOH_CORE_ERROR 24
|
||||
|
||||
#define IPMI_OEM_QUANTA_EVENT_DATA
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************
|
||||
* Supermicro *
|
||||
*******************************************/
|
||||
|
||||
/*
|
||||
* Supermicro X7DBR-3 (X7DBR_3)
|
||||
* Supermicro X7DB8
|
||||
* Supermicro X8DTN
|
||||
* Supermicro X7SBI-LN4 (X7SBI_LN4)
|
||||
* Supermicro X8DTH
|
||||
* Supermicro X8DTG
|
||||
* Supermicro X8DTU
|
||||
* Supermicro X8DT3-LN4F (X8DT3_LN4F)
|
||||
* Supermicro X8DTU-6+ (X8DTU_6PLUS)
|
||||
* Supermicro X8DTL
|
||||
* Supermicro X8DTL-3F (X8DTL_3F)
|
||||
* Supermicro X8SIL-F (X8SIL_F)
|
||||
* Supermicro X9SCL
|
||||
* Supermicro X9SCM
|
||||
* Supermicro X8DTN+-F (X8DTNPLUS_F)
|
||||
* Supermicro X8SIE
|
||||
* Supermicro X9SCA-F-O (X9SCA_F_O)
|
||||
* Supermicro H8DGU-F (H8DGU_F)
|
||||
* Supermicro X9DRi-F (X9DRI_F)
|
||||
* Supermicro X9DRI-LN4F+ (X9DRI_LN4F_PLUS)
|
||||
* Supermicro X9SPU-F-O (X9SPU_F_O)
|
||||
* Supermicro X9SCM-iiF (X9SCM_IIF)
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_LOW 0x00
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_MEDIUM 0x01
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_HIGH 0x02
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_OVERHEAT 0x04
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_NOT_INSTALLED 0x07
|
||||
|
||||
/* achu: Different for SEL, I don't know why */
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP_SEL_OVERHEAT 0x02
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,188 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_1 0x00
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_2 0x01
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_3 0x02
|
||||
#define IPMI_SENSOR_TYPE_PROCESSOR_EVENT_DATA2_OEM_WISTRON_PROCESSOR_4 0x04
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_THRESHOLD_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_THRESHOLD_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_SBE_WARNING_THRESHOLD 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_SBE_CRITICAL_THRESHOLD 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_UNSPECIFIED 0x0F
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU_DIMM_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU_DIMM_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU1_DIMM_A 0x00
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU2_DIMM_B 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU3_DIMM_C 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA2_OEM_WISTRON_CPU4_DIMM_D 0x03
|
||||
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_1_BITMASK 0x01
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_2_BITMASK 0x02
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_3_BITMASK 0x04
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_4_BITMASK 0x08
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_5_BITMASK 0x10
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_6_BITMASK 0x20
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_7_BITMASK 0x40
|
||||
#define IPMI_SENSOR_TYPE_MEMORY_EVENT_DATA3_OEM_WISTRON_DIMM_8_BITMASK 0x80
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_DEVICE_NUMBER_BITMASK 0xF8
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_DEVICE_NUMBER_SHIFT 3
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_FUNCTION_NUMBER_BITMASK 0x07
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_OEM_WISTRON_EVENT_DATA2_FUNCTION_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_OEM_WISTRON_CORE 0x07
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_OEM_WISTRON_NON_FATAL 0x08
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_OEM_WISTRON_FATAL 0x0A
|
||||
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI0_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI1_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI2_ERROR 0x02
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI3_ERROR 0x03
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI0_PROTOCOL_ERROR 0x04
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI1_PROTOCOL_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI2_PROTOCOL_ERROR 0x06
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_QPI3_PROTOCOL_ERROR 0x07
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_MISCELLANEOUS_ERROR 0x23
|
||||
#define IPMI_SENSOR_TYPE_IOH_CORE_ERROR_EVENT_DATA3_OEM_WISTRON_IOH_CORE_ERROR 0x24
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_BITMASK 0x1F
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_PERIODIC_CRC_ERROR 0x00
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_PROTOCOL_ERROR 0x01
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_FLOW_CONTROL_BUFFER_OVERFLOW 0x02
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_RESPONSE_ERROR 0x03
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_PER_PACKET_CRC_ERROR 0x04
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_RETRY_COUNTER_ERROR 0x05
|
||||
#define IPMI_SENSOR_TYPE_CRITICAL_INTERRUPT_EVENT_DATA2_OEM_WISTRON_LOCAL_ERROR_BIT_HT_MCU_PARITY_ERROR 0x07
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_FIRST_FIELD_BITMASK 0xF0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_FIRST_FIELD_SHIFT 4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_SECOND_FIELD_HIGH_BITS_BITMASK 0x0F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_SECOND_FIELD_HIGH_BITS_SHIFT 0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_SECOND_FIELD_HIGH_BITS_LEFT_SHIFT 2
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_SECOND_FIELD_LOW_BITS_BITMASK 0xC0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_SECOND_FIELD_LOW_BITS_SHIFT 6
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_THIRD_FIELD_BITMASK 0x3F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA3_OEM_WISTRON_BIOS_THIRD_FIELD_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_BITMASK 0x80
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_SHIFT 7
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_PC_COMPATIBLE_BOOT 0x0
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_TYPE_UEFI_BOOT 0x1
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_BITMASK 0x7F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_SHIFT 0
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_FORCE_PXE_BOOT 0x1
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_NIC_PXE_BOOT 0x2
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_HARD_DISK_BOOT 0x3
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_RAID_HDD_BOOT 0x4
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_USB_STORAGE_BOOT 0x5
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_CD_DVD_ROM_BOOT 0x7
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_ISCSI_BOOT 0x8
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_UEFI_SHELL 0x9
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BOOT_DEVICE_EPSA_DIAGNOSTIC_BOOT 0xA
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_LOCAL_CONSOLE_RESOURCE_CONFLICT 0x0010
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_LOCAL_CONSOLE_CONTROLLER_ERROR 0x0011
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_LOCAL_CONSOLE_OUTPUT_ERROR 0x0012
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_IO_CONTROLLER_ERROR 0x0013
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_IO_RESOURCE_CONFLICT 0x0014
|
||||
/* achu: Doc lists "controller error" again, Dell confirms its not a typo. */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_IO_CONTROLLER_ERROR2 0x0015
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_FLOPPY_CONTROLLER_ERROR 0x0016
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_FLOPPY_INPUT_ERROR 0x0017
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_ISA_FLOPPY_OUTPUT_ERROR 0x0018
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_USB_READ_ERROR 0x0019
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_USB_WRITE_ERROR 0x001A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_USB_INTERFACE_ERROR 0x001B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MOUSE_INTERFACE_ERROR 0x001C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_NOT_DETECTED 0x001E
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_CONTROLLER_ERROR 0x001F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_STUCK_KEY_ERROR 0x0020
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_KEYBOARD_LOCKED_ERROR 0x0021
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MEMORY_CORRECTABLE_ERROR 0x0023
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MEMORY_UNCORRECTABLE_ERROR 0x0024
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MEMORY_NON_SPECIFIC_ERROR 0x0025
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MP_SERVICE_SELF_TEST_ERROR 0x0026
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_PCI_IO_CONTROLLER_ERROR 0x0027
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_PCI_IO_READ_ERROR 0x0028
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_PCI_IO_WRITE_ERROR 0x0029
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_NOT_DETECTED 0x002A
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_CONTROLLER_ERROR 0x002B
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_INPUT_ERROR 0x002C
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SERIAL_PORT_OUTPUT_ERROR 0x002D
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MICROCODE_UPDATE_ERROR 0x002E
|
||||
/* achu: spec says "be updated", I assume English typo */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_NO_MICROCODE_UPDATED 0x002F
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_0_DEVICE_NOT_FOUND 0x8012
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_1_DEVICE_NOT_FOUND 0x8013
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_2_DEVICE_NOT_FOUND 0x8014
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_3_DEVICE_NOT_FOUND 0x8015
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_4_DEVICE_NOT_FOUND 0x8016
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SATA_5_DEVICE_NOT_FOUND 0x8017
|
||||
/* achu: spec says "be Configured", I assume English error */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SPARING_MODE_IS_NOT_CONFIGURED 0x8018
|
||||
/* achu: spec says "be Configured", I assume English error */
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_MIRROR_MODE_IS_NOT_CONFIGURED 0x8019
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_SUPERVISER_AND_USER_PASSWORDS_CLEARED 0x8020
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_FIRMWARE_PROGRESS_OEM_WISTRON_POST_ERROR_CODE_CMOS_BATTERY_FAULT 0x8021
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_START_RECOVERY 0x1
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_RECOVERY_SUCCESS 0x2
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_LOAD_IMAGE_FAIL 0x3
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_BIOS_RECOVERY_SIGNED_FAIL 0x4
|
||||
|
||||
#define IPMI_SENSOR_TYPE_SYSTEM_EVENT_EVENT_DATA2_OEM_WISTRON_ME_FAIL 0x1
|
||||
|
||||
/*
|
||||
* String arrays for above
|
||||
*/
|
||||
|
||||
extern const char * const ipmi_sensor_type_oem_wistron_ioh_core_error[];
|
||||
extern unsigned int ipmi_sensor_type_oem_wistron_ioh_core_error_max_index;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_AND_EVENT_CODE_TABLES_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,132 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_DELL_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_ECC_CORRECTABLE_ERRORS 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_ECC_UNCORRECTABLE_ERRORS 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_IO_CHANNEL_CHECK 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_PCI_PARITY_ERROR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_PCI_SYSTEM_ERROR 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_EVENT_LOGGING_FOR_CORRECTABLE_ECC_EVENTS_DISABLED 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_EVENT_LOGGING_DISABLED 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_UNKNOWN_ERROR 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_INTERNAL_ERROR 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_PROTOCOL_ERROR 0x0A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_BUS_PERR 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_BUS_INITIALIZATION_ERROR 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CPU_MACHINE_CHECK_ERROR 0x0D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_SPARE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_MIRROR 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_RAID 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_HOT_ADD 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_HOT_REMOVE 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_HOT_FAILURE 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_REDUNDANCY_REGAINED 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_FATAL_PCI_EXPRESS_ERRORS 0x18
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CHIPSET_ERROR 0x19
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_ERROR_REGISTER_POINTER 0x1A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEMORY_CORRECTABLE_ECC_WARNING_OR_CRITICAL_EXCEEDED 0x1B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_CRC_MEMORY_ERROR 0x1C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_USB_OVER_CURRENT 0x1D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_POST_FATAL_ERROR 0x1E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_INCOMPATIBLE_BMC_FIRMWARE 0x1F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEM_OVERTEMP 0x20
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEM_FATAL_SB_CRC 0x21
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MEM_FATAL_NB_CRC 0x22
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_OS_WATCHDOG_TIMER 0x23
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_LINK_TUNING_ERROR 0x24
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_LT_FLEXADDR 0x25
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_NON_FATAL_PCI_EXPRESS_ERRORS 0x26
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_FATAL_IO_ERROR 0x27
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_MSR_INFO_LOG 0x28
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_QPI_LINK_ERROR_SENSOR 0x29
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_TXT_SX_SENTER_COMMAND_ERROR 0x2A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_IDPT_MEMORY_ONLINE_FAILURE 0x2B
|
||||
|
||||
/*
|
||||
* Dell Poweredge C410x
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FB_TEMP 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_1 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_2 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_3 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_4 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_5 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_BOARD_TEMP_6 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_1_TEMP 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_2_TEMP 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_3_TEMP 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_4_TEMP 0x0A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_5_TEMP 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_6_TEMP 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_7_TEMP 0x0D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_8_TEMP 0x0E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_9_TEMP 0x0F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_10_TEMP 0x10
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_11_TEMP 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_12_TEMP 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_13_TEMP 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_14_TEMP 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_15_TEMP 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_16_TEMP 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_1_WATT 0x50
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_2_WATT 0x51
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_3_WATT 0x52
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_4_WATT 0x53
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_5_WATT 0x54
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_6_WATT 0x55
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_7_WATT 0x56
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_8_WATT 0x57
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_9_WATT 0x58
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_10_WATT 0x59
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_11_WATT 0x5A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_12_WATT 0x5B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_13_WATT 0x5C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_14_WATT 0x5D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_15_WATT 0x5E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PCIE_16_WATT 0x5F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_1_WATT 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_2_WATT 0x61
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_3_WATT 0x62
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_PSU_4_WATT 0x63
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_1 0x80
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_2 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_3 0x82
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_4 0x83
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_5 0x84
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_6 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_7 0x86
|
||||
#define IPMI_SENSOR_NUMBER_OEM_DELL_C410X_FAN_8 0x87
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_DELL_SPEC_H */
|
@ -0,0 +1,61 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_ME_POWER_STATE 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SERVER_PLATFORM_SERVICES_FIRMWARE_HEALTH IPMI_SENSOR_NUMBER_OEM_INTEL_ME_FIRMWARE_HEALTH_EVENT
|
||||
|
||||
/* Defined in Spec 2.0, but not in 1.5 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_HEALTH_EVENT_SENSOR 0x19
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_EXCEPTION_EVENT_SENSOR 0x18
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_OPERATIONAL_CAPABILITIES_SENSOR 0x1A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_ALERT_THRESHOLD_EXCEEDED_SENSOR 0x1B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM_SMBUS_STATUS 0x6E
|
||||
|
||||
/* Defined in Spec 3.0 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_NM_SMART_CLST_SENSOR 0xB2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_MANAGER_CUPS_EVENT_SENSOR 0xC1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,304 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_INTEL_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_SENSOR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCIE_FATAL_SENSOR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCIE_CORRECTABLE_SENSOR 0x05
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_CORRECTABLE_SENSOR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_NON_FATAL_SENSOR 0x07
|
||||
/* QPI_FATAL_SENSOR_A and QPI_FATAL_SENSOR_B are identical, they are
|
||||
* logical extensions to provide additional offset values
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_FATAL_SENSOR_A 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QPI_FATAL_SENSOR_B 0x18
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_ERROR 0x06
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_RAS_STATUS_INFORMATION_FOR_MEMORY_MIRRORING_MIRRORING_MODE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_RAS_STATUS_INFORMATION_FOR_MEMORY_MIRRORING_SPARING_MODE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_MIRRORING_RAS_CONFIGURATION_INFORMATION 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_SPARING_RAS_CONFIGURATION_INFORMATION 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_MEMORY_PARITY_ERROR 0x14
|
||||
|
||||
/*
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
/* achu: Few same as above, but to clearly differentiate motherboards, duplicate them */
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PCI_SENSOR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_FATAL_SENSOR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PCIE_CORRECTABLE_SENSOR 0x05
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_CORRECTABLE_SENSOR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_NON_FATAL_SENSOR 0x07
|
||||
/* QPI_FATAL_SENSOR_A and QPI_FATAL_SENSOR_B are identical, they are
|
||||
* logical extensions to provide additional offset values
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_FATAL_SENSOR_A 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_QPI_FATAL_SENSOR_B 0x18
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_BIOS_POST_ERROR 0x06
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_RAS_STATE_INFORMATION_FOR_MEMORY_MIRRORING_MIRRORING_MODE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_MISMATCH_CONFIGURATION_ERROR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_SMI_LINK_CRC_ERROR_PERSISTENT 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_PATROL_SCRUB_ERROR 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_SMI_LINK_CRC_ERROR_UNCORRECTABLE 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_RAS_STATE_INFORMATION_FOR_MEMORY_MIRRORING_SPARING_MODE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_MIRRORING_RAS_CONFIGURATION_INFORMATION 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_SPARING_RAS_CONFIGURATION_INFORMATION 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_QUANTA_QSSC_S4R_MEMORY_BOARD_STATE 0x20
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
/* achu: Few same as above, but to clearly differentiate motherboards, duplicate them */
|
||||
/* achu: note a typo, memory ras configuration status & memory ecc error both 2, not sure why in doc */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MIRRORING_REDUNDANCY_STATE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_RAS_CONFIGURATION_STATUS 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_LEGACY_PCI_ERROR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_PCIE_CORRECTABLE_ERROR 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_BIOS_POST_ERROR 0x06
|
||||
/* not a typo, also 0x06 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_QPI_CORRECTABLE_ERRORS 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_OPI_FATAL_ERROR 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_CHIPSET_PROPRIETARY 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_QPI_LINK_WIDTH_REDUCED 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_ERROR_EXTENSION 0x10
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_SPARING_REDUNDANCY_STATE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_RAS_MODE_SELECT 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_MEMORY_PARITY_ERROR 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_PCIE_FATAL_ERROR_2 0x14
|
||||
/* not a typo, jumps to 0x17 */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_OPI_FATAL_ERROR_2 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_S2600JF_SYSTEM_EVENT 0x83
|
||||
|
||||
/*
|
||||
* Intel Windmill
|
||||
* (Quanta Winterfell)
|
||||
* (Wiwynn Windmill)
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_ME_FW_HEALTH_SENSOR 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_PROC_HOT_EXTENDED_SENSOR 0x3C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_MEM_HOT_EXTENDED_SENSOR 0x3D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_MACHINE_CHECK_ERROR_SENSOR 0x40
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_PCIE_ERROR_SENSOR 0x41
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_POST_ERROR_SENSOR 0x2B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_OTHER_IIO_ERROR_SENSOR 0x43
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_CPU_SEL_STATUS 0x5F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_MEMORY_ECC_ERROR 0x63
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_CHASSIS_POWER_STATUS 0x70
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_LOW 0x28
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_HIGH 0x42
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_MFR_SPECIFIC 0x5E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_WINDMILL_HOT_SWAP_CONTROLLER_0_STATUS_INPUT 0x9F
|
||||
|
||||
/* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
*/
|
||||
|
||||
/* BMC owned sensors (GID = 0020h) */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_UNIT_STATUS 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_UNIT_REDUNDANCY 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IPMI_WATCHDOG 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PHYSICAL_SECURITY 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FP_INTERRUPT 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SMI_TIMEOUT 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SYSTEM_EVENT_LOG 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SYSTEM_EVENT 0x08
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BUTTON_SENSOR 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BMC_WATCHDOG 0x0A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_VOLTAGE_REGULATOR_WATCHDOG 0x0B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_REDUNDANCY 0x0C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SSB_THERMAL_TRIP 0x0D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE_PRESENCE 0x0E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SAS_MODULE_PRESENCE 0x0F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BMC_FIRMWARE_HEALTH 0x10
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SYSTEM_AIRFLOW 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FIRMWARE_UPDATE_STATUS 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE2_PRESENCE 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE5 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE6 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE2_TEMPERATURE 0x16
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER3_TEMPERATURE 0x17
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER4_TEMPERATURE 0x18
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE1 0x20
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FRONT_PANEL_TEMPERATURE 0x21
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SSB_TEMPERATURE 0x22
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE2 0x23
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE3 0x24
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE4 0x25
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_MODULE_TEMPERATURE 0x26
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER1_TEMPERATURE 0x27
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IO_RISER_TEMPERATURE 0x28
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACK_PLANE1_TEMPERATURE 0x29
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACK_PLANE2_TEMPERATURE 0x2A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACK_PLANE3_TEMPERATURE 0x2B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PCI_RISER2_TEMPERATURE 0x2C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_SAS_MODULE_TEMPERATURE 0x2D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_EXIT_AIR_TEMPERATURE 0x2E
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NETWORK_INTERFACE_CONTROLLER_TEMPERATURE 0x2F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS_MIN 0x30
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS_MAX 0x3F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_PRESENT_SENSORS_MIN 0x40
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_PRESENT_SENSORS_MAX 0x4F
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_STATUS 0x50
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_STATUS 0x51
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_AC_POWER_INPUT 0x54
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_AC_POWER_INPUT 0x55
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_12V_PERCENT_OF_MAXIMUM_CURRENT_OUTPUT 0x58
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_12V_PERCENT_OF_MAXIMUM_CURRENT_OUTPUT 0x59
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_TEMPERATURE 0x5C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_TEMPERATURE 0x5D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE15 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE16 0x61
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE17 0x62
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE18 0x63
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE19 0x64
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE20 0x65
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE21 0x66
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE22 0x67
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE23 0x68
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_CONTROLLER1_STATUS 0x69
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_CONTROLLER2_STATUS 0x6A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_CONTROLLER3_STATUS 0x6B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_STATUS 0x70
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_STATUS 0x71
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_STATUS 0x72
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_STATUS 0x73
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_THERMAL_MARGIN 0x74
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_THERMAL_MARGIN 0x75
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_THERMAL_MARGIN 0x76
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_THERMAL_MARGIN 0x77
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_THERMAL_CONTROL_PERCENT 0x78
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_THERMAL_CONTROL_PERCENT 0x79
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_THERMAL_CONTROL_PERCENT 0x7A
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_THERMAL_CONTROL_PERCENT 0x7B
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR_ERR2_TIMEOUT 0x7C
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_IERR_RECOVERY_DUMP_INFO 0x7D
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTERNAL_ERROR 0x80
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR_POPULATION_FAULT 0x82
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_DTS_THERMAL_MARGIN 0x83
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_DTS_THERMAL_MARGIN 0x84
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_DTS_THERMAL_MARGIN 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_DTS_THERMAL_MARGIN 0x86
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_AUTO_CONFIG_STATUS 0x87
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_VRD_OVER_TEMPERATURE 0x90
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_FAN_TACHOMETER1 0xA0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY1_FAN_TACHOMETER2 0xA1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS1 0xA2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS2 0xA3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_FAN_TACHOMETER1 0xA4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_POWER_SUPPLY2_FAN_TACHOMETER2 0xA5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS3 0xA6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_STATUS4 0xA7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_DIMM_AGGREGATE_THERMAL_MARGIN1 0xB6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_DIMM_AGGREGATE_THERMAL_MARGIN2 0xB7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_NODE_AUTO_SHUTDOWN_SENSOR 0xB8
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS2_MIN 0xBA
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_FAN_TACHOMETER_SENSORS2_MAX 0xBF
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR1_THERMAL_TRIP 0xC0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR2_THERMAL_TRIP 0xC1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR3_THERMAL_TRIP 0xC2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_PROCESSOR4_THERMAL_TRIP 0xC3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN1 0xC4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN2 0xC5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN3 0xC6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_INTEL_XEON_PHI_COPROCESSOR_THERMAL_MARGIN4 0xC7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN1 0xC8
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN2 0xC9
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN3 0xCA
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN4 0xCB
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN5 0xCC
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN6 0xCD
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN7 0xCE
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_GLOBAL_AGGREGATE_TEMPERATURE_MARGIN8 0xCF
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_12V 0xD0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_VOLTAGE_FAULT 0xD1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE7 0xD5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_TEMPERATURE8 0xD6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BASEBOARD_CMOS_BATTERY 0xDE
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HOT_SWAP_BACKPLANE4_TEMPERATURE 0xE0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_REAR_HARD_DISK_DRIVE0_STATUS 0xE2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_REAR_HARD_DISK_DRIVE1_STATUS 0xE3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE0_STATUS 0xF0
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE1_STATUS 0xF1
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE2_STATUS 0xF2
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE3_STATUS 0xF3
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE4_STATUS 0xF4
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE5_STATUS 0xF5
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE6_STATUS 0xF6
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE7_STATUS 0xF7
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE8_STATUS 0xF8
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE9_STATUS 0xF9
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE10_STATUS 0xFA
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE11_STATUS 0xFB
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE12_STATUS 0xFC
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE13_STATUS 0xFD
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_HARD_DISK_DRIVE14_STATUS 0xFE
|
||||
|
||||
/* BIOS POST owned sensors (GID = 0001h) */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_MEMORY_RAS_CONFIGURATION_STATUS 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_POST_ERROR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_INTEL_QUICK_PATH_INTERFACE_LINK_WIDTH_REDUCED 0x09
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_MEMORY_RAS_MODE_SELECT 0x12
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_POST_SYSTEM_EVENT 0x83
|
||||
|
||||
/* BIOS SMI Handler owned sensors (GID = 0033h) */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_MIRRORING_REDUNDANCY_STATE 0x01
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_MEMORY_ECC_ERROR 0x02
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_LEGACY_PCI_ERROR 0x03
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_PCI_EXPRESS_FATAL_ERROR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_PCI_EXPRESS_CORRECTABLE_ERROR 0x05
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_INTEL_QUICK_PATH_INTERFACE_CORRECTABLE_ERROR 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_INTEL_QUICK_PATH_INTERFACE_FATAL_ERROR 0x07
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_SPARING_REDUNDANCY_STATE 0x11
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_MEMORY_PARITY_ERROR 0x13
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_PCI_EXPRESS_FATAL_ERROR2 0x14
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_BIOS_RECOVERY 0x15
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INTEL_BIOS_SMI_INTEL_QUICKPATH_INTERFACE_FATAL_ERROR2 0x17
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_POST_START 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_POST_OK 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_POST_ERROR_CODE 0x06
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_PORT80_CODE_EVENT 0x55
|
||||
#define IPMI_SENSOR_NUMBER_OEM_INVENTEC_MEMORY 0x60
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_MEMORY 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_PCI_SENSORID 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_QPI_SENSORID 0x82
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_INT_SENSORID 0x83
|
||||
#define IPMI_SENSOR_NUMBER_OEM_QUANTA_SOFTWARE_NMI 0xA5
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_NUMBERS_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SENSOR_NUMBERS_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_PROCESSOR 0x04
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_MEMORY 0x60
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_QPI_SENSOR_ID 0x71
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_INT_SENSOR_ID 0x72
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_PCI_SENSOR_ID 0x73
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_SB_SENSOR_ID 0x77
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_POST_START 0x81
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_POST_END 0x85
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_POST_ERROR 0x86
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_BIOS_RECOVERY_FAIL 0x89
|
||||
#define IPMI_SENSOR_NUMBER_OEM_WISTRON_ME_FAIL 0x8A
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_NUMBERS_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_DELL_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/* achu: names taken from code, are correct names? */
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING 0xC1
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_NON_FATAL_ERROR 0xC2
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_FATAL_IO_ERROR 0xC3
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_UPGRADE 0xC4
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_DELL_SPEC_H */
|
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_FUJITSU_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_FUJITSU_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Fujitsu Siemens Computers
|
||||
* Fujitsu Technology Solutions
|
||||
* iRMC S1 / iRMC S2
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_I2C_BUS 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_SYSTEM_POWER_CONSUMPTION 0xDD // Events only
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY_STATUS 0xDE
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY_CONFIG 0xDF
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_MEMORY 0xE1 // Events only
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_HW_ERROR 0xE3 // Events only
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_SYS_ERROR 0xE4 // Events only
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_FAN_STATUS 0xE6
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_PSU_STATUS 0xE8
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_PSU_REDUNDANCY 0xE9
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_COMMUNICATION 0xEA // Reserved
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_FLASH 0xEC // Events only
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_EVENT 0xEE // Reserved
|
||||
#define IPMI_SENSOR_TYPE_OEM_FUJITSU_CONFIG_BACKUP 0xEF
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_FUJITSU_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_HP_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_HP_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* HP Proliant DL160 G8
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_HP_LED 0xC0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_HP_SPEC_H */
|
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_INTEL_NODE_MANAGER_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel Node Manager
|
||||
*
|
||||
* For Intel Chips, not just Intel Motherboards. Confirmed for:
|
||||
*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel S2600JF/Appro 512X
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER 0xDC
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_NODE_MANAGER_THERMAL_SENSOR_ON_DIMM 0x28
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_INTEL_NODE_MANAGER_SPEC_H */
|
@ -0,0 +1,84 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_INTEL_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************
|
||||
* Dell *
|
||||
*******************************************/
|
||||
|
||||
/*
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
*/
|
||||
|
||||
/* achu: names taken from code, are correct names? */
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_SYSTEM_PERFORMANCE_DEGRADATION_STATUS 0xC0
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_LINK_TUNING 0xC1
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_NON_FATAL_ERROR 0xC2
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_FATAL_IO_ERROR 0xC3
|
||||
#define IPMI_SENSOR_TYPE_OEM_DELL_UPGRADE 0xC4
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
* Intel SR1625
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_SMI_TIMEOUT 0xF3
|
||||
|
||||
/*
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_POWER_THROTTLED 0xF3
|
||||
|
||||
/*
|
||||
* Intel S5000PAL
|
||||
*/
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_NMI_STATE 0xC0
|
||||
|
||||
/*
|
||||
* Intel Windmill
|
||||
* (Quanta Winterfell)
|
||||
* (Wiwynn Windmill)
|
||||
*/
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_WINDMILL_ME_FW_HEALTH_SENSOR 0xDC
|
||||
|
||||
/* Used by many sensors */
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_WINDMILL_GENERIC 0xC0
|
||||
|
||||
/*
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
*/
|
||||
#define IPMI_SENSOR_TYPE_OEM_INTEL_E52600V3_IERR_RECOVERY_DUMP_INFO 0xD1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_SENSOR_TYPE_OEM_INVENTEC_BIOS 0xC1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,57 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_SUPERMICRO_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_SUPERMICRO_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Supermicro X7DBR-3 (X7DBR_3)
|
||||
* Supermicro X7DB8
|
||||
* Supermicro X8DTN
|
||||
* Supermicro X7SBI-LN4 (X7SBI_LN4)
|
||||
* Supermicro X8DTH
|
||||
* Supermicro X8DTG
|
||||
* Supermicro X8DTU
|
||||
* Supermicro X8DT3-LN4F (X8DT3_LN4F)
|
||||
* Supermicro X8DTU-6+ (X8DTU_6PLUS)
|
||||
* Supermicro X8DTL
|
||||
* Supermicro X8DTL-3F (X8DTL_3F)
|
||||
* Supermicro X8SIL-F (X8SIL_F)
|
||||
* Supermicro X9SCL
|
||||
* Supermicro X9SCM
|
||||
* Supermicro X8DTN+-F (X8DTNPLUS_F)
|
||||
* Supermicro X8SIE
|
||||
* Supermicro X9SCA-F-O (X9SCA-F-O)
|
||||
* Supermicro H8DGU-F (H8DGU_F)
|
||||
* Supermicro X9DRi-F (X9DRI_F)
|
||||
* Supermicro X9DRI-LN4F+ (X9DRI_LN4F_PLUS)
|
||||
* Supermicro X9SPU-F-O (X9SPU-F-O)
|
||||
* Supermicro X9SCM-iiF (X9SCM_IIF)
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_SENSOR_TYPE_OEM_SUPERMICRO_CPU_TEMP 0xC0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_SUPERMICRO_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SENSOR_TYPES_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SENSOR_TYPES_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SENSOR_TYPE_OEM_WISTRON_IOH_CORE_ERROR 0xC0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SENSOR_TYPES_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,57 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_OEM_INTEL_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_INTEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Intel S5500WB/Penguin Computing Relion 700
|
||||
*/
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_BIOS_SMI_HANDLER 0x33
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_ME_FIRMWARE 0x2C
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_HSC_FIRMWARE 0xC0
|
||||
|
||||
/*
|
||||
* Quanta QSSC-S4R/Appro GB812X-CN
|
||||
* (Quanta motherboard contains Intel manufacturer ID)
|
||||
*/
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_QUANTA_QSSC_S4R_BIOS_POST 0x33
|
||||
|
||||
/*
|
||||
* Intel S2600JF/Appro 512X
|
||||
*/
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_S2600JF_BIOS_POST 0x01
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_S2600JF_BIOS_SMI_HANDLER 0x33
|
||||
|
||||
/*
|
||||
* Intel S2600KP
|
||||
* Intel S2600WT2
|
||||
* Intel S2600WTT
|
||||
*/
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_E52600V3_BIOS_POST 0x01
|
||||
#define IPMI_GENERATOR_ID_OEM_INTEL_E52600V3_BIOS_SMI_HANDLER 0x33
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_OEM_INTEL_SPEC_H */
|
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_OEM_INVENTEC_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_INVENTEC_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_GENERATOR_ID_OEM_INVENTEC_BIOS 0x01
|
||||
#define IPMI_GENERATOR_ID_OEM_INVENTEC_SMI 0x21
|
||||
#define IPMI_GENERATOR_ID_OEM_INVENTEC_POST_ERROR_CODE 0x31
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_OEM_INVENTEC_SPEC_H */
|
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_OEM_LINUX_KERNEL_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_LINUX_KERNEL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_LINUX_KERNEL 0x21
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_OEM_LINUX_KERNEL_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_OEM_QUANTA_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_QUANTA_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Quanta S99Q/Dell FS12-TY
|
||||
*/
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_GENERATOR_ID_OEM_QUANTA_ERROR 0x01
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_OEM_QUANTA_SPEC_H */
|
@ -0,0 +1,39 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SLAVE_ADDRESS_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SLAVE_ADDRESS_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
/* achu: not official names, named based on use context */
|
||||
#define IPMI_GENERATOR_ID_OEM_WISTRON_BIOS 0x01
|
||||
#define IPMI_GENERATOR_ID_OEM_WISTRON_SMI 0x21
|
||||
#define IPMI_GENERATOR_ID_OEM_WISTRON_ME 0x2C
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SLAVE_ADDRESS_OEM_WISTRON_SPEC_H */
|
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SOL_CONFIGURATION_PARAMETERS_INVENTEC_OEM_SPEC_H
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETERS_INVENTEC_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Inventec 5441/Dell Xanadu II
|
||||
* Inventec 5442/Dell Xanadu III
|
||||
*/
|
||||
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_OEM_INVENTEC_SOL_TIMEOUT 192
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SOL_CONFIGURATION_PARAMETERS_INVENTEC_OEM_SPEC_H */
|
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SOL_CONFIGURATION_PARAMETERS_WISTRON_OEM_SPEC_H
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETERS_WISTRON_OEM_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SOL_CONFIGURATION_PARAMETER_OEM_WISTRON_SOL_TIMEOUT 192
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IPMI_SOL_CONFIGURATION_PARAMETERS_WISTRON_OEM_SPEC_H */
|
@ -0,0 +1,230 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_INFO_PARAMETERS_OEM_DELL_SPEC_H
|
||||
#define IPMI_SYSTEM_INFO_PARAMETERS_OEM_DELL_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Dell Poweredge 2900
|
||||
* Dell Poweredge 2950
|
||||
* Dell Poweredge R610
|
||||
* Dell Poweredge R710
|
||||
* Dell Poweredge R720
|
||||
* Dell Poweredge M600
|
||||
* Dell Poweredge M610
|
||||
* Dell Poweredge M610X
|
||||
* Dell Poweredge M910
|
||||
*
|
||||
* Support of below varies by system.
|
||||
*/
|
||||
|
||||
/* achu note: called "front panel string" in newer 12G docs */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_LCD_STRING 0xC1
|
||||
/* achu note: called "front panel configuration" in newer 12G docs */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_LCD_CONFIGURATION 0xC2
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SYSTEM_GUID 0xC3
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SYSTEM_ASSET_TAG 0xC4
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SYSTEM_SERVICE_TAG 0xC5
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CHASSIS_SERVICE_TAG 0xC6
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CHASSIS_RELATED_SERVICE_TAG 0xC7
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_BOARD_REVISION 0xC8
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SYSTEM_ID 0xC9
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_BIOS_FEATURE 0xCA
|
||||
/* Only for 10G systems */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_EMBEDDED_NICS_MAC_ADDRESSES 0xCB
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_EMBEDDED_NICS_CAPABILITY 0xCE
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_PLATFORM_MODEL_NAME 0xD1
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_LOCAL_CONSOLE_LOCKOUT 0xD6
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_POWER_STAGGERING_AC_RECOVERY 0xD8
|
||||
/* achu: this one is taken from code, is correct name? */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_11G_MAC_ADDRESSES 0xDA
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_12G_MAC_ADDRESSES IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_11G_MAC_ADDRESSES
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_BLADE_SLOT_INFO 0xDC
|
||||
/* legacy from prior reverse engineering */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SLOT_NUMBER IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_BLADE_SLOT_INFO
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_INFO 0xDD
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_IPV4_URL 0xDE
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_INFO 0xDF
|
||||
/* CMC = Chassis Management Controller */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV4_URL 0xE0
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_GUI_WEBSERVER_CONTROL 0xE1
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_PLATFORM_SPECIFIC_DEVICE_INFORMATION 0xE3
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_NIC_CONTROL 0xE5
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_LCD_STATUS 0xE7
|
||||
/* achu: this one is taken from code, is correct name? */
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_POWER_CAPACITY 0xEA
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_AVERAGE_POWER_CONSUMPTION_STATISTICS 0xEB
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_MAX_POWER_CONSUMPTION_STATISTICS 0xEC
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_MIN_POWER_CONSUMPTION_STATISTICS 0xED
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_EMBEDDED_VIDEO_STATUS 0xEE
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_ISCSI_NICS_MAC_ADDRESSES 0xEF
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IPV6_SNMP_TRAP_DESTINATION_ADDRESS 0xF0
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_INTERNAL_STORAGE_SLOT_INFO 0xF1
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV6_INFO 0xF2
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV6_URL 0xF3
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SYSTEM_REVISION 0xF4
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_REDUNDANCY_POLICY 0xFE
|
||||
|
||||
/* Dell System Info Parameter macros */
|
||||
|
||||
/* 256 b/c length is 8 bit field */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAX_STRING_BYTES 256
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_PLATFORM_MODEL_NAME,
|
||||
* IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_SLOT_NUMBER,
|
||||
* IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_IPV4_URL,
|
||||
* IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_INFO,
|
||||
* IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV4_URL,
|
||||
* IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV6_INFO,
|
||||
* IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV6_URL
|
||||
*/
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_STRING_ENCODING_BITMASK 0xF
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_STRING_ENCODING_SHIFT 0
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_EMBEDDED_NICS_MAC_ADDRESSES */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_LENGTH 6
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_11G_MAC_ADDRESSES */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_TYPE_BITMASK 0x30
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_TYPE_SHIFT 4
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_NIC_STATUS_BITMASK 0xC0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_NIC_STATUS_SHIFT 6
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_NIC_NUMBER_BITMASK 0x1F
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_NIC_NUMBER_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_TYPE_ETHERNET 0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_TYPE_ISCSI 1
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_TYPE_RESERVED 3
|
||||
|
||||
/* achu: Dell calls an ethernet port that has been PCI disabled in the
|
||||
* BIOS, but has an active service processor "playing dead"
|
||||
*/
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_STATUS_ENABLED 0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_STATUS_DISABLED 1
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_STATUS_PLAYING_DEAD 2
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_MAC_ADDRESS_STATUS_RESERVED 3
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_11G_OR_12G_MAC_ADDRESS_LENGTH 8
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_INFO */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_MIN_LEN 41
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IP_ADDRESS_FORMAT_IPV4 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IP_ADDRESS_FORMAT_IPV6 0x01
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IP_ADDRESS_CONFIG_DHCP 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IP_ADDRESS_CONFIG_STATIC 0x01
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_FIRMWARE_VERSION_STRING_LENGTH 20
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_10G 0x08
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_CMC 0x09
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_11G_MONOLITHIC 0x0A
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_11G_MODULAR 0x0B
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_MASER_LITE_BMC 0x0D
|
||||
/* From ipmitool, http://ipmitool.sourceforge.net/ */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_12G_MONOLITHIC 0x10
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_INFO_IDRAC_TYPE_12G_MODULAR 0x11
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IDRAC_GUI_WEBSERVER_CONTROL */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_WEB_GUI_SERVER_CONTROL_DISABLED 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IDRAC_WEB_GUI_SERVER_CONTROL_ENABLED 0x01
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_POWER_CAPACITY */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_POWER_CAPACITY_UNITS_WATTS 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_POWER_CAPACITY_UNITS_BTUPHR 0x01
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_POWER_CAPACITY_UNITS_PERCENT 0x03
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_GET_POWER_CAPACITY_SYSTEM_THROTTLING_NORMAL_SYSTEM_OPERATION 0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_GET_POWER_CAPACITY_SYSTEM_THROTTLING_SYSTEM_NEEDS_TO_BE_THROTTLED 1
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_GET_POWER_CAPACITY_SYSTEM_THROTTLING_SYSTEM_IS_OVERCONFIGURED 2
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_EMBEDDED_VIDEO_STATUS */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_EMBEDDED_VIDEO_STATUS_DISABLED 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_EMBEDDED_VIDEO_STATUS_ENABLED 0x01
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_IPV6_SNMP_TRAP_DESTINATION_ADDRESS */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_IPV6_SNMP_TRAP_DESTINATION_ADDRESS_MIN_LEN 6
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_INFO */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_MIN_LEN 43
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_IP_ADDRESS_FORMAT_IPV4 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_IP_ADDRESS_FORMAT_IPV6 0x01
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_IP_ADDRESS_SOURCE_DHCP 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_IP_ADDRESS_SOURCE_STATIC 0x01
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_IP_ADDRESS_STRING_LENGTH 16
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_CMC_FIRMWARE_VERSION_STRING_LENGTH 22
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_GUI_STATUS_DISABLED 0x00
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_GUI_STATUS_ENABLED 0x01
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_NIC_STATE_BITMASK 0x01
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_NIC_STATE_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_NIC_STATE_DISABLED 0x0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_NIC_STATE_ENABLED 0x1
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_LINK_CONNECT_BITMASK 0x02
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_LINK_CONNECT_SHIFT 1
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_LINK_CONNECT_DISCONNECTED 0x0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_LINK_CONNECT_CONNECTED 0x1
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_CMC_FAILOVER_RACRESET_BITMASK 0x04
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_CMC_FAILOVER_RACRESET_SHIFT 2
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_CMC_FAILOVER_RACRESET_NOT_FROM_FAILOVER 0x0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_CMC_FAILOVER_RACRESET_FROM_FAILOVER 0x1
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_HARDWARE_VENDOR_MODE_BITMASK 0x08
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_HARDWARE_VENDOR_MODE_SHIFT 3
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_HARDWARE_VENDOR_MODE_NO_HARDWARE_VENDOR_MODE 0x0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_INFO_NIC_STATUS_HARDWARE_VENDOR_MODE_HAS_HARDWARE_VENDOR_MODE 0x1
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_DELL_CMC_IPV6_INFO */
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_MIN_LEN 57
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_IPV6_ADDRESS_STRING_LENGTH 39
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_IPV6_STATUS_BITMASK 0x1
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_IPV6_STATUS_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_IPV6_STATUS_DISABLED 0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_IPV6_STATUS_ENABLED 1
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_AUTOCONFIGURATION_BITMASK 0x1
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_AUTOCONFIGURATION_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_AUTOCONFIGURATION_DISABLED 0
|
||||
#define IPMI_OEM_DELL_SYSTEM_INFO_CMC_IPV6_INFO_AUTOCONFIGURATION_ENABLED 1
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* IPMI_SYSTEM_INFO_PARAMETERS_SPEC_H */
|
@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (C) 2003-2015 FreeIPMI Core Team
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IPMI_SYSTEM_INFO_PARAMETERS_OEM_WISTRON_SPEC_H
|
||||
#define IPMI_SYSTEM_INFO_PARAMETERS_OEM_WISTRON_SPEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Wistron / Dell Poweredge C6220
|
||||
*/
|
||||
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_WISTRON_ASSET_TAG 196
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_WISTRON_SERVICE_TAG 197
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_WISTRON_PRODUCT_NAME 209
|
||||
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_WISTRON_ASSET_TAG_MAX_LEN 20
|
||||
#define IPMI_SYSTEM_INFO_PARAMETER_OEM_WISTRON_SERVICE_TAG_MAX_LEN 7
|
||||
|
||||
/* Wistron System Info Parameter macros */
|
||||
|
||||
/* w/ IPMI_SYSTEM_INFO_PARAMETER_OEM_WISTRON_PRODUCT_NAME
|
||||
*/
|
||||
#define IPMI_OEM_WISTRON_SYSTEM_INFO_STRING_ENCODING_BITMASK 0xF
|
||||
#define IPMI_OEM_WISTRON_SYSTEM_INFO_STRING_ENCODING_SHIFT 0
|
||||
|
||||
#define IPMI_OEM_WISTRON_SYSTEM_INFO_STRING_ENCODING_PRINTABLE_ASCII 0x0
|
||||
|
||||
/* 256 b/c length is 8 bit field */
|
||||
#define IPMI_OEM_WISTRON_SYSTEM_INFO_MAX_STRING_BYTES 256
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* IPMI_SYSTEM_INFO_PARAMETERS_SPEC_H */
|
Reference in New Issue
Block a user